Classic Timing Analyzer report for NB3000AL_Slideshow
Tue Apr 08 23:13:20 2014
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Parallel Compilation
  6. Clock Setup: 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]'
  7. Clock Setup: 'CLK_REF'
  8. Clock Setup: 'JTAG_NEXUS_TCK'
  9. Clock Hold: 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]'
 10. Clock Hold: 'CLK_REF'
 11. tsu
 12. tco
 13. tpd
 14. th
 15. Minimum tco
 16. Minimum tpd
 17. Board Trace Model Assignments
 18. Input Transition Times
 19. Slow Corner Signal Integrity Metrics
 20. Fast Corner Signal Integrity Metrics
 21. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
+--------------------------------------------------------------------------------------------------+-----------+----------------------------------+----------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+--------------+
; Type                                                                                             ; Slack     ; Required Time                    ; Actual Time                      ; From                                                                                                                                                                                         ; To                                                                                                                                                                              ; From Clock                                                                        ; To Clock                                                                          ; Failed Paths ;
+--------------------------------------------------------------------------------------------------+-----------+----------------------------------+----------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+--------------+
; Worst-case tsu                                                                                   ; N/A       ; None                             ; 19.218 ns                        ; TEST_BUTTON                                                                                                                                                                                  ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_read_ack|lpm_ff:ff1|dffs[0]                          ; --                                                                                ; CLK_REF                                                                           ; 0            ;
; Worst-case tco                                                                                   ; N/A       ; None                             ; 31.113 ns                        ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                                                                                                       ; SRAM1_D[7]                                                                                                                                                                      ; TEST_BUTTON                                                                       ; --                                                                                ; 0            ;
; Worst-case tpd                                                                                   ; N/A       ; None                             ; 26.331 ns                        ; TEST_BUTTON                                                                                                                                                                                  ; SRAM1_D[7]                                                                                                                                                                      ; --                                                                                ; --                                                                                ; 0            ;
; Worst-case th                                                                                    ; N/A       ; None                             ; -2.301 ns                        ; JTAG_NEXUS_TDI                                                                                                                                                                               ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|byp_reg_Z              ; --                                                                                ; JTAG_NEXUS_TCK                                                                    ; 0            ;
; Worst-case Minimum tco                                                                           ; N/A       ; None                             ; 6.357 ns                         ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_16                                                                                                                      ; SRAM1_D[0]                                                                                                                                                                      ; CLK_REF                                                                           ; --                                                                                ; 0            ;
; Worst-case Minimum tpd                                                                           ; N/A       ; None                             ; 16.169 ns                        ; TEST_BUTTON                                                                                                                                                                                  ; SRAM0_A[4]                                                                                                                                                                      ; --                                                                                ; --                                                                                ; 0            ;
; Clock Setup: 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]' ; -4.609 ns ; 40.00 MHz ( period = 25.000 ns ) ; 33.77 MHz ( period = 29.609 ns ) ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 458          ;
; Clock Setup: 'CLK_REF'                                                                           ; 45.220 ns ; 20.00 MHz ( period = 50.000 ns ) ; 209.21 MHz ( period = 4.780 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1]                                                                                                                      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7]                                                                                                         ; CLK_REF                                                                           ; CLK_REF                                                                           ; 0            ;
; Clock Setup: 'JTAG_NEXUS_TCK'                                                                    ; N/A       ; None                             ; 150.02 MHz ( period = 6.666 ns ) ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z                 ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_2__Z ; JTAG_NEXUS_TCK                                                                    ; JTAG_NEXUS_TCK                                                                    ; 0            ;
; Clock Hold: 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]'  ; 0.646 ns  ; 40.00 MHz ( period = 25.000 ns ) ; N/A                              ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_31|lpm_ff:ff1|dffs[0]                                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_31|lpm_ff:ff1|dffs[0]                       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0            ;
; Clock Hold: 'CLK_REF'                                                                            ; 0.884 ns  ; 20.00 MHz ( period = 50.000 ns ) ; N/A                              ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5]                                                                                                                      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6]                                                                                                         ; CLK_REF                                                                           ; CLK_REF                                                                           ; 0            ;
; Total number of failed paths                                                                     ;           ;                                  ;                                  ;                                                                                                                                                                                              ;                                                                                                                                                                                 ;                                                                                   ;                                                                                   ; 458          ;
+--------------------------------------------------------------------------------------------------+-----------+----------------------------------+----------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+--------------+


+--------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                                           ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                              ; Setting            ; From ; To ; Entity Name ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                                         ; EP3C40F780C8       ;      ;    ;             ;
; Timing Models                                                       ; Final              ;      ;    ;             ;
; Default hold multicycle                                             ; Same as Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains                           ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                              ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                                      ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                                    ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                               ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements                             ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                                    ; Off                ;      ;    ;             ;
; Enable Clock Latency                                                ; Off                ;      ;    ;             ;
; Use TimeQuest Timing Analyzer                                       ; On                 ;      ;    ;             ;
; Number of source nodes to report per destination node               ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                               ; 10                 ;      ;    ;             ;
; Number of paths to report                                           ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                                        ; On                 ;      ;    ;             ;
; Use Fast Timing Models                                              ; Off                ;      ;    ;             ;
; Report IO Paths Separately                                          ; Off                ;      ;    ;             ;
; Perform Multicorner Analysis                                        ; On                 ;      ;    ;             ;
; Reports the worst-case path for each clock domain and analysis      ; Off                ;      ;    ;             ;
; Removes common clock path pessimism (CCPP) during slack computation ; On                 ;      ;    ;             ;
; Output I/O Timing Endpoint                                          ; Near End           ;      ;    ;             ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                                                                                                    ;
+-----------------------------------------------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
; Clock Node Name                                                                   ; Clock Setting Name ; Type       ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset    ; Phase offset ;
+-----------------------------------------------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+
; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ;                    ; PLL output ; 40.0 MHz         ; 0.000 ns      ; 0.000 ns     ; CLK_REF  ; 2                     ; 1                   ; -2.471 ns ;              ;
; CLK_REF                                                                           ;                    ; User Pin   ; 20.0 MHz         ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A       ;              ;
; JTAG_NEXUS_TCK                                                                    ;                    ; User Pin   ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A       ;              ;
; TEST_BUTTON                                                                       ;                    ; User Pin   ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A       ;              ;
+-----------------------------------------------------------------------------------+--------------------+------------+------------------+---------------+--------------+----------+-----------------------+---------------------+-----------+--------------+


Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
+-------------------------------------+
; Parallel Compilation                ;
+----------------------------+--------+
; Processors                 ; Number ;
+----------------------------+--------+
; Number detected on machine ; 4      ;
; Maximum allowed            ; 1      ;
+----------------------------+--------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                                                                                                                               ; To                                                                                                                                                                                 ; From Clock                                                                        ; To Clock                                                                          ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+
; -4.609 ns                               ; 33.77 MHz ( period = 29.609 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.345 ns                 ; 28.954 ns               ;
; -4.281 ns                               ; 34.15 MHz ( period = 29.281 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_22                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.347 ns                 ; 28.628 ns               ;
; -4.224 ns                               ; 34.22 MHz ( period = 29.224 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_1                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.342 ns                 ; 28.566 ns               ;
; -4.099 ns                               ; 30.12 MHz ( period = 33.198 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Rd_Index_3                                                                                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.234 ns                 ; 16.333 ns               ;
; -3.981 ns                               ; 34.51 MHz ( period = 28.981 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_28                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.353 ns                 ; 28.334 ns               ;
; -3.942 ns                               ; 30.41 MHz ( period = 32.884 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_1                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.256 ns                 ; 16.198 ns               ;
; -3.919 ns                               ; 30.45 MHz ( period = 32.838 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_10                                                                                       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.237 ns                 ; 16.156 ns               ;
; -3.860 ns                               ; 34.65 MHz ( period = 28.860 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_5                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.379 ns                 ; 28.239 ns               ;
; -3.826 ns                               ; 34.69 MHz ( period = 28.826 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_20                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.354 ns                 ; 28.180 ns               ;
; -3.814 ns                               ; 30.65 MHz ( period = 32.628 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_2                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.256 ns                 ; 16.070 ns               ;
; -3.734 ns                               ; 30.80 MHz ( period = 32.468 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_6                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.258 ns                 ; 15.992 ns               ;
; -3.672 ns                               ; 34.88 MHz ( period = 28.672 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.344 ns                 ; 28.016 ns               ;
; -3.646 ns                               ; 34.91 MHz ( period = 28.646 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_18                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.367 ns                 ; 28.013 ns               ;
; -3.607 ns                               ; 31.04 MHz ( period = 32.214 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_0                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.241 ns                 ; 15.848 ns               ;
; -3.530 ns                               ; 35.05 MHz ( period = 28.530 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_8                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 27.908 ns               ;
; -3.526 ns                               ; 35.06 MHz ( period = 28.526 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_0                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.363 ns                 ; 27.889 ns               ;
; -3.462 ns                               ; 31.32 MHz ( period = 31.924 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_7                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.258 ns                 ; 15.720 ns               ;
; -3.460 ns                               ; 35.14 MHz ( period = 28.460 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_16                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.364 ns                 ; 27.824 ns               ;
; -3.397 ns                               ; 31.45 MHz ( period = 31.794 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_8                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.258 ns                 ; 15.655 ns               ;
; -3.389 ns                               ; 31.47 MHz ( period = 31.778 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_4                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.241 ns                 ; 15.630 ns               ;
; -3.352 ns                               ; 35.27 MHz ( period = 28.352 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_6                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 27.723 ns               ;
; -3.344 ns                               ; 35.28 MHz ( period = 28.344 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_22                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.346 ns                 ; 27.690 ns               ;
; -3.327 ns                               ; 31.59 MHz ( period = 31.654 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_5                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.265 ns                 ; 15.592 ns               ;
; -3.287 ns                               ; 35.35 MHz ( period = 28.287 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_1                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.341 ns                 ; 27.628 ns               ;
; -3.267 ns                               ; 35.38 MHz ( period = 28.267 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_23                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.375 ns                 ; 27.642 ns               ;
; -3.251 ns                               ; 31.74 MHz ( period = 31.502 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Rd_Index_2                                                                                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.263 ns                 ; 15.514 ns               ;
; -3.237 ns                               ; 35.41 MHz ( period = 28.237 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_2                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.379 ns                 ; 27.616 ns               ;
; -3.203 ns                               ; 31.84 MHz ( period = 31.406 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_DoRegWrite                                                                                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.263 ns                 ; 15.466 ns               ;
; -3.190 ns                               ; 31.87 MHz ( period = 31.380 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_IsMemRead                                                                                     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.264 ns                 ; 15.454 ns               ;
; -3.182 ns                               ; 31.88 MHz ( period = 31.364 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_9                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.258 ns                 ; 15.440 ns               ;
; -3.160 ns                               ; 35.51 MHz ( period = 28.160 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_17                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.365 ns                 ; 27.525 ns               ;
; -3.156 ns                               ; 35.52 MHz ( period = 28.156 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_24                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.364 ns                 ; 27.520 ns               ;
; -3.090 ns                               ; 32.07 MHz ( period = 31.180 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Rd_Index_0                                                                                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.263 ns                 ; 15.353 ns               ;
; -3.086 ns                               ; 35.60 MHz ( period = 28.086 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_21                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 27.464 ns               ;
; -3.064 ns                               ; 35.63 MHz ( period = 28.064 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.346 ns                 ; 27.410 ns               ;
; -3.051 ns                               ; 32.15 MHz ( period = 31.102 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Rd_Index_1                                                                                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.263 ns                 ; 15.314 ns               ;
; -3.044 ns                               ; 35.66 MHz ( period = 28.044 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_28                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.352 ns                 ; 27.396 ns               ;
; -3.016 ns                               ; 32.22 MHz ( period = 31.032 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Rd_Index_4                                                                                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.263 ns                 ; 15.279 ns               ;
; -2.979 ns                               ; 35.74 MHz ( period = 27.979 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_29                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.369 ns                 ; 27.348 ns               ;
; -2.923 ns                               ; 35.81 MHz ( period = 27.923 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_5                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 27.301 ns               ;
; -2.889 ns                               ; 35.86 MHz ( period = 27.889 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_20                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.353 ns                 ; 27.242 ns               ;
; -2.880 ns                               ; 35.87 MHz ( period = 27.880 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_27                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.363 ns                 ; 27.243 ns               ;
; -2.860 ns                               ; 35.89 MHz ( period = 27.860 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_4                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.379 ns                 ; 27.239 ns               ;
; -2.858 ns                               ; 32.56 MHz ( period = 30.716 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Rd_Index_5                                                                                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.263 ns                 ; 15.121 ns               ;
; -2.819 ns                               ; 35.95 MHz ( period = 27.819 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_7                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 27.197 ns               ;
; -2.736 ns                               ; 36.05 MHz ( period = 27.736 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_22                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.348 ns                 ; 27.084 ns               ;
; -2.722 ns                               ; 36.07 MHz ( period = 27.722 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_30                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.347 ns                 ; 27.069 ns               ;
; -2.709 ns                               ; 36.09 MHz ( period = 27.709 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_18                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.366 ns                 ; 27.075 ns               ;
; -2.679 ns                               ; 36.13 MHz ( period = 27.679 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_1                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.343 ns                 ; 27.022 ns               ;
; -2.667 ns                               ; 36.14 MHz ( period = 27.667 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_19                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.362 ns                 ; 27.029 ns               ;
; -2.662 ns                               ; 36.15 MHz ( period = 27.662 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_12                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 27.040 ns               ;
; -2.593 ns                               ; 36.24 MHz ( period = 27.593 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_15                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 26.971 ns               ;
; -2.593 ns                               ; 36.24 MHz ( period = 27.593 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_8                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.377 ns                 ; 26.970 ns               ;
; -2.589 ns                               ; 36.25 MHz ( period = 27.589 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_0                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.362 ns                 ; 26.951 ns               ;
; -2.523 ns                               ; 36.33 MHz ( period = 27.523 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_16                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.363 ns                 ; 26.886 ns               ;
; -2.519 ns                               ; 36.34 MHz ( period = 27.519 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_3                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.379 ns                 ; 26.898 ns               ;
; -2.507 ns                               ; 33.32 MHz ( period = 30.014 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a4~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram_1|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0 ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.182 ns                 ; 14.689 ns               ;
; -2.486 ns                               ; 33.36 MHz ( period = 29.972 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a4~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.185 ns                 ; 14.671 ns               ;
; -2.480 ns                               ; 36.39 MHz ( period = 27.480 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.368 ns                 ; 26.848 ns               ;
; -2.444 ns                               ; 36.44 MHz ( period = 27.444 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_31                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.362 ns                 ; 26.806 ns               ;
; -2.436 ns                               ; 36.45 MHz ( period = 27.436 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_28                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.354 ns                 ; 26.790 ns               ;
; -2.423 ns                               ; 36.47 MHz ( period = 27.423 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_11                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 26.801 ns               ;
; -2.415 ns                               ; 36.48 MHz ( period = 27.415 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_6                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.370 ns                 ; 26.785 ns               ;
; -2.374 ns                               ; 36.53 MHz ( period = 27.374 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_14                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 26.752 ns               ;
; -2.364 ns                               ; 36.54 MHz ( period = 27.364 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_13                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 26.742 ns               ;
; -2.349 ns                               ; 36.56 MHz ( period = 27.349 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_8                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 26.720 ns               ;
; -2.330 ns                               ; 36.59 MHz ( period = 27.330 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_23                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.374 ns                 ; 26.704 ns               ;
; -2.315 ns                               ; 36.61 MHz ( period = 27.315 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_5                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.380 ns                 ; 26.695 ns               ;
; -2.300 ns                               ; 36.63 MHz ( period = 27.300 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_2                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 26.678 ns               ;
; -2.281 ns                               ; 36.66 MHz ( period = 27.281 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_20                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.355 ns                 ; 26.636 ns               ;
; -2.242 ns                               ; 36.71 MHz ( period = 27.242 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_9                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.374 ns                 ; 26.616 ns               ;
; -2.223 ns                               ; 36.73 MHz ( period = 27.223 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_17                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.364 ns                 ; 26.587 ns               ;
; -2.219 ns                               ; 36.74 MHz ( period = 27.219 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_24                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.363 ns                 ; 26.582 ns               ;
; -2.213 ns                               ; 33.98 MHz ( period = 29.426 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a6~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram_1|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0 ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.188 ns                 ; 14.401 ns               ;
; -2.186 ns                               ; 34.05 MHz ( period = 29.372 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a5~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram_1|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0 ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.169 ns                 ; 14.355 ns               ;
; -2.152 ns                               ; 36.83 MHz ( period = 27.152 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_22                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.370 ns                 ; 26.522 ns               ;
; -2.149 ns                               ; 36.83 MHz ( period = 27.149 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_21                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.377 ns                 ; 26.526 ns               ;
; -2.101 ns                               ; 36.90 MHz ( period = 27.101 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_18                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.368 ns                 ; 26.469 ns               ;
; -2.097 ns                               ; 36.90 MHz ( period = 27.097 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_Segment_Reg_1                                                                            ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.742 ns                 ; 26.839 ns               ;
; -2.095 ns                               ; 36.91 MHz ( period = 27.095 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_1                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.365 ns                 ; 26.460 ns               ;
; -2.071 ns                               ; 36.94 MHz ( period = 27.071 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_26                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.375 ns                 ; 26.446 ns               ;
; -2.042 ns                               ; 36.98 MHz ( period = 27.042 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_29                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.368 ns                 ; 26.410 ns               ;
; -2.038 ns                               ; 36.98 MHz ( period = 27.038 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a4~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.366 ns                 ; 26.404 ns               ;
; -2.018 ns                               ; 37.01 MHz ( period = 27.018 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a4~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_22                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.368 ns                 ; 26.386 ns               ;
; -2.003 ns                               ; 34.48 MHz ( period = 29.006 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a2~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram_1|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0 ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.176 ns                 ; 14.179 ns               ;
; -1.985 ns                               ; 37.06 MHz ( period = 26.985 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_8                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.379 ns                 ; 26.364 ns               ;
; -1.981 ns                               ; 37.06 MHz ( period = 26.981 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_0                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.364 ns                 ; 26.345 ns               ;
; -1.952 ns                               ; 34.60 MHz ( period = 28.904 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a5~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.172 ns                 ; 14.124 ns               ;
; -1.943 ns                               ; 37.12 MHz ( period = 26.943 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_27                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.362 ns                 ; 26.305 ns               ;
; -1.931 ns                               ; 34.65 MHz ( period = 28.862 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a4~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram_1|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0 ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.177 ns                 ; 14.108 ns               ;
; -1.923 ns                               ; 37.14 MHz ( period = 26.923 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_4                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 26.301 ns               ;
; -1.917 ns                               ; 34.68 MHz ( period = 28.834 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_3                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.256 ns                 ; 14.173 ns               ;
; -1.915 ns                               ; 37.15 MHz ( period = 26.915 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_16                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.365 ns                 ; 26.280 ns               ;
; -1.911 ns                               ; 34.70 MHz ( period = 28.822 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram_1|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0 ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.161 ns                 ; 14.072 ns               ;
; -1.901 ns                               ; 34.72 MHz ( period = 28.802 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a2~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram_1|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0 ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.178 ns                 ; 14.079 ns               ;
; -1.882 ns                               ; 37.20 MHz ( period = 26.882 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_7                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.377 ns                 ; 26.259 ns               ;
; -1.852 ns                               ; 37.24 MHz ( period = 26.852 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_28                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.376 ns                 ; 26.228 ns               ;
; -1.807 ns                               ; 37.30 MHz ( period = 26.807 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_6                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.372 ns                 ; 26.179 ns               ;
; -1.801 ns                               ; 37.31 MHz ( period = 26.801 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_10                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.364 ns                 ; 26.165 ns               ;
; -1.785 ns                               ; 37.33 MHz ( period = 26.785 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_30                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.346 ns                 ; 26.131 ns               ;
; -1.777 ns                               ; 37.35 MHz ( period = 26.777 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_31                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.370 ns                 ; 26.147 ns               ;
; -1.746 ns                               ; 37.39 MHz ( period = 26.746 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_Segment_Reg_0                                                                            ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.742 ns                 ; 26.488 ns               ;
; -1.743 ns                               ; 37.39 MHz ( period = 26.743 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_17                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.367 ns                 ; 26.110 ns               ;
; -1.731 ns                               ; 37.41 MHz ( period = 26.731 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_5                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.402 ns                 ; 26.133 ns               ;
; -1.731 ns                               ; 35.13 MHz ( period = 28.462 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.164 ns                 ; 13.895 ns               ;
; -1.730 ns                               ; 37.41 MHz ( period = 26.730 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_19                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.361 ns                 ; 26.091 ns               ;
; -1.730 ns                               ; 37.41 MHz ( period = 26.730 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_Segment_Reg_1                                                                            ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_22                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.744 ns                 ; 26.474 ns               ;
; -1.725 ns                               ; 37.42 MHz ( period = 26.725 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_12                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.377 ns                 ; 26.102 ns               ;
; -1.722 ns                               ; 37.42 MHz ( period = 26.722 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_23                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.376 ns                 ; 26.098 ns               ;
; -1.697 ns                               ; 37.46 MHz ( period = 26.697 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_20                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.377 ns                 ; 26.074 ns               ;
; -1.692 ns                               ; 37.46 MHz ( period = 26.692 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_2                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.380 ns                 ; 26.072 ns               ;
; -1.679 ns                               ; 37.48 MHz ( period = 26.679 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_7                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 26.050 ns               ;
; -1.656 ns                               ; 37.52 MHz ( period = 26.656 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_15                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.377 ns                 ; 26.033 ns               ;
; -1.615 ns                               ; 37.57 MHz ( period = 26.615 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_17                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.366 ns                 ; 25.981 ns               ;
; -1.611 ns                               ; 37.58 MHz ( period = 26.611 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_24                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.365 ns                 ; 25.976 ns               ;
; -1.607 ns                               ; 37.58 MHz ( period = 26.607 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_23                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.370 ns                 ; 25.977 ns               ;
; -1.604 ns                               ; 37.59 MHz ( period = 26.604 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_24                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.370 ns                 ; 25.974 ns               ;
; -1.582 ns                               ; 37.62 MHz ( period = 26.582 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_3                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.378 ns                 ; 25.960 ns               ;
; -1.569 ns                               ; 37.64 MHz ( period = 26.569 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_1                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.367 ns                 ; 25.936 ns               ;
; -1.552 ns                               ; 37.66 MHz ( period = 26.552 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_21                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.367 ns                 ; 25.919 ns               ;
; -1.547 ns                               ; 37.67 MHz ( period = 26.547 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_14                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.367 ns                 ; 25.914 ns               ;
; -1.541 ns                               ; 37.68 MHz ( period = 26.541 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_21                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.379 ns                 ; 25.920 ns               ;
; -1.539 ns                               ; 37.68 MHz ( period = 26.539 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_11                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 25.910 ns               ;
; -1.538 ns                               ; 37.68 MHz ( period = 26.538 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_16                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.367 ns                 ; 25.905 ns               ;
; -1.522 ns                               ; 37.70 MHz ( period = 26.522 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a2~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_8                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.388 ns                 ; 25.910 ns               ;
; -1.517 ns                               ; 37.71 MHz ( period = 26.517 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_18                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.390 ns                 ; 25.907 ns               ;
; -1.517 ns                               ; 37.71 MHz ( period = 26.517 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_12                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 25.888 ns               ;
; -1.512 ns                               ; 37.72 MHz ( period = 26.512 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_15                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.367 ns                 ; 25.879 ns               ;
; -1.511 ns                               ; 37.72 MHz ( period = 26.511 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_6                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 25.882 ns               ;
; -1.510 ns                               ; 37.72 MHz ( period = 26.510 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_13                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.367 ns                 ; 25.877 ns               ;
; -1.510 ns                               ; 37.72 MHz ( period = 26.510 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 25.881 ns               ;
; -1.507 ns                               ; 37.73 MHz ( period = 26.507 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_31                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.361 ns                 ; 25.868 ns               ;
; -1.498 ns                               ; 37.74 MHz ( period = 26.498 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_10                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 25.869 ns               ;
; -1.498 ns                               ; 37.74 MHz ( period = 26.498 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_9                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 25.869 ns               ;
; -1.494 ns                               ; 37.74 MHz ( period = 26.494 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_3                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 25.865 ns               ;
; -1.486 ns                               ; 37.76 MHz ( period = 26.486 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_11                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.377 ns                 ; 25.863 ns               ;
; -1.470 ns                               ; 37.78 MHz ( period = 26.470 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_4                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 25.841 ns               ;
; -1.467 ns                               ; 37.78 MHz ( period = 26.467 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_2                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 25.838 ns               ;
; -1.437 ns                               ; 37.83 MHz ( period = 26.437 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_14                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.377 ns                 ; 25.814 ns               ;
; -1.434 ns                               ; 37.83 MHz ( period = 26.434 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_29                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.370 ns                 ; 25.804 ns               ;
; -1.427 ns                               ; 37.84 MHz ( period = 26.427 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_13                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.377 ns                 ; 25.804 ns               ;
; -1.427 ns                               ; 35.90 MHz ( period = 27.854 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_MemAddress_17                                                                                 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.233 ns                 ; 13.660 ns               ;
; -1.412 ns                               ; 37.86 MHz ( period = 26.412 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_8                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.370 ns                 ; 25.782 ns               ;
; -1.401 ns                               ; 37.88 MHz ( period = 26.401 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_8                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.401 ns                 ; 25.802 ns               ;
; -1.397 ns                               ; 37.88 MHz ( period = 26.397 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_0                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.386 ns                 ; 25.783 ns               ;
; -1.387 ns                               ; 37.90 MHz ( period = 26.387 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_Segment_Reg_1                                                                            ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_1                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.739 ns                 ; 26.126 ns               ;
; -1.381 ns                               ; 37.91 MHz ( period = 26.381 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_26                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.370 ns                 ; 25.751 ns               ;
; -1.381 ns                               ; 37.91 MHz ( period = 26.381 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_28                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.370 ns                 ; 25.751 ns               ;
; -1.381 ns                               ; 37.91 MHz ( period = 26.381 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_27                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.370 ns                 ; 25.751 ns               ;
; -1.381 ns                               ; 37.91 MHz ( period = 26.381 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_25                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.370 ns                 ; 25.751 ns               ;
; -1.379 ns                               ; 37.91 MHz ( period = 26.379 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_Segment_Reg_0                                                                            ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_22                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.744 ns                 ; 26.123 ns               ;
; -1.377 ns                               ; 36.03 MHz ( period = 27.754 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a4~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.180 ns                 ; 13.557 ns               ;
; -1.375 ns                               ; 37.91 MHz ( period = 26.375 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_22                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.367 ns                 ; 25.742 ns               ;
; -1.350 ns                               ; 37.95 MHz ( period = 26.350 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a4~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_29                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.390 ns                 ; 25.740 ns               ;
; -1.335 ns                               ; 37.97 MHz ( period = 26.335 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_27                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.364 ns                 ; 25.699 ns               ;
; -1.331 ns                               ; 37.98 MHz ( period = 26.331 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_16                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.387 ns                 ; 25.718 ns               ;
; -1.323 ns                               ; 36.17 MHz ( period = 27.646 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a2~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.179 ns                 ; 13.502 ns               ;
; -1.322 ns                               ; 37.99 MHz ( period = 26.322 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_0                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.742 ns                 ; 26.064 ns               ;
; -1.318 ns                               ; 38.00 MHz ( period = 26.318 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_Segment_Reg_1                                                                            ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_2                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.776 ns                 ; 26.094 ns               ;
; -1.315 ns                               ; 38.00 MHz ( period = 26.315 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_4                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.380 ns                 ; 25.695 ns               ;
; -1.305 ns                               ; 38.02 MHz ( period = 26.305 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_9                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.373 ns                 ; 25.678 ns               ;
; -1.286 ns                               ; 36.27 MHz ( period = 27.572 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a2~porta_address_reg0 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.181 ns                 ; 13.467 ns               ;
; -1.283 ns                               ; 36.28 MHz ( period = 27.566 ns )                    ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|AutoRefreshCounter[5]                                                                                                                 ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|ram_1_reg_41                                                                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 12.500 ns                   ; 12.250 ns                 ; 13.533 ns               ;
; -1.274 ns                               ; 38.06 MHz ( period = 26.274 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_7                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.379 ns                 ; 25.653 ns               ;
; -1.256 ns                               ; 38.09 MHz ( period = 26.256 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_1                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.757 ns                 ; 26.013 ns               ;
; -1.235 ns                               ; 38.12 MHz ( period = 26.235 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_Segment_Reg_1                                                                            ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_18                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.764 ns                 ; 25.999 ns               ;
; -1.223 ns                               ; 38.13 MHz ( period = 26.223 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_6                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.394 ns                 ; 25.617 ns               ;
; -1.177 ns                               ; 38.20 MHz ( period = 26.177 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_30                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.348 ns                 ; 25.525 ns               ;
; -1.162 ns                               ; 38.22 MHz ( period = 26.162 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a4~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_21                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.399 ns                 ; 25.561 ns               ;
; -1.158 ns                               ; 38.23 MHz ( period = 26.158 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a4~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_17                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.386 ns                 ; 25.544 ns               ;
; -1.148 ns                               ; 38.24 MHz ( period = 26.148 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a4~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_16                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.385 ns                 ; 25.533 ns               ;
; -1.147 ns                               ; 38.25 MHz ( period = 26.147 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_5                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.371 ns                 ; 25.518 ns               ;
; -1.143 ns                               ; 38.25 MHz ( period = 26.143 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_22                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.373 ns                 ; 25.516 ns               ;
; -1.138 ns                               ; 38.26 MHz ( period = 26.138 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_23                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.398 ns                 ; 25.536 ns               ;
; -1.138 ns                               ; 38.26 MHz ( period = 26.138 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_19                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.365 ns                 ; 25.503 ns               ;
; -1.137 ns                               ; 38.26 MHz ( period = 26.137 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a4~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_1                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.363 ns                 ; 25.500 ns               ;
; -1.137 ns                               ; 38.26 MHz ( period = 26.137 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_20                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.365 ns                 ; 25.502 ns               ;
; -1.134 ns                               ; 38.26 MHz ( period = 26.134 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_26                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.374 ns                 ; 25.508 ns               ;
; -1.128 ns                               ; 38.27 MHz ( period = 26.128 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_30                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.365 ns                 ; 25.493 ns               ;
; -1.122 ns                               ; 38.28 MHz ( period = 26.122 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_19                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.363 ns                 ; 25.485 ns               ;
; -1.121 ns                               ; 38.28 MHz ( period = 26.121 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_0                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.365 ns                 ; 25.486 ns               ;
; -1.121 ns                               ; 38.28 MHz ( period = 26.121 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_29                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.365 ns                 ; 25.486 ns               ;
; -1.117 ns                               ; 38.29 MHz ( period = 26.117 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_12                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.379 ns                 ; 25.496 ns               ;
; -1.108 ns                               ; 38.30 MHz ( period = 26.108 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_2                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.402 ns                 ; 25.510 ns               ;
; -1.054 ns                               ; 38.38 MHz ( period = 26.054 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_8qf2:auto_generated|ram_block1a4~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_8                                                                             ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.392 ns                 ; 25.446 ns               ;
; -1.048 ns                               ; 38.39 MHz ( period = 26.048 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_15                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.379 ns                 ; 25.427 ns               ;
; -1.036 ns                               ; 38.41 MHz ( period = 26.036 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_Segment_Reg_0                                                                            ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_1                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.739 ns                 ; 25.775 ns               ;
; -1.031 ns                               ; 38.42 MHz ( period = 26.031 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_17                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.388 ns                 ; 25.419 ns               ;
; -1.027 ns                               ; 38.42 MHz ( period = 26.027 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_24                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.387 ns                 ; 25.414 ns               ;
; -1.023 ns                               ; 38.43 MHz ( period = 26.023 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_Segment_Reg_1                                                                            ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_5                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.776 ns                 ; 25.799 ns               ;
; -1.007 ns                               ; 38.45 MHz ( period = 26.007 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a6~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.363 ns                 ; 25.370 ns               ;
; -0.994 ns                               ; 38.47 MHz ( period = 25.994 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_0                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_22                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.744 ns                 ; 25.738 ns               ;
; -0.987 ns                               ; 38.48 MHz ( period = 25.987 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a6~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_22                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.365 ns                 ; 25.352 ns               ;
; -0.974 ns                               ; 38.50 MHz ( period = 25.974 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_Segment_Reg_1                                                                            ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_20                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.751 ns                 ; 25.725 ns               ;
; -0.974 ns                               ; 38.50 MHz ( period = 25.974 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3:Memory_MCU_u3_component|altsyncram:altsyncram_component|altsyncram_7qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_3                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.380 ns                 ; 25.354 ns               ;
; -0.967 ns                               ; 38.51 MHz ( period = 25.967 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_Segment_Reg_0                                                                            ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_2                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.776 ns                 ; 25.743 ns               ;
; -0.957 ns                               ; 38.53 MHz ( period = 25.957 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2:Memory_MCU_u2_component|altsyncram:altsyncram_component|altsyncram_6qf2:auto_generated|ram_block1a1~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_21                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.401 ns                 ; 25.358 ns               ;
; -0.950 ns                               ; 38.54 MHz ( period = 25.950 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a2~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_31                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.387 ns                 ; 25.337 ns               ;
; -0.937 ns                               ; 38.55 MHz ( period = 25.937 ns )                    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_0                                                                                        ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_1                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.739 ns                 ; 25.676 ns               ;
; -0.934 ns                               ; 38.56 MHz ( period = 25.934 ns )                    ; Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_PC:ProgramCounter|Reg_PC_18                                                                            ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 25.000 ns                   ; 24.365 ns                 ; 25.299 ns               ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                                                                                                                                                                                                    ;                                                                                                                                                                                    ;                                                                                   ;                                                                                   ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------+---------------------------+-------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'CLK_REF'                                                                                                                                                                                                                                                                                                  ;
+-----------+---------------------------------------------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack     ; Actual fmax (period)                        ; From                                                                    ; To                                                                      ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------+---------------------------------------------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; 45.220 ns ; 209.21 MHz ( period = 4.780 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.540 ns                ;
; 45.293 ns ; 212.45 MHz ( period = 4.707 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.467 ns                ;
; 45.298 ns ; 212.68 MHz ( period = 4.702 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.462 ns                ;
; 45.366 ns ; 215.80 MHz ( period = 4.634 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.394 ns                ;
; 45.367 ns ; 215.84 MHz ( period = 4.633 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.393 ns                ;
; 45.371 ns ; 216.03 MHz ( period = 4.629 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.389 ns                ;
; 45.439 ns ; 219.25 MHz ( period = 4.561 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.321 ns                ;
; 45.440 ns ; 219.30 MHz ( period = 4.560 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.320 ns                ;
; 45.444 ns ; 219.49 MHz ( period = 4.556 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.316 ns                ;
; 45.444 ns ; 219.49 MHz ( period = 4.556 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.316 ns                ;
; 45.444 ns ; 219.49 MHz ( period = 4.556 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.316 ns                ;
; 45.513 ns ; 222.87 MHz ( period = 4.487 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.247 ns                ;
; 45.517 ns ; 223.06 MHz ( period = 4.483 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.243 ns                ;
; 45.517 ns ; 223.06 MHz ( period = 4.483 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.243 ns                ;
; 45.517 ns ; 223.06 MHz ( period = 4.483 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.243 ns                ;
; 45.527 ns ; 223.56 MHz ( period = 4.473 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.233 ns                ;
; 45.586 ns ; 226.55 MHz ( period = 4.414 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.174 ns                ;
; 45.590 ns ; 226.76 MHz ( period = 4.410 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.170 ns                ;
; 45.590 ns ; 226.76 MHz ( period = 4.410 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.170 ns                ;
; 45.600 ns ; 227.27 MHz ( period = 4.400 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.160 ns                ;
; 45.639 ns ; 229.31 MHz ( period = 4.361 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.121 ns                ;
; 45.663 ns ; 230.57 MHz ( period = 4.337 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.097 ns                ;
; 45.663 ns ; 230.57 MHz ( period = 4.337 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.097 ns                ;
; 45.673 ns ; 231.11 MHz ( period = 4.327 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.087 ns                ;
; 45.712 ns ; 233.21 MHz ( period = 4.288 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.048 ns                ;
; 45.734 ns ; 234.41 MHz ( period = 4.266 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.026 ns                ;
; 45.746 ns ; 235.07 MHz ( period = 4.254 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 4.014 ns                ;
; 45.785 ns ; 237.25 MHz ( period = 4.215 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.975 ns                ;
; 45.789 ns ; 237.47 MHz ( period = 4.211 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.971 ns                ;
; 45.807 ns ; 238.49 MHz ( period = 4.193 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.953 ns                ;
; 45.858 ns ; 241.43 MHz ( period = 4.142 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.902 ns                ;
; 45.862 ns ; 241.66 MHz ( period = 4.138 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.898 ns                ;
; 45.867 ns ; 241.95 MHz ( period = 4.133 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.893 ns                ;
; 45.880 ns ; 242.72 MHz ( period = 4.120 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.880 ns                ;
; 45.935 ns ; 246.00 MHz ( period = 4.065 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.825 ns                ;
; 45.936 ns ; 246.06 MHz ( period = 4.064 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.824 ns                ;
; 45.940 ns ; 246.31 MHz ( period = 4.060 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.820 ns                ;
; 45.953 ns ; 247.10 MHz ( period = 4.047 ns )            ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.807 ns                ;
; 46.009 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.751 ns                ;
; 46.013 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.747 ns                ;
; 46.013 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.747 ns                ;
; 46.013 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.747 ns                ;
; 46.082 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.678 ns                ;
; 46.086 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.674 ns                ;
; 46.086 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.674 ns                ;
; 46.096 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.664 ns                ;
; 46.159 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.601 ns                ;
; 46.159 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.601 ns                ;
; 46.169 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.591 ns                ;
; 46.208 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.552 ns                ;
; 46.209 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.551 ns                ;
; 46.242 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.518 ns                ;
; 46.281 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.479 ns                ;
; 46.287 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.473 ns                ;
; 46.303 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.457 ns                ;
; 46.354 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.406 ns                ;
; 46.356 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.404 ns                ;
; 46.376 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.384 ns                ;
; 46.433 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.327 ns                ;
; 46.433 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.327 ns                ;
; 46.449 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.311 ns                ;
; 46.516 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.244 ns                ;
; 46.634 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.126 ns                ;
; 46.712 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.048 ns                ;
; 46.723 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 3.037 ns                ;
; 46.781 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 2.979 ns                ;
; 46.858 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 2.902 ns                ;
; 46.858 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 2.902 ns                ;
; 46.941 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 2.819 ns                ;
; 47.053 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 2.707 ns                ;
; 47.148 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 2.612 ns                ;
; 47.254 ns ; Restricted to 250.0 MHz ( period = 4.0 ns ) ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 50.000 ns                   ; 49.760 ns                 ; 2.506 ns                ;
+-----------+---------------------------------------------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'JTAG_NEXUS_TCK'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                         ;
+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------+----------------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                                                                                                         ; To                                                                                                                                                                               ; From Clock     ; To Clock       ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------+----------------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_8__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_9__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_14__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_15__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_0__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_10__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_1__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_11__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_3__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_5__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_13__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_4__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_12__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_6__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_7__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 150.02 MHz ( period = 6.666 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_2__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.423 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_8__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_9__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_14__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_15__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_0__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_10__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_1__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_11__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_3__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_5__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_13__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_4__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_12__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_6__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_7__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 152.25 MHz ( period = 6.568 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_2__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.325 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_8__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_9__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_14__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_15__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_0__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_10__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_1__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_11__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_3__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_5__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_13__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_4__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_12__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_6__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_7__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 155.16 MHz ( period = 6.445 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_2__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.202 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_8__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_9__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_14__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_15__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_0__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_10__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_1__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_11__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_3__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_5__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_13__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_4__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_12__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_6__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_7__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.49 MHz ( period = 6.390 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_2__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.147 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_24__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_9__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_30__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_31__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_29__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_28__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_26__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_15__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_0__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_13__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_10__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_23__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_19__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_20__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_18__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 156.96 MHz ( period = 6.371 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_16__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.122 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_24__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_25__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_30__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_31__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_26__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_27__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_29__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_28__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_21__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_22__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_23__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_19__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_20__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_18__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_16__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.03 MHz ( period = 6.328 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_17__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.079 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_25__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_8__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_27__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_14__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_1__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_11__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_3__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_5__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_4__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_12__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_6__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_7__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_21__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_22__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_2__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 158.40 MHz ( period = 6.313 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_17__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 6.069 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_24__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_25__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_30__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_31__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_26__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_27__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_29__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_28__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_21__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_22__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_23__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_19__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_20__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_18__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_16__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 160.51 MHz ( period = 6.230 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_17__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.981 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_8__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_9__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_14__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_15__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_0__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_10__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_1__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_11__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_3__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_5__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_13__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_4__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_12__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_6__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_7__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.43 MHz ( period = 6.119 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_2__Z  ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.876 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_24__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_25__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_30__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_31__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_26__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_27__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_29__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_28__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_21__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_22__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_23__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_19__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_20__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_18__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_16__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.75 MHz ( period = 6.107 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_17__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.858 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_24__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_9__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_30__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_31__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_29__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_28__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_26__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_15__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_0__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_13__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_10__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_23__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_19__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_20__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_18__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 163.93 MHz ( period = 6.100 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_16__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.851 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_24__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_25__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_30__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_31__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_26__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_27__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_29__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_28__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_21__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_22__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_23__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_19__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_20__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_18__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_16__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.23 MHz ( period = 6.052 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_2__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_17__Z ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.803 ns                ;
; N/A                                     ; 165.51 MHz ( period = 6.042 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_5__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.798 ns                ;
; N/A                                     ; 165.51 MHz ( period = 6.042 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_4__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.798 ns                ;
; N/A                                     ; 165.51 MHz ( period = 6.042 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_12__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.798 ns                ;
; N/A                                     ; 165.51 MHz ( period = 6.042 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_6__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.798 ns                ;
; N/A                                     ; 165.51 MHz ( period = 6.042 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_7__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.798 ns                ;
; N/A                                     ; 165.51 MHz ( period = 6.042 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_21__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.798 ns                ;
; N/A                                     ; 165.51 MHz ( period = 6.042 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_22__Z         ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.798 ns                ;
; N/A                                     ; 165.51 MHz ( period = 6.042 ns )                    ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|up_ireg_3__Z        ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|RegOut_2__Z          ; JTAG_NEXUS_TCK ; JTAG_NEXUS_TCK ; None                        ; None                      ; 5.798 ns                ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                                                                                                                                                                              ;                                                                                                                                                                                  ;                ;                ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------+----------------+-----------------------------+---------------------------+-------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    ;
+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
; Minimum Slack                           ; From                                                                                                                                                                         ; To                                                                                                                                                                           ; From Clock                                                                        ; To Clock                                                                          ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_31|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_31|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_30|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_30|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_29|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_29|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_28|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_28|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_27|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_27|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_26|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_26|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_25|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_25|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_24|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_24|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_23|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_23|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_22|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_22|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_21|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_21|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_20|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_20|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_19|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_19|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_18|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_18|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_17|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_17|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_16|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_16|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_15|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_15|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_14|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_14|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_13|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_13|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_12|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_12|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_11|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_11|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_10|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_10|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_9|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_9|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_8|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_8|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_7|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_7|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_6|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_6|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_5|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_5|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_4|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_4|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_3|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_3|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_2|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_2|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_1|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_1|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_0|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_0|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_IDCT:IDCT|factorset[2]                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_IDCT:IDCT|factorset[2]                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_IDCT:IDCT|factorset[0]                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_IDCT:IDCT|factorset[0]                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_IDCT:IDCT|factorset[1]                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_IDCT:IDCT|factorset[1]                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[1]                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[1]                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[0]                                                          ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[0]                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[1]                                                          ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[1]                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[0]                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[0]                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|pos                                                                 ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|pos                                                                 ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[11]                                                         ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[11]                                                         ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[11]                                                     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[11]                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[10]                                                     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[10]                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[10]                                                         ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[10]                                                         ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[9]                                                          ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[9]                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[9]                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[9]                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[8]                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[8]                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[8]                                                          ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[8]                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[7]                                                          ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[7]                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[7]                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[7]                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[6]                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[6]                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[6]                                                          ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[6]                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[5]                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[5]                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[5]                                                          ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[5]                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[4]                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[4]                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[4]                                                          ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[4]                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[2]                                                          ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[2]                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[3]                                                          ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|neghelp[3]                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[3]                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[3]                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[2]                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|extendedbuf[2]                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|maxcode[1]                                                                                       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|maxcode[1]                                                                                       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|ctrl_2                                                                                          ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|ctrl_2                                                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|ctrl[3]                                                                                         ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|ctrl[3]                                                                                         ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|ctrl_1                                                                                          ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|ctrl_1                                                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sspisenddevicerequest2|lpm_ff:ff1|dffs[0] ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sspisenddevicerequest2|lpm_ff:ff1|dffs[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspisenddevicerequest2|lpm_ff:ff1|dffs[0]       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspisenddevicerequest2|lpm_ff:ff1|dffs[0]       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedeviceselect1|lpm_ff:ff1|dffs[0]     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedeviceselect1|lpm_ff:ff1|dffs[0]     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[11]                                                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[11]                                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_PWMX:U_NB3000AL_Slideshow_System_BACKLIGHT|pwmxb_w:PWM1|prescale[0]                                                                                                       ; WB_PWMX:U_NB3000AL_Slideshow_System_BACKLIGHT|pwmxb_w:PWM1|prescale[0]                                                                                                       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|state[4]                                                                                         ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|state[4]                                                                                         ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_0                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_0                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspichannelcloseprepare1|lpm_ff:ff1|dffs[0]     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspichannelcloseprepare1|lpm_ff:ff1|dffs[0]     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspisenddevicerequest3|lpm_ff:ff1|dffs[0]       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspisenddevicerequest3|lpm_ff:ff1|dffs[0]       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedeviceselect2|lpm_ff:ff1|dffs[0]     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedeviceselect2|lpm_ff:ff1|dffs[0]     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedevicerequest2|lpm_ff:ff1|dffs[0]    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedevicerequest2|lpm_ff:ff1|dffs[0]    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_6|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_6|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_8|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_8|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_7|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_7|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_9|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_9|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_14|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_14|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_15|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_15|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_16|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_16|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_17|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_17|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_2|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_2|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_5|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_5|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_4|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_4|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_3|lpm_ff:ff1|dffs[0]                     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_3|lpm_ff:ff1|dffs[0]                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_12|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_12|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_13|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_13|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_11|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_11|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_10|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_10|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_25|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_25|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_26|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_26|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_27|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_27|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_24|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_24|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_20|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_20|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_23|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_23|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_22|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_22|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_21|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_21|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_28|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_28|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_29|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_29|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_30|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_30|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_31|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_31|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_18|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_18|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_19|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:WishboneAddress_19|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_19|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_19|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_18|lpm_ff:ff1|dffs[0]                    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_18|lpm_ff:ff1|dffs[0]                    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sspipreparecommand1|lpm_ff:ff1|dffs[0]    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sspipreparecommand1|lpm_ff:ff1|dffs[0]    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[9]                                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[9]                                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[7]                                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[7]                                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[10]                                                                                                       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[10]                                                                                                       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[10]                                                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[10]                                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|ctrl[4]                                                                                         ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|ctrl[4]                                                                                         ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|zerocount[3]                                                                                     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|zerocount[3]                                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|zerocount[0]                                                                                     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|zerocount[0]                                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|zerocount[2]                                                                                     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|zerocount[2]                                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|zerocount[1]                                                                                     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|zerocount[1]                                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|state[3]                                                                                         ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|state[3]                                                                                         ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspichannelcloseprepare2|lpm_ff:ff1|dffs[0]     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspichannelcloseprepare2|lpm_ff:ff1|dffs[0]     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspisenddevicerequest4|lpm_ff:ff1|dffs[0]       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspisenddevicerequest4|lpm_ff:ff1|dffs[0]       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedeviceselect3|lpm_ff:ff1|dffs[0]     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedeviceselect3|lpm_ff:ff1|dffs[0]     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedevicerequest3|lpm_ff:ff1|dffs[0]    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedevicerequest3|lpm_ff:ff1|dffs[0]    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparecommand1|lpm_ff:ff1|dffs[0]          ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparecommand1|lpm_ff:ff1|dffs[0]          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|state_0                                                                                          ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|state_0                                                                                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[8]                                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[8]                                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|state[2]                                                                                         ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|state[2]                                                                                         ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|state[9]                                                                                         ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|state[9]                                                                                         ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[9]                                                                                       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[9]                                                                                       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|skip00                                                              ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|JPGDEC_HUFFDECODE:HUFFDECODE|skip00                                                              ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|ypos[0]                                                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|ypos[0]                                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|ypos[1]                                                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|ypos[1]                                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|bitcount[0]                                                                                     ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|bitcount[0]                                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|bitcount[1]                                                                                     ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|bitcount[1]                                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|state[2]                                                                                        ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|state[2]                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sidle|lpm_ff:ff1|dffs[0]                  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sidle|lpm_ff:ff1|dffs[0]                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|state_i[11]                                                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|state_i[11]                                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DQT:DQT|state[1]                                                                                         ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DQT:DQT|state[1]                                                                                         ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_address[3]                                                                                              ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_address[3]                                                                                              ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_address[2]                                                                                              ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_address[2]                                                                                              ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|QT_ADDR_2                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|QT_ADDR_2                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|QT_ADDR_1                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|QT_ADDR_1                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|QT_ADDR_3                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|QT_ADDR_3                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|state[2]                                                                                         ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|state[2]                                                                                         ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|restart_interval_count[0]                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|restart_interval_count[0]                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_1                                                                               ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_1                                                                               ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_0                                                                               ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_0                                                                               ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_11                                                                              ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_11                                                                              ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_12                                                                              ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_12                                                                              ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_3                                                                               ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_3                                                                               ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_2                                                                               ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_2                                                                               ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|size2maxcode_15_16                                                                               ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|size2maxcode_15_16                                                                               ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|state[10]                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|state[10]                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_IDCT:IDCT|load_state[1]                                                                                  ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_IDCT:IDCT|load_state[1]                                                                                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|ypos[3]                                                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|ypos[3]                                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|ypos[4]                                                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|ypos[4]                                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|ypos[2]                                                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|ypos[2]                                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|bitcount[2]                                                                                     ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|bitcount[2]                                                                                     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|state[1]                                                                                        ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|state[1]                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspichannelcloseprepare3|lpm_ff:ff1|dffs[0]     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspichannelcloseprepare3|lpm_ff:ff1|dffs[0]     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspisenddevicerequest5|lpm_ff:ff1|dffs[0]       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspisenddevicerequest5|lpm_ff:ff1|dffs[0]       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedeviceselect4|lpm_ff:ff1|dffs[0]     ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedeviceselect4|lpm_ff:ff1|dffs[0]     ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedevicerequest4|lpm_ff:ff1|dffs[0]    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparedevicerequest4|lpm_ff:ff1|dffs[0]    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sspisendreceivebyte|lpm_ff:ff1|dffs[0]    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sspisendreceivebyte|lpm_ff:ff1|dffs[0]    ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:MemoryDone|lpm_ff:ff1|dffs[0]                          ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:MemoryDone|lpm_ff:ff1|dffs[0]                          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sspisendcodelocation2|lpm_ff:ff1|dffs[0]  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sspisendcodelocation2|lpm_ff:ff1|dffs[0]  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sspisendcodelocation3|lpm_ff:ff1|dffs[0]  ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fReturnState_sspisendcodelocation3|lpm_ff:ff1|dffs[0]  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparecommand2|lpm_ff:ff1|dffs[0]          ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:fState_sspipreparecommand2|lpm_ff:ff1|dffs[0]          ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[2]                                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[2]                                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[4]                                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[4]                                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[11]                                                                                                       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|state[11]                                                                                                       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[1]                                                                                       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[1]                                                                                       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_address[5]                                                                                              ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_address[5]                                                                                              ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_address[4]                                                                                              ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_address[4]                                                                                              ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|state_16                                                                                         ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|state_16                                                                                         ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|state[14]                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|state[14]                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|QT_ADDR_5                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|QT_ADDR_5                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|QT_ADDR_4                                                                                        ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOS:SOS|QT_ADDR_4                                                                                        ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|compnr[0]                                                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|compnr[0]                                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[8]                                                                                       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[8]                                                                                       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_8                                                                               ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_8                                                                               ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_10                                                                              ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_10                                                                              ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_9                                                                               ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_9                                                                               ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_13                                                                              ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DRI:DRI|restart_interval_13                                                                              ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|size2maxcode_1_16                                                                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|size2maxcode_1_16                                                                                ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|size2maxcode_34_16                                                                               ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|size2maxcode_34_16                                                                               ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|size2maxcode_22_16                                                                               ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_DHT:DHT|size2maxcode_22_16                                                                               ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[7]                                                                                       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|state[7]                                                                                       ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_4                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_4                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_5                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_5                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_8                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_8                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_6                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_6                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_2                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_2                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_1                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_1                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_3                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_3                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_9                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_9                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_11                                                                                  ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_11                                                                                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_10                                                                                  ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_10                                                                                  ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_7                                                                                   ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_SOF0:SOF0|jpg_size_x_7                                                                                   ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|xpos[3]                                                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|xpos[3]                                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; 0.646 ns                                ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|xpos[4]                                                                                      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|JPGDEC_STORE:STORE|xpos[4]                                                                                      ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0] ; 0.000 ns                   ; -0.049 ns                  ; 0.597 ns                 ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu)                                                                                                                          ;                                                                                                                                                                              ;                                                                                   ;                                                                                   ;                            ;                            ;                          ;
+-----------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+-----------------------------------------------------------------------------------+----------------------------+----------------------------+--------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Hold: 'CLK_REF'                                                                                                                                                                                                                                                          ;
+---------------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; Minimum Slack ; From                                                                    ; To                                                                      ; From Clock ; To Clock ; Required Hold Relationship ; Required Shortest P2P Time ; Actual Shortest P2P Time ;
+---------------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+
; 0.884 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 0.835 ns                 ;
; 1.074 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.025 ns                 ;
; 1.090 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.041 ns                 ;
; 1.097 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.048 ns                 ;
; 1.100 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.051 ns                 ;
; 1.101 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.052 ns                 ;
; 1.231 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.182 ns                 ;
; 1.236 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.187 ns                 ;
; 1.247 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.198 ns                 ;
; 1.250 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.201 ns                 ;
; 1.253 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.204 ns                 ;
; 1.260 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.211 ns                 ;
; 1.285 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.236 ns                 ;
; 1.514 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.465 ns                 ;
; 1.683 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.634 ns                 ;
; 1.689 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.640 ns                 ;
; 1.773 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.724 ns                 ;
; 1.784 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.735 ns                 ;
; 1.786 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.737 ns                 ;
; 1.846 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.797 ns                 ;
; 1.857 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.808 ns                 ;
; 1.859 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.810 ns                 ;
; 1.914 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.865 ns                 ;
; 1.925 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.876 ns                 ;
; 1.930 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.881 ns                 ;
; 1.930 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.881 ns                 ;
; 1.937 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.888 ns                 ;
; 1.938 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.889 ns                 ;
; 1.938 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.889 ns                 ;
; 1.970 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.921 ns                 ;
; 1.971 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.922 ns                 ;
; 1.998 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.949 ns                 ;
; 2.011 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.962 ns                 ;
; 2.043 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.994 ns                 ;
; 2.044 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 1.995 ns                 ;
; 2.071 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.022 ns                 ;
; 2.116 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.067 ns                 ;
; 2.117 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.068 ns                 ;
; 2.190 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.141 ns                 ;
; 2.201 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.152 ns                 ;
; 2.247 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.198 ns                 ;
; 2.274 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.225 ns                 ;
; 2.366 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.317 ns                 ;
; 2.396 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.347 ns                 ;
; 2.555 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.506 ns                 ;
; 2.645 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.596 ns                 ;
; 2.661 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.612 ns                 ;
; 2.669 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|reset          ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.620 ns                 ;
; 2.756 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.707 ns                 ;
; 2.868 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.819 ns                 ;
; 2.951 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.902 ns                 ;
; 2.951 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.902 ns                 ;
; 3.028 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 2.979 ns                 ;
; 3.175 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[0] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.126 ns                 ;
; 3.360 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.311 ns                 ;
; 3.433 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.384 ns                 ;
; 3.455 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.406 ns                 ;
; 3.528 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.479 ns                 ;
; 3.567 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.518 ns                 ;
; 3.601 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.552 ns                 ;
; 3.640 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.591 ns                 ;
; 3.650 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.601 ns                 ;
; 3.727 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[2] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.678 ns                 ;
; 3.856 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.807 ns                 ;
; 3.929 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.880 ns                 ;
; 3.951 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.902 ns                 ;
; 4.024 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 3.975 ns                 ;
; 4.063 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 4.014 ns                 ;
; 4.097 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 4.048 ns                 ;
; 4.136 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 4.087 ns                 ;
; 4.146 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[4] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 4.097 ns                 ;
; 4.223 ns      ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[3] ; FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1] ; CLK_REF    ; CLK_REF  ; 0.000 ns                   ; -0.049 ns                  ; 4.174 ns                 ;
+---------------+-------------------------------------------------------------------------+-------------------------------------------------------------------------+------------+----------+----------------------------+----------------------------+--------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tsu                                                                                                                                                                                                                                                                                              ;
+-----------------------------------------+-----------------------------------------------------+------------+-------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+----------+
; Slack                                   ; Required tsu                                        ; Actual tsu ; From        ; To                                                                                                                                                         ; To Clock ;
+-----------------------------------------+-----------------------------------------------------+------------+-------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+----------+
; N/A                                     ; None                                                ; 19.218 ns  ; TEST_BUTTON ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_read_ack|lpm_ff:ff1|dffs[0]     ; CLK_REF  ;
; N/A                                     ; None                                                ; 17.774 ns  ; TEST_BUTTON ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0] ; CLK_REF  ;
; N/A                                     ; None                                                ; 17.660 ns  ; TEST_BUTTON ; Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_2|lpm_ff:ff1|dffs[0]      ; CLK_REF  ;
; N/A                                     ; None                                                ; 17.578 ns  ; TEST_BUTTON ; Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_1|lpm_ff:ff1|dffs[0]      ; CLK_REF  ;
; N/A                                     ; None                                                ; 17.463 ns  ; TEST_BUTTON ; Configurable_MULTIMASTER_SHARED:U_NB3000AL_Slideshow_System_MULTIMASTER_SHARED|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_2|lpm_ff:ff1|dffs[0]  ; CLK_REF  ;
; N/A                                     ; None                                                ; 17.252 ns  ; TEST_BUTTON ; Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_3|lpm_ff:ff1|dffs[0]      ; CLK_REF  ;
; N/A                                     ; None                                                ; 17.115 ns  ; TEST_BUTTON ; Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_0|lpm_ff:ff1|dffs[0]      ; CLK_REF  ;
; N/A                                     ; None                                                ; 16.915 ns  ; TEST_BUTTON ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:Timer_0|lpm_ff:ff1|dffs[0]                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 16.837 ns  ; TEST_BUTTON ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_read_ack|lpm_ff:ff1|dffs[0]                 ; CLK_REF  ;
; N/A                                     ; None                                                ; 16.764 ns  ; TEST_BUTTON ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]                ; CLK_REF  ;
; N/A                                     ; None                                                ; 16.732 ns  ; TEST_BUTTON ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:Timer_1|lpm_ff:ff1|dffs[0]                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 16.671 ns  ; TEST_BUTTON ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]  ; CLK_REF  ;
; N/A                                     ; None                                                ; 16.450 ns  ; TEST_BUTTON ; Configurable_MULTIMASTER_SHARED:U_NB3000AL_Slideshow_System_MULTIMASTER_SHARED|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_0|lpm_ff:ff1|dffs[0]  ; CLK_REF  ;
; N/A                                     ; None                                                ; 16.435 ns  ; TEST_BUTTON ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]    ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.997 ns  ; TEST_BUTTON ; Configurable_MULTIMASTER_SHARED:U_NB3000AL_Slideshow_System_MULTIMASTER_SHARED|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_1|lpm_ff:ff1|dffs[0]  ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.656 ns  ; TEST_BUTTON ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]              ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.654 ns  ; TEST_BUTTON ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]             ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.383 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[16]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.382 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[20]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.321 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[21]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.320 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[22]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.319 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[6]                                                                              ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.273 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[27]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.252 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[29]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.116 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[28]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 15.077 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[25]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.921 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_17                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.766 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_8                                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.758 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[30]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.717 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[31]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_24                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_25                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_23                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_30                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_29                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_28                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_26                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_22                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_27                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_20                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_16                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_21                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.702 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_18                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.682 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[29]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.682 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[15]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.681 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[28]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.657 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[7]                                                                              ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.625 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[8]                                                                              ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.625 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[10]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.620 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[13]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.618 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[31]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.596 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[11]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.577 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[12]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.573 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_10                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.553 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[23]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.550 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[1]                                                                              ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.548 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[18]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.546 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[19]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.506 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[17]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.502 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[14]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.485 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[25]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.470 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[9]                                                                              ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.469 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[24]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.459 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[2]                                                                              ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.451 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[26]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.409 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[30]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.379 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_0                                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.379 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_1                                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.308 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[0]                                                                              ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.308 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[4]                                                                              ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.308 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[27]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.307 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[3]                                                                              ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.307 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[5]                                                                              ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.300 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_startaddress_word[5]                                                                 ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.232 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[22]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.223 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[19]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.173 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[20]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.158 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[16]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.129 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[17]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.110 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[23]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.089 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_31                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.089 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_19                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.056 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[21]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 14.005 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[24]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.935 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[26]                                                                             ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.933 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_4                                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.933 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_2                                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.933 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_6                                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.929 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[14]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.860 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[12]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.842 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_x[11]                                                                               ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.830 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[18]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.773 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_linewidth[9]                                                                         ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.671 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|intmask[1]                                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.644 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_offset_word[25]                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.538 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[15]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.523 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[13]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.521 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_linewidth[1]                                                                         ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.520 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[1]                                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.397 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_endaddress_word[25]                                                                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.389 ns  ; TEST_BUTTON ; Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsyncEn:DecodeAddr_0|lpm_ff:ff1|dffs[0]       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.389 ns  ; TEST_BUTTON ; Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsyncEn:DecodeAddr_1|lpm_ff:ff1|dffs[0]       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.374 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|intmask[3]                                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.374 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|intmask[0]                                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.358 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_15                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.358 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_7                                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.358 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_12                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.358 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_11                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.358 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_9                                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.358 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_3                                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.358 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_5                                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.358 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_13                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.358 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|DAT_O_14                                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.325 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|intmask[5]                                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.325 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|intmask[2]                                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.257 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[6]                                                                           ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.209 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[5]                                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.186 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[8]                                                                           ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.166 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[10]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.128 ns  ; TEST_BUTTON ; Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsyncEn:DecodeAddr_3|lpm_ff:ff1|dffs[0]       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.128 ns  ; TEST_BUTTON ; Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsyncEn:DecodeAddr_2|lpm_ff:ff1|dffs[0]       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.128 ns  ; TEST_BUTTON ; Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsyncEn:DecodeAddr_7|lpm_ff:ff1|dffs[0]       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.128 ns  ; TEST_BUTTON ; Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsyncEn:DecodeAddr_6|lpm_ff:ff1|dffs[0]       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.128 ns  ; TEST_BUTTON ; Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsyncEn:DecodeAddr_5|lpm_ff:ff1|dffs[0]       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.128 ns  ; TEST_BUTTON ; Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsyncEn:DecodeAddr_4|lpm_ff:ff1|dffs[0]       ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.126 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|intmask[8]                                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.112 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_offset_word[26]                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.111 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|SPI_DOUT                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.063 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|intmask[7]                                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.063 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|intmask[6]                                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.010 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_y[8]                                                                                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.001 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[11]                                                                               ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[15]                                                                                 ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[14]                                                                                 ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[13]                                                                                 ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[10]                                                                                 ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[11]                                                                                 ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[9]                                                                                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[12]                                                                                 ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[3]                                                                                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[1]                                                                                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[2]                                                                                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[8]                                                                                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[5]                                                                                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 13.000 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[4]                                                                                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.976 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_linewidth[2]                                                                         ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.965 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[5]                                                                           ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.961 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_linewidth[5]                                                                         ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.919 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[4]                                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.904 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_x[7]                                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.874 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_offset_word[3]                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.871 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_offset_word[17]                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.869 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[8]                                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.866 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_offset_word[13]                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.866 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_offset_word[8]                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.866 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_offset_word[11]                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.866 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_offset_word[7]                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.866 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_offset_word[9]                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.866 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_offset_word[10]                                                                      ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.866 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_offset_word[6]                                                                       ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.837 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_x[10]                                                                               ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.828 ns  ; TEST_BUTTON ; Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:Bad_Decode|lpm_ff:ff1|dffs[0]           ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.821 ns  ; TEST_BUTTON ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg[11]                                                                          ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.797 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_startaddress_word[25]                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.797 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_startaddress_word[22]                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.792 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[6]                                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.784 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_startaddress_word[21]                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.784 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_startaddress_word[20]                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.784 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_startaddress_word[15]                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.784 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_startaddress_word[12]                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.784 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[0]                                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.784 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[2]                                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[28]                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[4]                                                                     ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[12]                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[29]                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[3]                                                                     ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[27]                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[10]                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[2]                                                                     ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[26]                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[5]                                                                     ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[13]                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[30]                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[6]                                                                     ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[11]                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.769 ns  ; TEST_BUTTON ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[31]                                                                    ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.740 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_startaddress_word[14]                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.731 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_linewidth[11]                                                                        ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.728 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[15]                                                                               ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.728 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[14]                                                                               ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.728 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[13]                                                                               ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.728 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[12]                                                                               ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.728 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[10]                                                                               ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.728 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[9]                                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.728 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[7]                                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.728 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_start_y[3]                                                                                ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.723 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memwrite_endaddress_word[15]                                                                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.704 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[7]                                                                                  ; CLK_REF  ;
; N/A                                     ; None                                                ; 12.704 ns  ; TEST_BUTTON ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|jpg_end_x[6]                                                                                  ; CLK_REF  ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;            ;             ;                                                                                                                                                            ;          ;
+-----------------------------------------+-----------------------------------------------------+------------+-------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+----------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tco                                                                                                                                                                                                                                                      ;
+-----------------------------------------+-----------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------+-------------+-------------+
; Slack                                   ; Required tco                                        ; Actual tco ; From                                                                                                            ; To          ; From Clock  ;
+-----------------------------------------+-----------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------+-------------+-------------+
; N/A                                     ; None                                                ; 31.113 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 30.535 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 30.429 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 30.265 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 30.204 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.991 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_D[12] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.846 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.836 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.803 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.789 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.691 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM1_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.686 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_RAM_NCS ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.647 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM1_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.626 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.525 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM1_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.520 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.413 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_D[12] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.374 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.374 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[6]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.373 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.363 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[10] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.356 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.352 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.344 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.307 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_D[12] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.280 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_NBE[3]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.268 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.258 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.225 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.211 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.162 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.152 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.150 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_NBE[0]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.143 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM0_D[12] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.124 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_E     ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.119 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.108 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; BUS_RAM_NCS ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.105 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 29.002 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; BUS_RAM_NCS ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.998 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM0_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.988 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.955 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM0_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.941 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM0_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.904 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_D[1]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.884 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[4]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.884 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[1]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.838 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; BUS_RAM_NCS ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.796 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.796 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[6]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.795 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.785 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[10] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.782 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM1_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.774 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.766 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.738 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM1_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.702 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; BUS_NBE[3]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.696 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[2]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.690 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.690 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[6]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.689 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.679 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[10] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.668 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.666 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_D[10] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.666 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_D[4]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.660 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.646 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[3]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.616 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM1_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.596 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; BUS_NBE[3]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.587 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_NBE[2]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.582 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_LB    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.572 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; BUS_NBE[0]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.569 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM0_D[12] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.546 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_E     ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.542 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_UB    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.526 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.526 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_D[6]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.525 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM0_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.525 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM0_D[12] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.515 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_D[10] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.504 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.496 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM0_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.466 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; BUS_NBE[0]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.441 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[24]                          ; SRAM1_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.440 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_E     ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.432 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; BUS_NBE[3]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.424 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM0_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.414 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM1_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.403 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM0_D[12] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.390 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[14] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.385 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_E     ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.381 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM0_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.380 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM0_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.380 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[13] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.370 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM1_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.369 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_OE    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.369 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_NOE     ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.367 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM0_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.348 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_NBE[1]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.337 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM0_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.326 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_D[1]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.323 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM0_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.311 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_UB    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.306 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[4]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.306 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[1]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.302 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; BUS_NBE[0]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.276 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_E     ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.264 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; BUS_RAM_NCS ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.258 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM0_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.248 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM1_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.220 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_D[1]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.220 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; BUS_RAM_NCS ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.215 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM0_D[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.201 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM0_D[8]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.200 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[4]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.200 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[1]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.197 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[9]                           ; SRAM0_A[7]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.118 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[2]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.088 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_D[10] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.088 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_D[4]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.085 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_D[2]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.072 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; BUS_RAM_NCS ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.068 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[3]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.056 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM0_D[1]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.036 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_D[4]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.036 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_D[1]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.012 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[2]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.009 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; BUS_NBE[2]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 28.004 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_LB    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.990 ns  ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Rd_Index_3 ; SRAM1_D[7]  ; CLK_REF     ;
; N/A                                     ; None                                                ; 27.982 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_D[10] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.982 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_D[4]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.964 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_UB    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.962 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[3]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.956 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[24]   ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.952 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM1_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.952 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM1_D[6]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.951 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM0_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.941 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM1_D[10] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.940 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[7]    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.930 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM1_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.922 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM0_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.918 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_LB    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.917 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[5]    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.908 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM1_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.908 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM1_D[6]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.907 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM0_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.905 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[25]   ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.903 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; BUS_NBE[2]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.898 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_LB    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.897 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM1_D[10] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.886 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM1_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.884 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[23]   ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.881 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[4]    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.878 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; SRAM0_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.874 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[22]   ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.871 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[16]   ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.858 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_UB    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.858 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; BUS_NBE[3]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.854 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[6]    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.849 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[17]   ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.848 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_D[2]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.841 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[12]   ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.839 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[29]   ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.833 ns  ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_1     ; SRAM1_D[7]  ; CLK_REF     ;
; N/A                                     ; None                                                ; 27.818 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM0_D[10] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.818 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM0_D[4]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.814 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[27]   ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.814 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]                          ; BUS_NBE[3]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.812 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[14] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.811 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[20]   ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.810 ns  ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_10    ; SRAM1_D[7]  ; CLK_REF     ;
; N/A                                     ; None                                                ; 27.807 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_E     ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.802 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_D[13] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.798 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_D[3]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.791 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM0_OE    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.791 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; BUS_NOE     ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.788 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM0_D[13] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.786 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM1_D[9]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.786 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM1_D[6]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.785 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM0_D[11] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.780 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[9]    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.778 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[12] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.775 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM1_D[10] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.770 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; BUS_D[19]   ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.770 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; BUS_NBE[1]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.764 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM1_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.756 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]                          ; SRAM0_D[5]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.752 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[0]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.739 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; BUS_NBE[2]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.734 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM1_LB    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.733 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]                          ; SRAM1_UB    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.728 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; BUS_NBE[0]  ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.706 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[14] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.705 ns  ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_2     ; SRAM1_D[7]  ; CLK_REF     ;
; N/A                                     ; None                                                ; 27.702 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]                          ; SRAM1_E     ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.701 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_E     ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.696 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM1_D[13] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.694 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]                          ; SRAM1_D[15] ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.694 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]                          ; SRAM0_UB    ; TEST_BUTTON ;
; N/A                                     ; None                                                ; 27.685 ns  ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]                          ; SRAM0_OE    ; TEST_BUTTON ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;            ;                                                                                                                 ;             ;             ;
+-----------------------------------------+-----------------------------------------------------+------------+-----------------------------------------------------------------------------------------------------------------+-------------+-------------+


+-------------------------------------------------------------------------+
; tpd                                                                     ;
+-------+-------------------+-----------------+-------------+-------------+
; Slack ; Required P2P Time ; Actual P2P Time ; From        ; To          ;
+-------+-------------------+-----------------+-------------+-------------+
; N/A   ; None              ; 26.331 ns       ; TEST_BUTTON ; SRAM1_D[7]  ;
; N/A   ; None              ; 25.422 ns       ; TEST_BUTTON ; SRAM1_D[11] ;
; N/A   ; None              ; 25.209 ns       ; TEST_BUTTON ; SRAM0_D[12] ;
; N/A   ; None              ; 25.064 ns       ; TEST_BUTTON ; SRAM0_D[9]  ;
; N/A   ; None              ; 25.054 ns       ; TEST_BUTTON ; SRAM1_D[8]  ;
; N/A   ; None              ; 25.021 ns       ; TEST_BUTTON ; SRAM0_D[7]  ;
; N/A   ; None              ; 25.007 ns       ; TEST_BUTTON ; SRAM0_D[8]  ;
; N/A   ; None              ; 24.904 ns       ; TEST_BUTTON ; BUS_RAM_NCS ;
; N/A   ; None              ; 24.592 ns       ; TEST_BUTTON ; SRAM1_D[9]  ;
; N/A   ; None              ; 24.592 ns       ; TEST_BUTTON ; SRAM1_D[6]  ;
; N/A   ; None              ; 24.591 ns       ; TEST_BUTTON ; SRAM0_D[11] ;
; N/A   ; None              ; 24.581 ns       ; TEST_BUTTON ; SRAM1_D[10] ;
; N/A   ; None              ; 24.570 ns       ; TEST_BUTTON ; SRAM1_D[5]  ;
; N/A   ; None              ; 24.562 ns       ; TEST_BUTTON ; SRAM0_D[5]  ;
; N/A   ; None              ; 24.498 ns       ; TEST_BUTTON ; BUS_NBE[3]  ;
; N/A   ; None              ; 24.368 ns       ; TEST_BUTTON ; BUS_NBE[0]  ;
; N/A   ; None              ; 24.342 ns       ; TEST_BUTTON ; SRAM1_E     ;
; N/A   ; None              ; 24.122 ns       ; TEST_BUTTON ; SRAM0_D[1]  ;
; N/A   ; None              ; 24.102 ns       ; TEST_BUTTON ; SRAM1_D[4]  ;
; N/A   ; None              ; 24.102 ns       ; TEST_BUTTON ; SRAM1_D[1]  ;
; N/A   ; None              ; 23.914 ns       ; TEST_BUTTON ; SRAM1_D[2]  ;
; N/A   ; None              ; 23.884 ns       ; TEST_BUTTON ; SRAM0_D[10] ;
; N/A   ; None              ; 23.884 ns       ; TEST_BUTTON ; SRAM0_D[4]  ;
; N/A   ; None              ; 23.864 ns       ; TEST_BUTTON ; SRAM1_D[3]  ;
; N/A   ; None              ; 23.805 ns       ; TEST_BUTTON ; BUS_NBE[2]  ;
; N/A   ; None              ; 23.800 ns       ; TEST_BUTTON ; SRAM1_LB    ;
; N/A   ; None              ; 23.760 ns       ; TEST_BUTTON ; SRAM0_UB    ;
; N/A   ; None              ; 23.608 ns       ; TEST_BUTTON ; SRAM1_D[14] ;
; N/A   ; None              ; 23.603 ns       ; TEST_BUTTON ; SRAM0_E     ;
; N/A   ; None              ; 23.598 ns       ; TEST_BUTTON ; SRAM1_D[13] ;
; N/A   ; None              ; 23.587 ns       ; TEST_BUTTON ; SRAM0_OE    ;
; N/A   ; None              ; 23.587 ns       ; TEST_BUTTON ; BUS_NOE     ;
; N/A   ; None              ; 23.566 ns       ; TEST_BUTTON ; BUS_NBE[1]  ;
; N/A   ; None              ; 23.529 ns       ; TEST_BUTTON ; SRAM1_UB    ;
; N/A   ; None              ; 23.303 ns       ; TEST_BUTTON ; SRAM0_D[2]  ;
; N/A   ; None              ; 23.174 ns       ; TEST_BUTTON ; BUS_D[24]   ;
; N/A   ; None              ; 23.158 ns       ; TEST_BUTTON ; BUS_D[7]    ;
; N/A   ; None              ; 23.136 ns       ; TEST_BUTTON ; SRAM0_LB    ;
; N/A   ; None              ; 23.135 ns       ; TEST_BUTTON ; BUS_D[5]    ;
; N/A   ; None              ; 23.123 ns       ; TEST_BUTTON ; BUS_D[25]   ;
; N/A   ; None              ; 23.102 ns       ; TEST_BUTTON ; BUS_D[23]   ;
; N/A   ; None              ; 23.099 ns       ; TEST_BUTTON ; BUS_D[4]    ;
; N/A   ; None              ; 23.092 ns       ; TEST_BUTTON ; BUS_D[22]   ;
; N/A   ; None              ; 23.089 ns       ; TEST_BUTTON ; BUS_D[16]   ;
; N/A   ; None              ; 23.072 ns       ; TEST_BUTTON ; BUS_D[6]    ;
; N/A   ; None              ; 23.067 ns       ; TEST_BUTTON ; BUS_D[17]   ;
; N/A   ; None              ; 23.059 ns       ; TEST_BUTTON ; BUS_D[12]   ;
; N/A   ; None              ; 23.057 ns       ; TEST_BUTTON ; BUS_D[29]   ;
; N/A   ; None              ; 23.032 ns       ; TEST_BUTTON ; BUS_D[27]   ;
; N/A   ; None              ; 23.029 ns       ; TEST_BUTTON ; BUS_D[20]   ;
; N/A   ; None              ; 23.006 ns       ; TEST_BUTTON ; SRAM0_D[13] ;
; N/A   ; None              ; 22.998 ns       ; TEST_BUTTON ; BUS_D[9]    ;
; N/A   ; None              ; 22.996 ns       ; TEST_BUTTON ; SRAM1_D[12] ;
; N/A   ; None              ; 22.988 ns       ; TEST_BUTTON ; BUS_D[19]   ;
; N/A   ; None              ; 22.970 ns       ; TEST_BUTTON ; SRAM1_D[0]  ;
; N/A   ; None              ; 22.912 ns       ; TEST_BUTTON ; SRAM1_D[15] ;
; N/A   ; None              ; 22.794 ns       ; TEST_BUTTON ; BUS_D[8]    ;
; N/A   ; None              ; 22.698 ns       ; TEST_BUTTON ; BUS_D[1]    ;
; N/A   ; None              ; 22.691 ns       ; TEST_BUTTON ; BUS_D[21]   ;
; N/A   ; None              ; 22.688 ns       ; TEST_BUTTON ; BUS_D[30]   ;
; N/A   ; None              ; 22.668 ns       ; TEST_BUTTON ; BUS_D[13]   ;
; N/A   ; None              ; 22.668 ns       ; TEST_BUTTON ; SRAM0_D[14] ;
; N/A   ; None              ; 22.661 ns       ; TEST_BUTTON ; BUS_D[18]   ;
; N/A   ; None              ; 22.648 ns       ; TEST_BUTTON ; SRAM0_D[15] ;
; N/A   ; None              ; 22.641 ns       ; TEST_BUTTON ; SRAM0_D[3]  ;
; N/A   ; None              ; 22.641 ns       ; TEST_BUTTON ; BUS_D[28]   ;
; N/A   ; None              ; 22.633 ns       ; TEST_BUTTON ; BUS_D[3]    ;
; N/A   ; None              ; 22.627 ns       ; TEST_BUTTON ; BUS_D[11]   ;
; N/A   ; None              ; 22.623 ns       ; TEST_BUTTON ; BUS_D[10]   ;
; N/A   ; None              ; 22.623 ns       ; TEST_BUTTON ; BUS_D[26]   ;
; N/A   ; None              ; 22.339 ns       ; TEST_BUTTON ; BUS_D[14]   ;
; N/A   ; None              ; 22.339 ns       ; TEST_BUTTON ; BUS_D[2]    ;
; N/A   ; None              ; 22.330 ns       ; TEST_BUTTON ; BUS_D[0]    ;
; N/A   ; None              ; 22.319 ns       ; TEST_BUTTON ; BUS_D[15]   ;
; N/A   ; None              ; 22.318 ns       ; TEST_BUTTON ; SRAM0_D[0]  ;
; N/A   ; None              ; 22.309 ns       ; TEST_BUTTON ; BUS_D[31]   ;
; N/A   ; None              ; 22.217 ns       ; TEST_BUTTON ; SRAM1_OE    ;
; N/A   ; None              ; 22.191 ns       ; TEST_BUTTON ; SRAM0_D[6]  ;
; N/A   ; None              ; 22.130 ns       ; TEST_BUTTON ; SRAM0_A[7]  ;
; N/A   ; None              ; 21.510 ns       ; TEST_BUTTON ; BUS_A[17]   ;
; N/A   ; None              ; 20.539 ns       ; TEST_BUTTON ; SRAM0_A[17] ;
; N/A   ; None              ; 20.371 ns       ; TEST_BUTTON ; SRAM0_A[14] ;
; N/A   ; None              ; 20.095 ns       ; TEST_BUTTON ; SRAM1_A[6]  ;
; N/A   ; None              ; 20.001 ns       ; TEST_BUTTON ; BUS_A[12]   ;
; N/A   ; None              ; 19.979 ns       ; TEST_BUTTON ; SRAM0_A[9]  ;
; N/A   ; None              ; 19.657 ns       ; TEST_BUTTON ; SRAM1_A[1]  ;
; N/A   ; None              ; 19.346 ns       ; TEST_BUTTON ; BUS_A[16]   ;
; N/A   ; None              ; 19.180 ns       ; TEST_BUTTON ; SRAM0_A[3]  ;
; N/A   ; None              ; 19.034 ns       ; TEST_BUTTON ; SRAM0_A[10] ;
; N/A   ; None              ; 19.032 ns       ; TEST_BUTTON ; SRAM1_A[17] ;
; N/A   ; None              ; 18.992 ns       ; TEST_BUTTON ; SRAM0_A[8]  ;
; N/A   ; None              ; 18.984 ns       ; TEST_BUTTON ; SRAM1_A[8]  ;
; N/A   ; None              ; 18.888 ns       ; TEST_BUTTON ; SRAM1_A[9]  ;
; N/A   ; None              ; 18.761 ns       ; TEST_BUTTON ; BUS_A[8]    ;
; N/A   ; None              ; 18.746 ns       ; TEST_BUTTON ; BUS_A[10]   ;
; N/A   ; None              ; 18.592 ns       ; TEST_BUTTON ; TFT_RESET   ;
; N/A   ; None              ; 18.548 ns       ; TEST_BUTTON ; BUS_A[19]   ;
; N/A   ; None              ; 18.493 ns       ; TEST_BUTTON ; SRAM0_A[16] ;
; N/A   ; None              ; 18.492 ns       ; TEST_BUTTON ; SRAM0_A[6]  ;
; N/A   ; None              ; 18.417 ns       ; TEST_BUTTON ; BUS_A[4]    ;
; N/A   ; None              ; 18.392 ns       ; TEST_BUTTON ; SRAM1_A[10] ;
; N/A   ; None              ; 18.273 ns       ; TEST_BUTTON ; SRAM1_A[3]  ;
; N/A   ; None              ; 18.108 ns       ; TEST_BUTTON ; SRAM0_A[0]  ;
; N/A   ; None              ; 18.102 ns       ; TEST_BUTTON ; SRAM1_A[16] ;
; N/A   ; None              ; 18.101 ns       ; TEST_BUTTON ; BUS_A[13]   ;
; N/A   ; None              ; 18.082 ns       ; TEST_BUTTON ; SRAM0_A[15] ;
; N/A   ; None              ; 18.079 ns       ; TEST_BUTTON ; SRAM0_A[11] ;
; N/A   ; None              ; 18.069 ns       ; TEST_BUTTON ; SRAM1_A[14] ;
; N/A   ; None              ; 18.067 ns       ; TEST_BUTTON ; BUS_A[2]    ;
; N/A   ; None              ; 18.030 ns       ; TEST_BUTTON ; SRAM1_A[13] ;
; N/A   ; None              ; 17.892 ns       ; TEST_BUTTON ; BUS_A[18]   ;
; N/A   ; None              ; 17.750 ns       ; TEST_BUTTON ; SRAM0_A[5]  ;
; N/A   ; None              ; 17.737 ns       ; TEST_BUTTON ; BUS_A[14]   ;
; N/A   ; None              ; 17.733 ns       ; TEST_BUTTON ; SRAM0_A[1]  ;
; N/A   ; None              ; 17.711 ns       ; TEST_BUTTON ; BUS_A[3]    ;
; N/A   ; None              ; 17.699 ns       ; TEST_BUTTON ; SRAM0_A[12] ;
; N/A   ; None              ; 17.671 ns       ; TEST_BUTTON ; SRAM1_A[11] ;
; N/A   ; None              ; 17.670 ns       ; TEST_BUTTON ; SRAM1_A[0]  ;
; N/A   ; None              ; 17.575 ns       ; TEST_BUTTON ; SRAM0_A[13] ;
; N/A   ; None              ; 17.544 ns       ; TEST_BUTTON ; BUS_A[9]    ;
; N/A   ; None              ; 17.529 ns       ; TEST_BUTTON ; BUS_A[5]    ;
; N/A   ; None              ; 17.511 ns       ; TEST_BUTTON ; BUS_A[11]   ;
; N/A   ; None              ; 17.506 ns       ; TEST_BUTTON ; SRAM1_A[2]  ;
; N/A   ; None              ; 17.467 ns       ; TEST_BUTTON ; SRAM0_A[2]  ;
; N/A   ; None              ; 17.353 ns       ; TEST_BUTTON ; SRAM1_A[5]  ;
; N/A   ; None              ; 17.342 ns       ; TEST_BUTTON ; BUS_A[7]    ;
; N/A   ; None              ; 17.292 ns       ; TEST_BUTTON ; SRAM1_A[15] ;
; N/A   ; None              ; 17.252 ns       ; TEST_BUTTON ; BUS_A[6]    ;
; N/A   ; None              ; 17.158 ns       ; TEST_BUTTON ; BUS_A[15]   ;
; N/A   ; None              ; 17.011 ns       ; TEST_BUTTON ; SRAM1_A[12] ;
; N/A   ; None              ; 16.565 ns       ; TEST_BUTTON ; SRAM1_A[7]  ;
; N/A   ; None              ; 16.480 ns       ; TEST_BUTTON ; SRAM1_A[4]  ;
; N/A   ; None              ; 16.169 ns       ; TEST_BUTTON ; SRAM0_A[4]  ;
+-------+-------------------+-----------------+-------------+-------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; th                                                                                                                                                                                                                                                                                                                                    ;
+-----------------------------------------+-----------------------------------------------------+-----------+----------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------+
; Minimum Slack                           ; Required th                                         ; Actual th ; From           ; To                                                                                                                                                                                      ; To Clock       ;
+-----------------------------------------+-----------------------------------------------------+-----------+----------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------+
; N/A                                     ; None                                                ; -2.301 ns ; JTAG_NEXUS_TDI ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|byp_reg_Z                      ; JTAG_NEXUS_TCK ;
; N/A                                     ; None                                                ; -2.621 ns ; JTAG_NEXUS_TDI ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|ControlRegister:tsk3000_ControlRegister|NexusReg_Shift_7__Z        ; JTAG_NEXUS_TCK ;
; N/A                                     ; None                                                ; -2.632 ns ; JTAG_NEXUS_TDI ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|sh_reg_31__Z                   ; JTAG_NEXUS_TCK ;
; N/A                                     ; None                                                ; -2.734 ns ; JTAG_NEXUS_TDI ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|sh_ireg_3__Z                   ; JTAG_NEXUS_TCK ;
; N/A                                     ; None                                                ; -2.803 ns ; JTAG_NEXUS_TDI ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_31__Z        ; JTAG_NEXUS_TCK ;
; N/A                                     ; None                                                ; -2.846 ns ; JTAG_NEXUS_TDI ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|SubstituteRegister:tsk3000_SubstituteRegister|NexusReg_Shift_31__Z ; JTAG_NEXUS_TCK ;
; N/A                                     ; None                                                ; -3.065 ns ; BUS_D[16]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[16]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.079 ns ; BUS_D[1]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[1]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.079 ns ; BUS_D[2]       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[2]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.082 ns ; BUS_D[1]       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[1]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.102 ns ; JTAG_NEXUS_TMS ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_2__Z            ; JTAG_NEXUS_TCK ;
; N/A                                     ; None                                                ; -3.102 ns ; JTAG_NEXUS_TMS ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z            ; JTAG_NEXUS_TCK ;
; N/A                                     ; None                                                ; -3.102 ns ; JTAG_NEXUS_TMS ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_3__Z            ; JTAG_NEXUS_TCK ;
; N/A                                     ; None                                                ; -3.102 ns ; JTAG_NEXUS_TMS ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_0__Z            ; JTAG_NEXUS_TCK ;
; N/A                                     ; None                                                ; -3.131 ns ; BUS_D[0]       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[0]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.188 ns ; BUS_D[29]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[29]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.246 ns ; BUS_D[14]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[14]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.247 ns ; SRAM0_D[6]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[6]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.275 ns ; BUS_D[13]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[13]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.340 ns ; BUS_D[17]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[17]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.395 ns ; SRAM0_D[13]    ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[13]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.411 ns ; BUS_D[16]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[16]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.422 ns ; BUS_D[19]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[19]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.426 ns ; BUS_D[19]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[19]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.430 ns ; SRAM0_D[0]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[0]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.459 ns ; BUS_D[13]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[13]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.461 ns ; SPI_DIN        ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|shiftreg[0]                                                                                                ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.465 ns ; SRAM0_D[13]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[13]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.471 ns ; SRAM0_D[10]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[10]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.484 ns ; BUS_D[8]       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[8]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.489 ns ; BUS_D[15]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[15]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.491 ns ; BUS_D[15]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[15]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.497 ns ; SRAM0_D[7]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[7]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.504 ns ; SRAM0_D[15]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[15]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.517 ns ; SRAM0_D[14]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[14]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.527 ns ; BUS_D[10]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[10]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.530 ns ; BUS_D[10]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[10]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.532 ns ; BUS_D[16]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[16]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.541 ns ; BUS_D[29]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[29]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.583 ns ; BUS_D[30]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[30]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.585 ns ; BUS_D[30]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[30]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.602 ns ; SRAM1_D[11]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[27]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.606 ns ; SRAM0_D[6]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[6]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.607 ns ; SRAM0_D[6]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[6]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.610 ns ; BUS_D[3]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[3]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.610 ns ; BUS_D[3]       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[3]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.629 ns ; SRAM0_D[3]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[3]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.643 ns ; BUS_D[24]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[24]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.646 ns ; SRAM1_D[9]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[25]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.651 ns ; BUS_D[7]       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[7]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.663 ns ; SRAM1_D[12]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[28]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.669 ns ; SRAM1_D[0]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[16]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.676 ns ; BUS_D[15]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[15]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.687 ns ; BUS_D[17]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[17]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.692 ns ; SRAM1_D[12]    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[28]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.702 ns ; SRAM1_D[3]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[19]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.714 ns ; BUS_D[23]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[23]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.717 ns ; BUS_D[23]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[23]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.720 ns ; BUS_D[12]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[12]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.738 ns ; SRAM0_D[14]    ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[14]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.741 ns ; SRAM0_D[14]    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[14]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.741 ns ; SRAM0_D[2]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[2]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.745 ns ; SRAM0_D[13]    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[13]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.751 ns ; BUS_D[4]       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[4]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.753 ns ; BUS_D[4]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[4]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.754 ns ; BUS_D[31]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[31]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.759 ns ; BUS_D[11]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[11]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.761 ns ; BUS_D[8]       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[8]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.764 ns ; BUS_D[8]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[8]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.767 ns ; BUS_D[2]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[2]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.773 ns ; BUS_D[2]       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[2]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.784 ns ; SRAM1_D[1]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[17]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.785 ns ; SRAM0_D[0]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[0]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.787 ns ; BUS_D[1]       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[1]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.793 ns ; SRAM0_D[1]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[1]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.799 ns ; BUS_D[6]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[6]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.808 ns ; SRAM1_D[15]    ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[31]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.817 ns ; SRAM0_D[8]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[8]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.823 ns ; SRAM1_D[2]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[18]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.832 ns ; SRAM0_D[8]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[8]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.833 ns ; SRAM0_D[8]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[8]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.853 ns ; BUS_D[11]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[11]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.859 ns ; BUS_D[0]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[0]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.864 ns ; BUS_D[17]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[17]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.867 ns ; BUS_D[20]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[20]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.867 ns ; BUS_D[20]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[20]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.873 ns ; BUS_D[22]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[22]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.874 ns ; SRAM1_D[10]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[26]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.876 ns ; BUS_D[22]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[22]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.881 ns ; BUS_D[31]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[31]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.881 ns ; SRAM1_D[12]    ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[28]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.883 ns ; BUS_D[21]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[21]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.885 ns ; BUS_D[20]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[20]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.891 ns ; SRAM1_D[6]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[22]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.913 ns ; SRAM0_D[15]    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[15]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.913 ns ; SRAM0_D[15]    ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[15]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.916 ns ; BUS_D[12]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[12]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.916 ns ; BUS_D[14]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[14]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.937 ns ; SRAM0_D[4]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[4]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.939 ns ; BUS_D[31]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[31]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.943 ns ; SRAM1_D[4]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[20]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.947 ns ; BUS_D[18]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[18]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.963 ns ; BUS_D[26]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[26]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.965 ns ; SRAM1_D[13]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[29]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.965 ns ; SRAM0_D[0]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[0]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.969 ns ; BUS_D[9]       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[9]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.974 ns ; SRAM0_D[5]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[5]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.980 ns ; BUS_D[4]       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[4]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.980 ns ; BUS_D[30]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[30]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.986 ns ; SRAM1_D[15]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[31]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.993 ns ; BUS_D[6]       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[6]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -3.996 ns ; SRAM0_D[9]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[9]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.017 ns ; BUS_D[18]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[18]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.020 ns ; BUS_D[18]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[18]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.020 ns ; SRAM0_D[3]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[3]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.021 ns ; BUS_D[22]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[22]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.058 ns ; BUS_D[7]       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[7]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.058 ns ; BUS_D[27]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[27]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.068 ns ; TEST_BUTTON    ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_read_ack|lpm_ff:ff1|dffs[0]                                  ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.084 ns ; BUS_D[9]       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[9]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.088 ns ; SRAM1_D[4]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[20]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.092 ns ; SRAM1_D[10]    ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[26]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.094 ns ; SRAM1_D[2]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[18]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.095 ns ; SRAM1_D[2]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[18]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.108 ns ; BUS_D[11]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[11]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.122 ns ; BUS_D[13]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_DMain[13]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.125 ns ; BUS_D[3]       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[3]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.126 ns ; BUS_D[26]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[26]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.127 ns ; BUS_D[26]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[26]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.143 ns ; SPI_DIN        ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|rxdata[0]                                                                                                  ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.164 ns ; SRAM1_D[6]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[22]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.165 ns ; BUS_D[7]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[7]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.165 ns ; BUS_D[27]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[27]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.165 ns ; BUS_D[27]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[27]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.166 ns ; SRAM1_D[15]    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[31]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.167 ns ; SRAM1_D[6]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[22]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.181 ns ; SRAM0_D[5]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[5]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.182 ns ; SRAM0_D[5]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[5]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.187 ns ; BUS_D[17]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_DMain[17]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.207 ns ; BUS_D[0]       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[0]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.213 ns ; SRAM0_D[3]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[3]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.213 ns ; BUS_D[25]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[25]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.213 ns ; BUS_D[25]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[25]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.214 ns ; SRAM1_D[5]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[21]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.236 ns ; BUS_D[21]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[21]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.239 ns ; BUS_D[10]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[10]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.243 ns ; BUS_D[13]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[13]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.250 ns ; SRAM1_D[14]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[30]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.257 ns ; BUS_D[24]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[24]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.258 ns ; BUS_D[24]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[24]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.268 ns ; BUS_D[9]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[9]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.274 ns ; BUS_D[14]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[14]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.275 ns ; SRAM1_D[10]    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[26]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.282 ns ; SRAM1_D[8]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[24]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.283 ns ; SRAM1_D[4]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[20]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.286 ns ; SRAM0_D[12]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[12]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.290 ns ; SRAM1_D[13]    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[29]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.293 ns ; BUS_D[5]       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[5]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.298 ns ; SRAM1_D[9]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[25]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.299 ns ; SRAM1_D[9]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[25]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.322 ns ; SRAM0_D[7]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[7]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.339 ns ; BUS_D[12]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[12]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.346 ns ; SRAM0_D[9]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[9]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.378 ns ; SRAM1_D[3]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[19]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.381 ns ; SRAM1_D[3]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[19]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.384 ns ; SRAM1_D[0]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[16]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.385 ns ; BUS_D[6]       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[6]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.386 ns ; SRAM0_D[10]    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[10]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.386 ns ; SRAM0_D[10]    ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[10]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.386 ns ; SRAM1_D[11]    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[27]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.386 ns ; SRAM1_D[11]    ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[27]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.387 ns ; SRAM1_D[0]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[16]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.397 ns ; SRAM0_D[1]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[1]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.397 ns ; SRAM0_D[1]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[1]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.404 ns ; BUS_D[28]      ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[28]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.405 ns ; BUS_D[28]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[28]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.449 ns ; BUS_D[23]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[23]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.450 ns ; SRAM0_D[11]    ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[11]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.473 ns ; SRAM1_D[8]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[24]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.484 ns ; BUS_D[29]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[29]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.484 ns ; SRAM0_D[2]     ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[2]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.489 ns ; SRAM0_D[2]     ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[2]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.534 ns ; BUS_D[19]      ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[19]                                                                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.546 ns ; SRAM0_D[11]    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_IMain[11]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.546 ns ; SRAM0_D[11]    ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[11]                                                                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.553 ns ; BUS_D[4]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_DMain[4]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.566 ns ; BUS_D[16]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_DMain[16]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.592 ns ; SRAM0_D[13]    ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_DMain[13]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.598 ns ; BUS_D[1]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_DMain[1]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.598 ns ; BUS_D[19]      ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_DMain[19]                                                          ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.610 ns ; BUS_D[8]       ; TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|CaptureRegister_DMain[8]                                                           ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.611 ns ; SRAM0_D[9]     ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_word[9]                                                                                                            ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.626 ns ; TEST_BUTTON    ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|state[1]                                                                                                   ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.626 ns ; TEST_BUTTON    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_3|lpm_ff:ff1|dffs[0]                                ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.626 ns ; TEST_BUTTON    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_4|lpm_ff:ff1|dffs[0]                                ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.626 ns ; TEST_BUTTON    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_11|lpm_ff:ff1|dffs[0]                               ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.626 ns ; TEST_BUTTON    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_12|lpm_ff:ff1|dffs[0]                               ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.626 ns ; TEST_BUTTON    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_19|lpm_ff:ff1|dffs[0]                               ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.626 ns ; TEST_BUTTON    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_20|lpm_ff:ff1|dffs[0]                               ; CLK_REF        ;
; N/A                                     ; None                                                ; -4.626 ns ; TEST_BUTTON    ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_27|lpm_ff:ff1|dffs[0]                               ; CLK_REF        ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;           ;                ;                                                                                                                                                                                         ;                ;
+-----------------------------------------+-----------------------------------------------------+-----------+----------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Minimum tco                                                                                                                                                                                                                                                                                                             ;
+-----------------------------------------+-----------------------------------------------------+----------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------+----------------+
; Minimum Slack                           ; Required Min tco                                    ; Actual Min tco ; From                                                                                                                                                                 ; To             ; From Clock     ;
+-----------------------------------------+-----------------------------------------------------+----------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------+----------------+
; N/A                                     ; None                                                ; 6.357 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_16                                                                                              ; SRAM1_D[0]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 6.395 ns       ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|ctrl_2                                                                                  ; SPI_MODE       ; CLK_REF        ;
; N/A                                     ; None                                                ; 6.429 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_28                                                                                              ; SRAM1_D[12]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 6.540 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_3                                                                                               ; SRAM0_D[3]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 6.593 ns       ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|ctrl_1                                                                                  ; SPI_SEL        ; CLK_REF        ;
; N/A                                     ; None                                                ; 6.769 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_13                                                                                              ; SRAM0_D[13]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 6.842 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_31                                                                                              ; BUS_D[31]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 6.888 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]                        ; SRAM0_W        ; CLK_REF        ;
; N/A                                     ; None                                                ; 6.908 ns       ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|SPI_CLK                                                                                 ; SPI_CLK        ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.059 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[31]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.069 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[15]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.080 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[0]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.089 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[2]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.089 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[14]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.198 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_0                                                                                               ; SRAM0_D[0]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.279 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_15                                                                                              ; SRAM0_D[15]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.326 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[31]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.336 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[15]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.347 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[0]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.356 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[2]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.356 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[14]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.373 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[26]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.373 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[10]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.377 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[11]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.383 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[3]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.391 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[28]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.411 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[18]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.418 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[13]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.425 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_14                                                                                              ; BUS_D[14]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.438 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[30]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.441 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[21]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.448 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[1]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.473 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_8                                                                                               ; SRAM0_D[8]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.508 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_30                                                                                              ; BUS_D[30]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.519 ns       ; WB_PWMX:U_NB3000AL_Slideshow_System_BACKLIGHT|pwmxb_w:PWM1|agb                                                                                                       ; TFT_BLIGHT     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.529 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_7                                                                                               ; SRAM0_D[7]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.535 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_14                                                                                              ; SRAM0_D[14]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.544 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[8]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.552 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_2                                                                                               ; SRAM0_D[2]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.572 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_6                                                                                               ; SRAM0_D[6]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.578 ns       ; WB_SPI32:U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|spi32:U_spi|SPI_DOUT                                                                                ; SPI_DOUT       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.639 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[31]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.640 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[26]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.640 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[10]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.644 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[11]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.649 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[15]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.650 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[3]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.658 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[28]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.660 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[0]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.669 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[2]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.669 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[14]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.678 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[18]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.685 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[13]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.705 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[30]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.708 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[21]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.713 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_13                                                                                              ; BUS_D[13]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.715 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[1]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.738 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[19]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.748 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[9]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.750 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_31                                                                                              ; SRAM1_D[15]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.763 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_17                                                                                              ; SRAM1_D[1]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.779 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[20]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.782 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[27]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.794 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]                       ; SRAM0_D[6]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.798 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_0                                                                                               ; BUS_D[0]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.804 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_4                                                                                               ; SRAM0_D[4]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.807 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[29]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.809 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[12]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.811 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[8]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.817 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[17]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.820 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]                       ; SRAM1_OE       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.822 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[6]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.829 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_16                                                                                              ; BUS_D[16]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.839 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[16]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.842 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[22]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.849 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[4]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.850 ns       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_6|lpm_ff:ff1|dffs[0]             ; SRAM0_A[4]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.852 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[23]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.858 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_21                                                                                              ; BUS_D[21]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.873 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[25]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.885 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[5]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.908 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[7]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.915 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_9                                                                                               ; SRAM0_D[9]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.921 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]                       ; SRAM0_D[0]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.924 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_D[24]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.953 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[26]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.953 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[10]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.957 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[11]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.963 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[3]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.971 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[28]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.975 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[26]                                                                                       ; TFT_DB[10]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.991 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[18]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.991 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[29]                                                                                       ; TFT_DB[13]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 7.998 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[13]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.005 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[19]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.007 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_19                                                                                              ; SRAM1_D[3]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.015 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[9]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.018 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[30]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.021 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[21]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.022 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_11                                                                                              ; BUS_D[11]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.027 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_address[5]                                                                                      ; BUS_A[5]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.028 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[1]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.043 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_27                                                                                              ; SRAM1_D[11]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.046 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[20]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.049 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[27]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.069 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[20]                                                                                       ; TFT_DB[4]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.074 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[29]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.075 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[13]                                                                                       ; TFT_DB[13]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.076 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[12]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.084 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[17]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.089 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[6]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.103 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_2                                                                                               ; BUS_D[2]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.106 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[16]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.109 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[22]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.116 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[4]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.119 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[23]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.124 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[8]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.128 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[17]                                                                                       ; TFT_DB[1]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.140 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[25]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.142 ns       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_14|lpm_ff:ff1|dffs[0]            ; SRAM1_A[12]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.144 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_12                                                                                              ; SRAM0_D[12]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.144 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_10                                                                                              ; BUS_D[10]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.152 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[5]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.161 ns       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_6|lpm_ff:ff1|dffs[0]             ; SRAM1_A[4]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.171 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_9                                                                                               ; BUS_D[9]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.175 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[7]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.187 ns       ; WB_PWMX:U_NB3000AL_Slideshow_System_BACKLIGHT|pwmxb_w:PWM1|pwcon[0]                                                                                                  ; TFT_BLIGHT     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.191 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_D[24]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.225 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_30                                                                                              ; SRAM1_D[14]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.244 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]                       ; SRAM0_D[3]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.251 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]                       ; SRAM0_D[15]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.271 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]                       ; SRAM0_D[14]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.291 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_29                                                                                              ; SRAM1_D[13]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.316 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_NBE[1]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.316 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_7                                                                                               ; BUS_D[7]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.318 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[19]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.325 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_8                                                                                               ; BUS_D[8]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.328 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[9]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.337 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_NOE        ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.337 ns       ; Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_0|lpm_ff:ff1|dffs[0]                ; SRAM0_A[4]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.341 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_15                                                                                              ; BUS_D[15]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.345 ns       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_2|lpm_ff:ff1|dffs[0]             ; SRAM1_A[0]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.359 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[20]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.360 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[31]                                                                                       ; TFT_DB[15]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.361 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|State_Reg[9]                                                                                            ; TFT_RS         ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.362 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_24                                                                                              ; BUS_D[24]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.362 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[27]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.363 ns       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_4|lpm_ff:ff1|dffs[0]             ; SRAM0_A[2]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.363 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[19]                                                                                       ; TFT_DB[3]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.378 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_22                                                                                              ; SRAM1_D[6]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.380 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_4                                                                                               ; BUS_D[4]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.386 ns       ; Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_2|lpm_ff:ff1|dffs[0]                ; SRAM0_A[4]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.387 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[29]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.389 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[12]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.397 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[17]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.402 ns       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_4|lpm_ff:ff1|dffs[0]             ; SRAM1_A[2]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.402 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[6]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.405 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|State_Reg[15]                                                                                           ; TFT_RS         ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.408 ns       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_12|lpm_ff:ff1|dffs[0]            ; SRAM1_A[10]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.419 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[16]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.422 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[22]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.429 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[4]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.432 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[23]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.443 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]                          ; SRAM0_D[6]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.447 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[21]                                                                                       ; TFT_DB[5]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.453 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[25]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.459 ns       ; Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_0|lpm_ff:ff1|dffs[0]                ; SRAM1_D[12]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.465 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[5]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.468 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|State_Reg[15]                                                                                           ; TFT_WR         ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.469 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]                          ; SRAM1_OE       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.474 ns       ; Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_3|lpm_ff:ff1|dffs[0]                ; SRAM0_A[4]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.475 ns       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_16|lpm_ff:ff1|dffs[0]            ; SRAM1_D[0]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.488 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[7]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.489 ns       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_3|lpm_ff:ff1|dffs[0]             ; SRAM0_A[1]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.504 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_D[24]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.504 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_11                                                                                              ; SRAM0_D[11]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.508 ns       ; Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_2|lpm_ff:ff1|dffs[0]                ; SRAM1_D[12]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.515 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]                       ; SRAM1_D[15]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.520 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_pulse|lpm_ff:ff1|dffs[0]            ; BUS_NWE        ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.521 ns       ; TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|sh_reg_0__Z ; JTAG_NEXUS_TDO ; JTAG_NEXUS_TCK ;
; N/A                                     ; None                                                ; 8.524 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|memread_address[8]                                                                                      ; BUS_A[8]       ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.536 ns       ; Configurable_MULTIMASTER_SHARED:U_NB3000AL_Slideshow_System_MULTIMASTER_SHARED|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_0|lpm_ff:ff1|dffs[0]            ; BUS_A[19]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.537 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_10                                                                                              ; SRAM0_D[10]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.538 ns       ; BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_ADR_O_18|lpm_ff:ff1|dffs[0]            ; SRAM1_A[16]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.555 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]           ; BUS_NBE[2]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.559 ns       ; Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_0|lpm_ff:ff1|dffs[0]                ; SRAM0_D[3]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.570 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]                          ; SRAM0_D[0]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.573 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]                       ; SRAM1_D[0]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.581 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|State_Reg[12]                                                                                           ; TFT_WR         ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.583 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_NBE[1]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.583 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[27]                                                                                       ; TFT_DB[11]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.595 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|GRAMAddress_Reg_i_0[5]                                                                                  ; TFT_DB[5]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.598 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelData_Reg[24]                                                                                       ; TFT_DB[8]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.599 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]                       ; SRAM1_D[12]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.604 ns       ; Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_write_ack|lpm_ff:ff1|dffs[0]              ; BUS_NOE        ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.608 ns       ; Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_2|lpm_ff:ff1|dffs[0]                ; SRAM0_D[3]     ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.609 ns       ; Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_addresssetup|lpm_ff:ff1|dffs[0]                       ; SRAM0_D[13]    ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.627 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_12                                                                                              ; BUS_D[12]      ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.629 ns       ; WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|State_Reg[14]                                                                                           ; TFT_RS         ; CLK_REF        ;
; N/A                                     ; None                                                ; 8.638 ns       ; WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_5                                                                                               ; SRAM0_D[5]     ; CLK_REF        ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                ;                                                                                                                                                                      ;                ;                ;
+-----------------------------------------+-----------------------------------------------------+----------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------+----------------+


+---------------------------------------------------------------------------------+
; Minimum tpd                                                                     ;
+---------------+-------------------+-----------------+-------------+-------------+
; Minimum Slack ; Required P2P Time ; Actual P2P Time ; From        ; To          ;
+---------------+-------------------+-----------------+-------------+-------------+
; N/A           ; None              ; 16.169 ns       ; TEST_BUTTON ; SRAM0_A[4]  ;
; N/A           ; None              ; 16.480 ns       ; TEST_BUTTON ; SRAM1_A[4]  ;
; N/A           ; None              ; 16.565 ns       ; TEST_BUTTON ; SRAM1_A[7]  ;
; N/A           ; None              ; 17.011 ns       ; TEST_BUTTON ; SRAM1_A[12] ;
; N/A           ; None              ; 17.158 ns       ; TEST_BUTTON ; BUS_A[15]   ;
; N/A           ; None              ; 17.252 ns       ; TEST_BUTTON ; BUS_A[6]    ;
; N/A           ; None              ; 17.292 ns       ; TEST_BUTTON ; SRAM1_A[15] ;
; N/A           ; None              ; 17.342 ns       ; TEST_BUTTON ; BUS_A[7]    ;
; N/A           ; None              ; 17.353 ns       ; TEST_BUTTON ; SRAM1_A[5]  ;
; N/A           ; None              ; 17.467 ns       ; TEST_BUTTON ; SRAM0_A[2]  ;
; N/A           ; None              ; 17.506 ns       ; TEST_BUTTON ; SRAM1_A[2]  ;
; N/A           ; None              ; 17.511 ns       ; TEST_BUTTON ; BUS_A[11]   ;
; N/A           ; None              ; 17.529 ns       ; TEST_BUTTON ; BUS_A[5]    ;
; N/A           ; None              ; 17.544 ns       ; TEST_BUTTON ; BUS_A[9]    ;
; N/A           ; None              ; 17.575 ns       ; TEST_BUTTON ; SRAM0_A[13] ;
; N/A           ; None              ; 17.670 ns       ; TEST_BUTTON ; SRAM1_A[0]  ;
; N/A           ; None              ; 17.671 ns       ; TEST_BUTTON ; SRAM1_A[11] ;
; N/A           ; None              ; 17.699 ns       ; TEST_BUTTON ; SRAM0_A[12] ;
; N/A           ; None              ; 17.711 ns       ; TEST_BUTTON ; BUS_A[3]    ;
; N/A           ; None              ; 17.733 ns       ; TEST_BUTTON ; SRAM0_A[1]  ;
; N/A           ; None              ; 17.737 ns       ; TEST_BUTTON ; BUS_A[14]   ;
; N/A           ; None              ; 17.750 ns       ; TEST_BUTTON ; SRAM0_A[5]  ;
; N/A           ; None              ; 17.892 ns       ; TEST_BUTTON ; BUS_A[18]   ;
; N/A           ; None              ; 18.030 ns       ; TEST_BUTTON ; SRAM1_A[13] ;
; N/A           ; None              ; 18.067 ns       ; TEST_BUTTON ; BUS_A[2]    ;
; N/A           ; None              ; 18.069 ns       ; TEST_BUTTON ; SRAM1_A[14] ;
; N/A           ; None              ; 18.079 ns       ; TEST_BUTTON ; SRAM0_A[11] ;
; N/A           ; None              ; 18.082 ns       ; TEST_BUTTON ; SRAM0_A[15] ;
; N/A           ; None              ; 18.101 ns       ; TEST_BUTTON ; BUS_A[13]   ;
; N/A           ; None              ; 18.102 ns       ; TEST_BUTTON ; SRAM1_A[16] ;
; N/A           ; None              ; 18.108 ns       ; TEST_BUTTON ; SRAM0_A[0]  ;
; N/A           ; None              ; 18.273 ns       ; TEST_BUTTON ; SRAM1_A[3]  ;
; N/A           ; None              ; 18.392 ns       ; TEST_BUTTON ; SRAM1_A[10] ;
; N/A           ; None              ; 18.417 ns       ; TEST_BUTTON ; BUS_A[4]    ;
; N/A           ; None              ; 18.492 ns       ; TEST_BUTTON ; SRAM0_A[6]  ;
; N/A           ; None              ; 18.493 ns       ; TEST_BUTTON ; SRAM0_A[16] ;
; N/A           ; None              ; 18.548 ns       ; TEST_BUTTON ; BUS_A[19]   ;
; N/A           ; None              ; 18.592 ns       ; TEST_BUTTON ; TFT_RESET   ;
; N/A           ; None              ; 18.746 ns       ; TEST_BUTTON ; BUS_A[10]   ;
; N/A           ; None              ; 18.761 ns       ; TEST_BUTTON ; BUS_A[8]    ;
; N/A           ; None              ; 18.888 ns       ; TEST_BUTTON ; SRAM1_A[9]  ;
; N/A           ; None              ; 18.984 ns       ; TEST_BUTTON ; SRAM1_A[8]  ;
; N/A           ; None              ; 18.992 ns       ; TEST_BUTTON ; SRAM0_A[8]  ;
; N/A           ; None              ; 19.032 ns       ; TEST_BUTTON ; SRAM1_A[17] ;
; N/A           ; None              ; 19.034 ns       ; TEST_BUTTON ; SRAM0_A[10] ;
; N/A           ; None              ; 19.180 ns       ; TEST_BUTTON ; SRAM0_A[3]  ;
; N/A           ; None              ; 19.346 ns       ; TEST_BUTTON ; BUS_A[16]   ;
; N/A           ; None              ; 19.657 ns       ; TEST_BUTTON ; SRAM1_A[1]  ;
; N/A           ; None              ; 19.690 ns       ; TEST_BUTTON ; SRAM0_D[6]  ;
; N/A           ; None              ; 19.716 ns       ; TEST_BUTTON ; SRAM1_OE    ;
; N/A           ; None              ; 19.817 ns       ; TEST_BUTTON ; SRAM0_D[0]  ;
; N/A           ; None              ; 19.833 ns       ; TEST_BUTTON ; BUS_D[31]   ;
; N/A           ; None              ; 19.843 ns       ; TEST_BUTTON ; BUS_D[15]   ;
; N/A           ; None              ; 19.854 ns       ; TEST_BUTTON ; BUS_D[0]    ;
; N/A           ; None              ; 19.863 ns       ; TEST_BUTTON ; BUS_D[2]    ;
; N/A           ; None              ; 19.863 ns       ; TEST_BUTTON ; BUS_D[14]   ;
; N/A           ; None              ; 19.979 ns       ; TEST_BUTTON ; SRAM0_A[9]  ;
; N/A           ; None              ; 20.001 ns       ; TEST_BUTTON ; BUS_A[12]   ;
; N/A           ; None              ; 20.095 ns       ; TEST_BUTTON ; SRAM1_A[6]  ;
; N/A           ; None              ; 20.140 ns       ; TEST_BUTTON ; SRAM0_D[3]  ;
; N/A           ; None              ; 20.147 ns       ; TEST_BUTTON ; SRAM0_D[15] ;
; N/A           ; None              ; 20.147 ns       ; TEST_BUTTON ; BUS_D[26]   ;
; N/A           ; None              ; 20.147 ns       ; TEST_BUTTON ; BUS_D[10]   ;
; N/A           ; None              ; 20.151 ns       ; TEST_BUTTON ; BUS_D[11]   ;
; N/A           ; None              ; 20.157 ns       ; TEST_BUTTON ; BUS_D[3]    ;
; N/A           ; None              ; 20.165 ns       ; TEST_BUTTON ; BUS_D[28]   ;
; N/A           ; None              ; 20.167 ns       ; TEST_BUTTON ; SRAM0_D[14] ;
; N/A           ; None              ; 20.185 ns       ; TEST_BUTTON ; BUS_D[18]   ;
; N/A           ; None              ; 20.192 ns       ; TEST_BUTTON ; BUS_D[13]   ;
; N/A           ; None              ; 20.212 ns       ; TEST_BUTTON ; BUS_D[30]   ;
; N/A           ; None              ; 20.215 ns       ; TEST_BUTTON ; BUS_D[21]   ;
; N/A           ; None              ; 20.222 ns       ; TEST_BUTTON ; BUS_D[1]    ;
; N/A           ; None              ; 20.318 ns       ; TEST_BUTTON ; BUS_D[8]    ;
; N/A           ; None              ; 20.371 ns       ; TEST_BUTTON ; SRAM0_A[14] ;
; N/A           ; None              ; 20.411 ns       ; TEST_BUTTON ; SRAM1_D[15] ;
; N/A           ; None              ; 20.469 ns       ; TEST_BUTTON ; SRAM1_D[0]  ;
; N/A           ; None              ; 20.495 ns       ; TEST_BUTTON ; SRAM1_D[12] ;
; N/A           ; None              ; 20.505 ns       ; TEST_BUTTON ; SRAM0_D[13] ;
; N/A           ; None              ; 20.512 ns       ; TEST_BUTTON ; BUS_D[19]   ;
; N/A           ; None              ; 20.522 ns       ; TEST_BUTTON ; BUS_D[9]    ;
; N/A           ; None              ; 20.539 ns       ; TEST_BUTTON ; SRAM0_A[17] ;
; N/A           ; None              ; 20.553 ns       ; TEST_BUTTON ; BUS_D[20]   ;
; N/A           ; None              ; 20.556 ns       ; TEST_BUTTON ; BUS_D[27]   ;
; N/A           ; None              ; 20.581 ns       ; TEST_BUTTON ; BUS_D[29]   ;
; N/A           ; None              ; 20.583 ns       ; TEST_BUTTON ; BUS_D[12]   ;
; N/A           ; None              ; 20.591 ns       ; TEST_BUTTON ; BUS_D[17]   ;
; N/A           ; None              ; 20.596 ns       ; TEST_BUTTON ; BUS_D[6]    ;
; N/A           ; None              ; 20.613 ns       ; TEST_BUTTON ; BUS_D[16]   ;
; N/A           ; None              ; 20.616 ns       ; TEST_BUTTON ; BUS_D[22]   ;
; N/A           ; None              ; 20.623 ns       ; TEST_BUTTON ; BUS_D[4]    ;
; N/A           ; None              ; 20.626 ns       ; TEST_BUTTON ; BUS_D[23]   ;
; N/A           ; None              ; 20.635 ns       ; TEST_BUTTON ; SRAM0_LB    ;
; N/A           ; None              ; 20.647 ns       ; TEST_BUTTON ; BUS_D[25]   ;
; N/A           ; None              ; 20.659 ns       ; TEST_BUTTON ; BUS_D[5]    ;
; N/A           ; None              ; 20.682 ns       ; TEST_BUTTON ; BUS_D[7]    ;
; N/A           ; None              ; 20.698 ns       ; TEST_BUTTON ; BUS_D[24]   ;
; N/A           ; None              ; 20.723 ns       ; TEST_BUTTON ; SRAM0_E     ;
; N/A           ; None              ; 20.802 ns       ; TEST_BUTTON ; SRAM0_D[2]  ;
; N/A           ; None              ; 21.028 ns       ; TEST_BUTTON ; SRAM1_UB    ;
; N/A           ; None              ; 21.086 ns       ; TEST_BUTTON ; SRAM0_OE    ;
; N/A           ; None              ; 21.090 ns       ; TEST_BUTTON ; BUS_NBE[1]  ;
; N/A           ; None              ; 21.097 ns       ; TEST_BUTTON ; SRAM1_D[13] ;
; N/A           ; None              ; 21.107 ns       ; TEST_BUTTON ; SRAM1_D[14] ;
; N/A           ; None              ; 21.111 ns       ; TEST_BUTTON ; BUS_NOE     ;
; N/A           ; None              ; 21.174 ns       ; TEST_BUTTON ; SRAM1_E     ;
; N/A           ; None              ; 21.259 ns       ; TEST_BUTTON ; SRAM0_UB    ;
; N/A           ; None              ; 21.299 ns       ; TEST_BUTTON ; SRAM1_LB    ;
; N/A           ; None              ; 21.329 ns       ; TEST_BUTTON ; BUS_NBE[2]  ;
; N/A           ; None              ; 21.363 ns       ; TEST_BUTTON ; SRAM1_D[3]  ;
; N/A           ; None              ; 21.383 ns       ; TEST_BUTTON ; SRAM0_D[4]  ;
; N/A           ; None              ; 21.383 ns       ; TEST_BUTTON ; SRAM0_D[10] ;
; N/A           ; None              ; 21.413 ns       ; TEST_BUTTON ; SRAM1_D[2]  ;
; N/A           ; None              ; 21.510 ns       ; TEST_BUTTON ; BUS_A[17]   ;
; N/A           ; None              ; 21.529 ns       ; TEST_BUTTON ; BUS_RAM_NCS ;
; N/A           ; None              ; 21.601 ns       ; TEST_BUTTON ; SRAM1_D[1]  ;
; N/A           ; None              ; 21.601 ns       ; TEST_BUTTON ; SRAM1_D[4]  ;
; N/A           ; None              ; 21.621 ns       ; TEST_BUTTON ; SRAM0_D[1]  ;
; N/A           ; None              ; 21.892 ns       ; TEST_BUTTON ; BUS_NBE[0]  ;
; N/A           ; None              ; 22.022 ns       ; TEST_BUTTON ; BUS_NBE[3]  ;
; N/A           ; None              ; 22.061 ns       ; TEST_BUTTON ; SRAM0_D[5]  ;
; N/A           ; None              ; 22.069 ns       ; TEST_BUTTON ; SRAM1_D[5]  ;
; N/A           ; None              ; 22.080 ns       ; TEST_BUTTON ; SRAM1_D[10] ;
; N/A           ; None              ; 22.090 ns       ; TEST_BUTTON ; SRAM0_D[11] ;
; N/A           ; None              ; 22.091 ns       ; TEST_BUTTON ; SRAM1_D[6]  ;
; N/A           ; None              ; 22.091 ns       ; TEST_BUTTON ; SRAM1_D[9]  ;
; N/A           ; None              ; 22.130 ns       ; TEST_BUTTON ; SRAM0_A[7]  ;
; N/A           ; None              ; 22.506 ns       ; TEST_BUTTON ; SRAM0_D[8]  ;
; N/A           ; None              ; 22.520 ns       ; TEST_BUTTON ; SRAM0_D[7]  ;
; N/A           ; None              ; 22.553 ns       ; TEST_BUTTON ; SRAM1_D[8]  ;
; N/A           ; None              ; 22.563 ns       ; TEST_BUTTON ; SRAM0_D[9]  ;
; N/A           ; None              ; 22.708 ns       ; TEST_BUTTON ; SRAM0_D[12] ;
; N/A           ; None              ; 22.921 ns       ; TEST_BUTTON ; SRAM1_D[11] ;
; N/A           ; None              ; 23.830 ns       ; TEST_BUTTON ; SRAM1_D[7]  ;
+---------------+-------------------+-----------------+-------------+-------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Board Trace Model Assignments                                                                                                                                                                                                                                                                                                                                       ;
+------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+
; Pin              ; I/O Standard ; Near Tline Length ; Near Tline L per Length ; Near Tline C per Length ; Near Series R ; Near Differential R ; Near Pull-up R ; Near Pull-down R ; Near C ; Far Tline Length ; Far Tline L per Length ; Far Tline C per Length ; Far Series R ; Far Pull-up R ; Far Pull-down R ; Far C ; Termination Voltage ; Far Differential R ;
+------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+
; BUS_A[1]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[2]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[3]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[4]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[5]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[6]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[7]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[8]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[9]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[10]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[11]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[12]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[13]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[14]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[15]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[16]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[17]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[18]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[19]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[20]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[21]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[22]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[23]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_A[24]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_FLASH_NCS    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_FLASH_NRESET ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_NBE[0]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_NBE[1]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_NBE[2]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_NBE[3]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_NOE          ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_NWE          ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_RAM_NCS      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_SDRAM_CKE    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_SDRAM_CLK    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_SDRAM_NCAS   ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_SDRAM_NCS    ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_SDRAM_NRAS   ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_USB_DACK     ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_USB_NCS      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_USB_NRESET   ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; JTAG_NEXUS_TDO   ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SPI_CLK          ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SPI_DOUT         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SPI_MODE         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SPI_SEL          ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[0]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[1]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[2]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[3]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[4]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[5]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[6]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[7]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[8]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[9]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[10]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[11]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[12]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[13]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[14]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[15]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[16]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_A[17]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_E          ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_LB         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_OE         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_UB         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_W          ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[0]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[1]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[2]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[3]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[4]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[5]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[6]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[7]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[8]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[9]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[10]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[11]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[12]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[13]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[14]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[15]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[16]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_A[17]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_E          ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_LB         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_OE         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_UB         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_W          ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_BLIGHT       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_CS           ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_RD           ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_RESET        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_RS           ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_WR           ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[0]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[1]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[2]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[3]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[4]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[5]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[6]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[7]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[8]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[9]         ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[10]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[11]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[12]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[13]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[14]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[15]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[16]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[17]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[18]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[19]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[20]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[21]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[22]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[23]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[24]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[25]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[26]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[27]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[28]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[29]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[30]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; BUS_D[31]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[0]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[1]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[2]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[3]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[4]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[5]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[6]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[7]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[8]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[9]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[10]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[11]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[12]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[13]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[14]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM0_D[15]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[0]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[1]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[2]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[3]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[4]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[5]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[6]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[7]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[8]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[9]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[10]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[11]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[12]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[13]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[14]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; SRAM1_D[15]      ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[0]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[1]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[2]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[3]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[4]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[5]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[6]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[7]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[8]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[9]        ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[10]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[11]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[12]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[13]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[14]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
; TFT_DB[15]       ; 2.5 V        ; 0 in              ; 0 H/in                  ; 0 F/in                  ; short         ; -                   ; open           ; open             ; open   ; 0 in             ; 0 H/in                 ; 0 F/in                 ; short        ; open          ; open            ; open  ; 0 V                 ; -                  ;
+------------------+--------------+-------------------+-------------------------+-------------------------+---------------+---------------------+----------------+------------------+--------+------------------+------------------------+------------------------+--------------+---------------+-----------------+-------+---------------------+--------------------+


+----------------------------------------------------------------------------+
; Input Transition Times                                                     ;
+-------------------------+--------------+-----------------+-----------------+
; Pin                     ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ;
+-------------------------+--------------+-----------------+-----------------+
; BUS_FLASH_NBUSY         ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_SDRAM_CLK_IN        ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_SDRAM_FEEDBACK      ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_USB_DREQ            ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_USB_NIRQ            ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[0]                ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[1]                ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[2]                ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[3]                ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[4]                ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[5]                ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[6]                ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[7]                ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[8]                ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[9]                ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[10]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[11]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[12]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[13]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[14]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[15]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[16]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[17]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[18]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[19]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[20]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[21]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[22]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[23]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[24]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[25]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[26]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[27]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[28]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[29]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[30]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; BUS_D[31]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[0]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[1]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[2]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[3]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[4]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[5]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[6]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[7]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[8]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[9]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[10]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[11]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[12]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[13]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[14]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM0_D[15]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[0]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[1]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[2]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[3]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[4]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[5]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[6]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[7]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[8]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[9]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[10]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[11]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[12]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[13]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[14]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SRAM1_D[15]             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[0]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[1]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[2]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[3]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[4]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[5]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[6]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[7]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[8]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[9]               ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[10]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[11]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[12]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[13]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[14]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TFT_DB[15]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; TEST_BUTTON             ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; CLK_REF                 ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; JTAG_NEXUS_TCK          ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; JTAG_NEXUS_TMS          ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; JTAG_NEXUS_TDI          ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SW_USER[2]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SW_USER[4]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SW_USER[3]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SW_USER[0]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SW_USER[1]              ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; SPI_DIN                 ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; ~ALTERA_ASDO_DATA1~     ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; ~ALTERA_FLASH_nCE_nCSO~ ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; ~ALTERA_DCLK~           ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
; ~ALTERA_DATA0~          ; 2.5 V        ; 2000 ps         ; 2000 ps         ;
+-------------------------+--------------+-----------------+-----------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Slow Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          ;
+------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin              ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; BUS_A[1]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[2]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[3]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[4]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[5]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[6]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[7]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[8]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[9]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[10]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[11]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[12]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[13]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[14]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[15]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[16]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[17]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[18]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[19]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[20]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00566 V          ; 0.066 V                              ; 0.016 V                              ; 6.89e-010 s                 ; 6.77e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00566 V         ; 0.066 V                             ; 0.016 V                             ; 6.89e-010 s                ; 6.77e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[21]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[22]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[23]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[24]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00566 V          ; 0.066 V                              ; 0.016 V                              ; 6.89e-010 s                 ; 6.77e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00566 V         ; 0.066 V                             ; 0.016 V                             ; 6.89e-010 s                ; 6.77e-010 s                ; Yes                       ; Yes                       ;
; BUS_FLASH_NCS    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_FLASH_NRESET ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00566 V          ; 0.066 V                              ; 0.016 V                              ; 6.89e-010 s                 ; 6.77e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00566 V         ; 0.066 V                             ; 0.016 V                             ; 6.89e-010 s                ; 6.77e-010 s                ; Yes                       ; Yes                       ;
; BUS_NBE[0]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_NBE[1]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_NBE[2]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_NBE[3]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00566 V          ; 0.066 V                              ; 0.016 V                              ; 6.89e-010 s                 ; 6.77e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00566 V         ; 0.066 V                             ; 0.016 V                             ; 6.89e-010 s                ; 6.77e-010 s                ; Yes                       ; Yes                       ;
; BUS_NOE          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_NWE          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_RAM_NCS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_SDRAM_CKE    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_SDRAM_CLK    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_SDRAM_NCAS   ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_SDRAM_NCS    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_SDRAM_NRAS   ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_USB_DACK     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_USB_NCS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_USB_NRESET   ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; JTAG_NEXUS_TDO   ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SPI_CLK          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SPI_DOUT         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SPI_MODE         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00566 V          ; 0.066 V                              ; 0.016 V                              ; 6.89e-010 s                 ; 6.77e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00566 V         ; 0.066 V                             ; 0.016 V                             ; 6.89e-010 s                ; 6.77e-010 s                ; Yes                       ; Yes                       ;
; SPI_SEL          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[0]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[1]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[2]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[3]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[4]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[5]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[6]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[7]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.33 V              ; -0.00205 V          ; 0.092 V                              ; 0.051 V                              ; 3.98e-009 s                 ; 3.76e-009 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.33 V             ; -0.00205 V         ; 0.092 V                             ; 0.051 V                             ; 3.98e-009 s                ; 3.76e-009 s                ; Yes                       ; Yes                       ;
; SRAM0_A[8]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[9]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00566 V          ; 0.066 V                              ; 0.016 V                              ; 6.89e-010 s                 ; 6.77e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00566 V         ; 0.066 V                             ; 0.016 V                             ; 6.89e-010 s                ; 6.77e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[10]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[11]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[12]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[13]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[14]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.33 V              ; -0.00205 V          ; 0.092 V                              ; 0.051 V                              ; 3.98e-009 s                 ; 3.76e-009 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.33 V             ; -0.00205 V         ; 0.092 V                             ; 0.051 V                             ; 3.98e-009 s                ; 3.76e-009 s                ; Yes                       ; Yes                       ;
; SRAM0_A[15]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[16]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[17]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_E          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_LB         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_OE         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_UB         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_W          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[0]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[1]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.33 V              ; -0.00201 V          ; 0.092 V                              ; 0.05 V                               ; 3.78e-009 s                 ; 3.59e-009 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.33 V             ; -0.00201 V         ; 0.092 V                             ; 0.05 V                              ; 3.78e-009 s                ; 3.59e-009 s                ; Yes                       ; Yes                       ;
; SRAM1_A[2]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[3]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[4]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[5]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[6]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.33 V              ; -0.00205 V          ; 0.092 V                              ; 0.051 V                              ; 3.98e-009 s                 ; 3.76e-009 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.33 V             ; -0.00205 V         ; 0.092 V                             ; 0.051 V                             ; 3.98e-009 s                ; 3.76e-009 s                ; Yes                       ; Yes                       ;
; SRAM1_A[7]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[8]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[9]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[10]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[11]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[12]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[13]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.33 V              ; -0.00205 V          ; 0.092 V                              ; 0.051 V                              ; 3.98e-009 s                 ; 3.76e-009 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.33 V             ; -0.00205 V         ; 0.092 V                             ; 0.051 V                             ; 3.98e-009 s                ; 3.76e-009 s                ; Yes                       ; Yes                       ;
; SRAM1_A[14]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[15]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[16]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[17]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_E          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_LB         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_OE         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_UB         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_W          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.33 V              ; -0.00205 V          ; 0.092 V                              ; 0.051 V                              ; 3.98e-009 s                 ; 3.76e-009 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.33 V             ; -0.00205 V         ; 0.092 V                             ; 0.051 V                             ; 3.98e-009 s                ; 3.76e-009 s                ; Yes                       ; Yes                       ;
; TFT_BLIGHT       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_CS           ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_RD           ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_RESET        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.33 V              ; -0.00201 V          ; 0.092 V                              ; 0.05 V                               ; 3.78e-009 s                 ; 3.59e-009 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.33 V             ; -0.00201 V         ; 0.092 V                             ; 0.05 V                              ; 3.78e-009 s                ; 3.59e-009 s                ; Yes                       ; Yes                       ;
; TFT_RS           ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_WR           ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[0]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[1]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[2]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[3]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[4]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[5]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[6]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[7]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[8]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[9]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[10]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[11]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[12]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.33 V              ; -0.00205 V          ; 0.092 V                              ; 0.051 V                              ; 3.98e-009 s                 ; 3.76e-009 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.33 V             ; -0.00205 V         ; 0.092 V                             ; 0.051 V                             ; 3.98e-009 s                ; 3.76e-009 s                ; Yes                       ; Yes                       ;
; BUS_D[13]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[14]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[15]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[16]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[17]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[18]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[19]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[20]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[21]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[22]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[23]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[24]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[25]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[26]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[27]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[28]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00566 V          ; 0.066 V                              ; 0.016 V                              ; 6.89e-010 s                 ; 6.77e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00566 V         ; 0.066 V                             ; 0.016 V                             ; 6.89e-010 s                ; 6.77e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[29]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[30]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[31]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[0]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[1]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[2]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[3]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[4]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[5]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[6]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[7]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[8]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[9]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[10]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[11]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[12]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[13]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[14]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[15]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[0]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[1]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[2]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[3]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[4]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[5]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[6]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[7]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[8]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[9]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00566 V          ; 0.066 V                              ; 0.016 V                              ; 6.89e-010 s                 ; 6.77e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00566 V         ; 0.066 V                             ; 0.016 V                             ; 6.89e-010 s                ; 6.77e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[10]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[11]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 1.95e-007 V                  ; 2.34 V              ; -0.00564 V          ; 0.078 V                              ; 0.022 V                              ; 9.09e-010 s                 ; 8.83e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 1.95e-007 V                 ; 2.34 V             ; -0.00564 V         ; 0.078 V                             ; 0.022 V                             ; 9.09e-010 s                ; 8.83e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[12]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[13]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[14]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[15]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[0]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[1]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[2]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[3]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[4]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[5]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[6]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[7]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[8]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[9]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[10]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[11]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[12]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[13]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[14]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[15]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.32 V                       ; 2.9e-007 V                   ; 2.35 V              ; -0.00118 V          ; 0.061 V                              ; 0.002 V                              ; 4.84e-010 s                 ; 4.97e-010 s                 ; Yes                        ; Yes                        ; 2.32 V                      ; 2.9e-007 V                  ; 2.35 V             ; -0.00118 V         ; 0.061 V                             ; 0.002 V                             ; 4.84e-010 s                ; 4.97e-010 s                ; Yes                       ; Yes                       ;
+------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fast Corner Signal Integrity Metrics                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          ;
+------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; Pin              ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ;
+------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+
; BUS_A[1]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[2]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[3]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[4]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[5]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[6]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[7]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[8]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[9]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[10]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[11]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[12]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[13]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[14]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[15]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[16]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[17]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[18]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[19]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_A[20]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.72 V              ; -0.0405 V           ; 0.163 V                              ; 0.077 V                              ; 4.51e-010 s                 ; 4.33e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.72 V             ; -0.0405 V          ; 0.163 V                             ; 0.077 V                             ; 4.51e-010 s                ; 4.33e-010 s                ; No                        ; Yes                       ;
; BUS_A[21]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[22]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[23]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_A[24]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.72 V              ; -0.0405 V           ; 0.163 V                              ; 0.077 V                              ; 4.51e-010 s                 ; 4.33e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.72 V             ; -0.0405 V          ; 0.163 V                             ; 0.077 V                             ; 4.51e-010 s                ; 4.33e-010 s                ; No                        ; Yes                       ;
; BUS_FLASH_NCS    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_FLASH_NRESET ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.72 V              ; -0.0405 V           ; 0.163 V                              ; 0.077 V                              ; 4.51e-010 s                 ; 4.33e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.72 V             ; -0.0405 V          ; 0.163 V                             ; 0.077 V                             ; 4.51e-010 s                ; 4.33e-010 s                ; No                        ; Yes                       ;
; BUS_NBE[0]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_NBE[1]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_NBE[2]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_NBE[3]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.72 V              ; -0.0405 V           ; 0.163 V                              ; 0.077 V                              ; 4.51e-010 s                 ; 4.33e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.72 V             ; -0.0405 V          ; 0.163 V                             ; 0.077 V                             ; 4.51e-010 s                ; 4.33e-010 s                ; No                        ; Yes                       ;
; BUS_NOE          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_NWE          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_RAM_NCS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_SDRAM_CKE    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_SDRAM_CLK    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_SDRAM_NCAS   ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_SDRAM_NCS    ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_SDRAM_NRAS   ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_USB_DACK     ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_USB_NCS      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_USB_NRESET   ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; JTAG_NEXUS_TDO   ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SPI_CLK          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SPI_DOUT         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SPI_MODE         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.72 V              ; -0.0405 V           ; 0.163 V                              ; 0.077 V                              ; 4.51e-010 s                 ; 4.33e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.72 V             ; -0.0405 V          ; 0.163 V                             ; 0.077 V                             ; 4.51e-010 s                ; 4.33e-010 s                ; No                        ; Yes                       ;
; SPI_SEL          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[0]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[1]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[2]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[3]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[4]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[5]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_A[6]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_A[7]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.64 V              ; -0.0109 V           ; 0.244 V                              ; 0.16 V                               ; 2.42e-009 s                 ; 2.37e-009 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.64 V             ; -0.0109 V          ; 0.244 V                             ; 0.16 V                              ; 2.42e-009 s                ; 2.37e-009 s                ; No                        ; Yes                       ;
; SRAM0_A[8]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_A[9]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.72 V              ; -0.0405 V           ; 0.163 V                              ; 0.077 V                              ; 4.51e-010 s                 ; 4.33e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.72 V             ; -0.0405 V          ; 0.163 V                             ; 0.077 V                             ; 4.51e-010 s                ; 4.33e-010 s                ; No                        ; Yes                       ;
; SRAM0_A[10]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_A[11]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_A[12]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_A[13]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_A[14]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.64 V              ; -0.0109 V           ; 0.244 V                              ; 0.16 V                               ; 2.42e-009 s                 ; 2.37e-009 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.64 V             ; -0.0109 V          ; 0.244 V                             ; 0.16 V                              ; 2.42e-009 s                ; 2.37e-009 s                ; No                        ; Yes                       ;
; SRAM0_A[15]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[16]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_A[17]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_E          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_LB         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_OE         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_UB         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_W          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_A[0]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[1]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.64 V              ; -0.011 V            ; 0.212 V                              ; 0.198 V                              ; 2.38e-009 s                 ; 2.29e-009 s                 ; No                         ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.64 V             ; -0.011 V           ; 0.212 V                             ; 0.198 V                             ; 2.38e-009 s                ; 2.29e-009 s                ; No                        ; Yes                       ;
; SRAM1_A[2]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[3]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[4]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[5]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_A[6]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.64 V              ; -0.0109 V           ; 0.244 V                              ; 0.16 V                               ; 2.42e-009 s                 ; 2.37e-009 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.64 V             ; -0.0109 V          ; 0.244 V                             ; 0.16 V                              ; 2.42e-009 s                ; 2.37e-009 s                ; No                        ; Yes                       ;
; SRAM1_A[7]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_A[8]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_A[9]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_A[10]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_A[11]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_A[12]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_A[13]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.64 V              ; -0.0109 V           ; 0.244 V                              ; 0.16 V                               ; 2.42e-009 s                 ; 2.37e-009 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.64 V             ; -0.0109 V          ; 0.244 V                             ; 0.16 V                              ; 2.42e-009 s                ; 2.37e-009 s                ; No                        ; Yes                       ;
; SRAM1_A[14]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_A[15]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[16]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_A[17]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_E          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_LB         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_OE         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_UB         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_W          ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.64 V              ; -0.0109 V           ; 0.244 V                              ; 0.16 V                               ; 2.42e-009 s                 ; 2.37e-009 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.64 V             ; -0.0109 V          ; 0.244 V                             ; 0.16 V                              ; 2.42e-009 s                ; 2.37e-009 s                ; No                        ; Yes                       ;
; TFT_BLIGHT       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_CS           ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_RD           ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_RESET        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.64 V              ; -0.011 V            ; 0.212 V                              ; 0.198 V                              ; 2.38e-009 s                 ; 2.29e-009 s                 ; No                         ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.64 V             ; -0.011 V           ; 0.212 V                             ; 0.198 V                             ; 2.38e-009 s                ; 2.29e-009 s                ; No                        ; Yes                       ;
; TFT_RS           ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_WR           ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; BUS_D[0]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[1]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[2]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[3]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[4]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[5]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[6]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[7]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[8]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[9]         ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[10]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[11]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[12]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.64 V              ; -0.0109 V           ; 0.244 V                              ; 0.16 V                               ; 2.42e-009 s                 ; 2.37e-009 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.64 V             ; -0.0109 V          ; 0.244 V                             ; 0.16 V                              ; 2.42e-009 s                ; 2.37e-009 s                ; No                        ; Yes                       ;
; BUS_D[13]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[14]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[15]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[16]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[17]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[18]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[19]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[20]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[21]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[22]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[23]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[24]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[25]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[26]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[27]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[28]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.72 V              ; -0.0405 V           ; 0.163 V                              ; 0.077 V                              ; 4.51e-010 s                 ; 4.33e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.72 V             ; -0.0405 V          ; 0.163 V                             ; 0.077 V                             ; 4.51e-010 s                ; 4.33e-010 s                ; No                        ; Yes                       ;
; BUS_D[29]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[30]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; BUS_D[31]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_D[0]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[1]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[2]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[3]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[4]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_D[5]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_D[6]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_D[7]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_D[8]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_D[9]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_D[10]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_D[11]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM0_D[12]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[13]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[14]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM0_D[15]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[0]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[1]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[2]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[3]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[4]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[5]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_D[6]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_D[7]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_D[8]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_D[9]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.72 V              ; -0.0405 V           ; 0.163 V                              ; 0.077 V                              ; 4.51e-010 s                 ; 4.33e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.72 V             ; -0.0405 V          ; 0.163 V                             ; 0.077 V                             ; 4.51e-010 s                ; 4.33e-010 s                ; No                        ; Yes                       ;
; SRAM1_D[10]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_D[11]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 2.78e-008 V                  ; 2.71 V              ; -0.0343 V           ; 0.253 V                              ; 0.066 V                              ; 4.96e-010 s                 ; 5.19e-010 s                 ; No                         ; Yes                        ; 2.62 V                      ; 2.78e-008 V                 ; 2.71 V             ; -0.0343 V          ; 0.253 V                             ; 0.066 V                             ; 4.96e-010 s                ; 5.19e-010 s                ; No                        ; Yes                       ;
; SRAM1_D[12]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[13]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[14]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; SRAM1_D[15]      ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[0]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[1]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[2]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[3]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[4]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[5]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[6]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[7]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[8]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[9]        ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[10]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[11]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[12]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[13]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[14]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
; TFT_DB[15]       ; 2.5 V        ; 0 s                 ; 0 s                 ; 2.62 V                       ; 4.11e-008 V                  ; 2.73 V              ; -0.0561 V           ; 0.191 V                              ; 0.122 V                              ; 2.69e-010 s                 ; 2.76e-010 s                 ; Yes                        ; Yes                        ; 2.62 V                      ; 4.11e-008 V                 ; 2.73 V             ; -0.0561 V          ; 0.191 V                             ; 0.122 V                             ; 2.69e-010 s                ; 2.76e-010 s                ; Yes                       ; Yes                       ;
+------------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
    Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
    Info: Copyright (C) 1991-2009 Altera Corporation. All rights reserved.
    Info: Your use of Altera Corporation's design tools, logic functions 
    Info: and other software and tools, and its AMPP partner logic 
    Info: functions, and any output files from any of the foregoing 
    Info: (including device programming or simulation files), and any 
    Info: associated documentation or information are expressly subject 
    Info: to the terms and conditions of the Altera Program License 
    Info: Subscription Agreement, Altera MegaCore Function License 
    Info: Agreement, or other applicable license agreement, including, 
    Info: without limitation, that your use is for the sole purpose of 
    Info: programming logic devices manufactured by Altera and sold by 
    Info: Altera or its authorized distributors.  Please refer to the 
    Info: applicable agreement for further details.
    Info: Processing started: Tue Apr 08 23:12:50 2014
Info: Command: quartus_tan NB3000AL_Slideshow
Info: Started post-fitting delay annotation
Info: Delay annotation completed successfully
Warning: Found USE_TIMEQUEST_TIMING_ANALYZER=ON. The Classic Timing Analyzer is not the default timing analysis tool during full compilation
Warning: Timing Analysis is analyzing one or more combinational loops as latches
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[24]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[25]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[30]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[31]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[27]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[29]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[26]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[23]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[22]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[21]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[19]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[20]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[17]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[18]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[15]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[16]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[13]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[14]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[11]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[12]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[10]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[9]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[8]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[7]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[6]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[5]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[4]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[3]" is a latch
    Warning: Node "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[2]" is a latch
Warning: Clock latency analysis for PLL offsets is supported for the current device family, but is not enabled
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node "JTAG_NEXUS_TCK" is an undefined clock
    Info: Assuming node "TEST_BUTTON" is a latch enable and/or memory write/read enable. Will not compute fmax for this pin.
Warning: Clock Setting "CLK_REF" is unassigned
Warning: Clock Setting "JTAG_NEXUS_TCK" is unassigned
Warning: Found 2 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew
    Info: Detected ripple clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|pll_lock_sync" as buffer
    Info: Detected gated clock "PinSignal_U5_O~0" as buffer
Info: Found timing assignments -- calculating delays
Info: Slack time is -4.609 ns for clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" between source memory "Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg" and destination register "TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25"
    Info: Fmax is 33.77 MHz (period= 29.609 ns)
    Info: + Largest memory to register requirement is 24.345 ns
        Info: + Setup relationship between source and destination is 25.000 ns
            Info: + Latch edge is 22.529 ns
                Info: Clock period of Destination clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" is 25.000 ns with  offset of -2.471 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
            Info: - Launch edge is -2.471 ns
                Info: Clock period of Source clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" is 25.000 ns with  offset of -2.471 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
        Info: + Largest clock skew is -0.382 ns
            Info: + Shortest clock path from clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" to destination register is 4.376 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]'
                Info: 2: + IC(2.372 ns) + CELL(0.000 ns) = 2.372 ns; Loc. = CLKCTRL_G18; Fanout = 5896; COMB Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]~clkctrl'
                Info: 3: + IC(1.324 ns) + CELL(0.680 ns) = 4.376 ns; Loc. = FF_X34_Y14_N27; Fanout = 3; REG Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25'
                Info: Total cell delay = 0.680 ns ( 15.54 % )
                Info: Total interconnect delay = 3.696 ns ( 84.46 % )
            Info: - Longest clock path from clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" to source memory is 4.758 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]'
                Info: 2: + IC(2.372 ns) + CELL(0.000 ns) = 2.372 ns; Loc. = CLKCTRL_G18; Fanout = 5896; COMB Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]~clkctrl'
                Info: 3: + IC(1.355 ns) + CELL(1.031 ns) = 4.758 ns; Loc. = M9K_X40_Y18_N0; Fanout = 2; MEM Node = 'Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg'
                Info: Total cell delay = 1.031 ns ( 21.67 % )
                Info: Total interconnect delay = 3.727 ns ( 78.33 % )
        Info: - Micro clock to output delay of source is 0.294 ns
        Info: - Micro setup delay of destination is -0.021 ns
    Info: - Longest memory to register delay is 28.954 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M9K_X40_Y18_N0; Fanout = 2; MEM Node = 'Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|ram_block1a0~portb_we_reg'
        Info: 2: + IC(0.000 ns) + CELL(3.251 ns) = 3.251 ns; Loc. = M9K_X40_Y18_N0; Fanout = 1; MEM Node = 'Memory_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1:Memory_MCU_u1_component|altsyncram:altsyncram_component|altsyncram_5qf2:auto_generated|q_b[1]'
        Info: 3: + IC(1.800 ns) + CELL(0.398 ns) = 5.449 ns; Loc. = LCCOMB_X51_Y15_N4; Fanout = 1; COMB Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|MemoryManager:U_MemoryManager|DMem_DataOut_0_0_0_0_0'
        Info: 4: + IC(2.113 ns) + CELL(0.421 ns) = 7.983 ns; Loc. = LCCOMB_X37_Y14_N20; Fanout = 1; COMB Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|RegisterFile:U_RegisterFile|StackPointer_2_0_0_1__g2_1_5908_i_a6_0'
        Info: 5: + IC(1.534 ns) + CELL(0.324 ns) = 9.841 ns; Loc. = LCCOMB_X35_Y13_N4; Fanout = 12; COMB Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|RegisterFile:U_RegisterFile|StackPointer_2_0_0_1__g2_1_5908_i_a6'
        Info: 6: + IC(0.340 ns) + CELL(0.455 ns) = 10.636 ns; Loc. = LCCOMB_X35_Y13_N24; Fanout = 2; COMB Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|DataHazardResolverA:U_DataHazardResolverA|ResolvedA_0_0_0_0_1'
        Info: 7: + IC(1.716 ns) + CELL(0.177 ns) = 12.529 ns; Loc. = LCCOMB_X35_Y20_N0; Fanout = 14; COMB Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|DataHazardResolverA:U_DataHazardResolverA|ResolvedA_2_0_0_1'
        Info: 8: + IC(3.103 ns) + CELL(0.471 ns) = 16.103 ns; Loc. = LCCOMB_X44_Y13_N24; Fanout = 127; COMB Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|PipeStage_Execute:U_Execute|ShiftAmountMux:U_ShiftAmountMux|ShiftAmount_0_0_0_1_x_1'
        Info: 9: + IC(2.632 ns) + CELL(0.177 ns) = 18.912 ns; Loc. = LCCOMB_X30_Y15_N8; Fanout = 1; COMB Node = 'TSK3000A_Shift_Barrel:U_NB3000AL_Slideshow_System_MCU_SubPart_Shifter|Shift_Barrel:U_Shift_Barrel|Shift2R_a[29]'
        Info: 10: + IC(0.301 ns) + CELL(0.496 ns) = 19.709 ns; Loc. = LCCOMB_X30_Y15_N18; Fanout = 4; COMB Node = 'TSK3000A_Shift_Barrel:U_NB3000AL_Slideshow_System_MCU_SubPart_Shifter|Shift_Barrel:U_Shift_Barrel|Shift2R[29]'
        Info: 11: + IC(0.931 ns) + CELL(0.455 ns) = 21.095 ns; Loc. = LCCOMB_X30_Y19_N8; Fanout = 3; COMB Node = 'TSK3000A_Shift_Barrel:U_NB3000AL_Slideshow_System_MCU_SubPart_Shifter|Shift_Barrel:U_Shift_Barrel|Shift4R_x[25]'
        Info: 12: + IC(0.882 ns) + CELL(0.472 ns) = 22.449 ns; Loc. = LCCOMB_X30_Y18_N6; Fanout = 1; COMB Node = 'TSK3000A_Shift_Barrel:U_NB3000AL_Slideshow_System_MCU_SubPart_Shifter|Shift_Barrel:U_Shift_Barrel|DataOut_1_Z[25]'
        Info: 13: + IC(0.449 ns) + CELL(0.177 ns) = 23.075 ns; Loc. = LCCOMB_X29_Y18_N8; Fanout = 1; COMB Node = 'TSK3000A_Shift_Barrel:U_NB3000AL_Slideshow_System_MCU_SubPart_Shifter|Shift_Barrel:U_Shift_Barrel|DataOut_a[25]'
        Info: 14: + IC(0.263 ns) + CELL(0.324 ns) = 23.662 ns; Loc. = LCCOMB_X29_Y18_N26; Fanout = 1; COMB Node = 'TSK3000A_Shift_Barrel:U_NB3000AL_Slideshow_System_MCU_SubPart_Shifter|Shift_Barrel:U_Shift_Barrel|DataOut_25'
        Info: 15: + IC(1.845 ns) + CELL(0.448 ns) = 25.955 ns; Loc. = LCCOMB_X34_Y14_N2; Fanout = 1; COMB Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_2_0_0_25__g2_0_5658_i_a7_2'
        Info: 16: + IC(0.300 ns) + CELL(0.473 ns) = 26.728 ns; Loc. = LCCOMB_X34_Y14_N10; Fanout = 1; COMB Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_2_0_0_25__g2_0_5658_i_a7_5'
        Info: 17: + IC(0.310 ns) + CELL(0.472 ns) = 27.510 ns; Loc. = LCCOMB_X34_Y14_N16; Fanout = 1; COMB Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_2_0_0_25__g2_0_5658_i_a7_6'
        Info: 18: + IC(0.842 ns) + CELL(0.487 ns) = 28.839 ns; Loc. = LCCOMB_X34_Y14_N26; Fanout = 1; COMB Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_2_0_0_25__g2_0_5658_i'
        Info: 19: + IC(0.000 ns) + CELL(0.115 ns) = 28.954 ns; Loc. = FF_X34_Y14_N27; Fanout = 3; REG Node = 'TSK3000A_MCU:U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_EX_MEM:U_Regs_EX_MEM|Reg_Result_25'
        Info: Total cell delay = 9.593 ns ( 33.13 % )
        Info: Total interconnect delay = 19.361 ns ( 66.87 % )
Warning: Can't achieve timing requirement Clock Setup: 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]' along 458 path(s). See Report window for details.
Info: Slack time is 45.22 ns for clock "CLK_REF" between source register "FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1]" and destination register "FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7]"
    Info: Fmax is 209.21 MHz (period= 4.78 ns)
    Info: + Largest register to register requirement is 49.760 ns
        Info: + Setup relationship between source and destination is 50.000 ns
            Info: + Latch edge is 50.000 ns
                Info: Clock period of Destination clock "CLK_REF" is 50.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
            Info: - Launch edge is 0.000 ns
                Info: Clock period of Source clock "CLK_REF" is 50.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
        Info: + Largest clock skew is 0.000 ns
            Info: + Shortest clock path from clock "CLK_REF" to destination register is 3.185 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AH14; Fanout = 1; CLK Node = 'CLK_REF'
                Info: 2: + IC(0.000 ns) + CELL(0.964 ns) = 0.964 ns; Loc. = IOIBUF_X36_Y0_N15; Fanout = 1; COMB Node = 'CLK_REF~input'
                Info: 3: + IC(0.197 ns) + CELL(0.000 ns) = 1.161 ns; Loc. = CLKCTRL_G19; Fanout = 10; COMB Node = 'CLK_REF~inputclkctrl'
                Info: 4: + IC(1.344 ns) + CELL(0.680 ns) = 3.185 ns; Loc. = FF_X33_Y41_N21; Fanout = 3; REG Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7]'
                Info: Total cell delay = 1.644 ns ( 51.62 % )
                Info: Total interconnect delay = 1.541 ns ( 48.38 % )
            Info: - Longest clock path from clock "CLK_REF" to source register is 3.185 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AH14; Fanout = 1; CLK Node = 'CLK_REF'
                Info: 2: + IC(0.000 ns) + CELL(0.964 ns) = 0.964 ns; Loc. = IOIBUF_X36_Y0_N15; Fanout = 1; COMB Node = 'CLK_REF~input'
                Info: 3: + IC(0.197 ns) + CELL(0.000 ns) = 1.161 ns; Loc. = CLKCTRL_G19; Fanout = 10; COMB Node = 'CLK_REF~inputclkctrl'
                Info: 4: + IC(1.344 ns) + CELL(0.680 ns) = 3.185 ns; Loc. = FF_X33_Y41_N15; Fanout = 6; REG Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1]'
                Info: Total cell delay = 1.644 ns ( 51.62 % )
                Info: Total interconnect delay = 1.541 ns ( 48.38 % )
        Info: - Micro clock to output delay of source is 0.261 ns
        Info: - Micro setup delay of destination is -0.021 ns
    Info: - Longest register to register delay is 4.540 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X33_Y41_N15; Fanout = 6; REG Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[1]'
        Info: 2: + IC(0.613 ns) + CELL(0.552 ns) = 1.165 ns; Loc. = LCCOMB_X34_Y41_N2; Fanout = 2; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|lt_1'
        Info: 3: + IC(0.000 ns) + CELL(0.073 ns) = 1.238 ns; Loc. = LCCOMB_X34_Y41_N4; Fanout = 2; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|lt_2'
        Info: 4: + IC(0.000 ns) + CELL(0.073 ns) = 1.311 ns; Loc. = LCCOMB_X34_Y41_N6; Fanout = 2; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|lt_3'
        Info: 5: + IC(0.000 ns) + CELL(0.073 ns) = 1.384 ns; Loc. = LCCOMB_X34_Y41_N8; Fanout = 2; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|lt_4'
        Info: 6: + IC(0.000 ns) + CELL(0.073 ns) = 1.457 ns; Loc. = LCCOMB_X34_Y41_N10; Fanout = 2; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|lt_5'
        Info: 7: + IC(0.000 ns) + CELL(0.073 ns) = 1.530 ns; Loc. = LCCOMB_X34_Y41_N12; Fanout = 2; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|lt_6'
        Info: 8: + IC(0.000 ns) + CELL(0.073 ns) = 1.603 ns; Loc. = LCCOMB_X34_Y41_N14; Fanout = 1; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_2_8_cout'
        Info: 9: + IC(0.000 ns) + CELL(0.607 ns) = 2.210 ns; Loc. = LCCOMB_X34_Y41_N16; Fanout = 3; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_2'
        Info: 10: + IC(0.837 ns) + CELL(0.552 ns) = 3.599 ns; Loc. = LCCOMB_X33_Y41_N12; Fanout = 2; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_2_1_a_cout[0]'
        Info: 11: + IC(0.000 ns) + CELL(0.073 ns) = 3.672 ns; Loc. = LCCOMB_X33_Y41_N14; Fanout = 2; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_2_1_cout[1]'
        Info: 12: + IC(0.000 ns) + CELL(0.073 ns) = 3.745 ns; Loc. = LCCOMB_X33_Y41_N16; Fanout = 2; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_2_1_cout[3]'
        Info: 13: + IC(0.000 ns) + CELL(0.073 ns) = 3.818 ns; Loc. = LCCOMB_X33_Y41_N18; Fanout = 1; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_2_1_cout[5]'
        Info: 14: + IC(0.000 ns) + CELL(0.607 ns) = 4.425 ns; Loc. = LCCOMB_X33_Y41_N20; Fanout = 1; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_2_1[7]'
        Info: 15: + IC(0.000 ns) + CELL(0.115 ns) = 4.540 ns; Loc. = FF_X33_Y41_N21; Fanout = 3; REG Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[7]'
        Info: Total cell delay = 3.090 ns ( 68.06 % )
        Info: Total interconnect delay = 1.450 ns ( 31.94 % )
Info: Clock "JTAG_NEXUS_TCK" has Internal fmax of 150.02 MHz between source register "TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z" and destination register "TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_8__Z" (period= 6.666 ns)
    Info: + Longest register to register delay is 6.423 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X39_Y12_N13; Fanout = 16; REG Node = 'TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z'
        Info: 2: + IC(1.100 ns) + CELL(0.487 ns) = 1.587 ns; Loc. = LCCOMB_X41_Y12_N8; Fanout = 3; COMB Node = 'TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|un2_clockdr_0_a2'
        Info: 3: + IC(1.118 ns) + CELL(0.453 ns) = 3.158 ns; Loc. = LCCOMB_X43_Y12_N10; Fanout = 32; COMB Node = 'TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_scalar'
        Info: 4: + IC(2.470 ns) + CELL(0.795 ns) = 6.423 ns; Loc. = FF_X29_Y15_N31; Fanout = 2; REG Node = 'TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_8__Z'
        Info: Total cell delay = 1.735 ns ( 27.01 % )
        Info: Total interconnect delay = 4.688 ns ( 72.99 % )
    Info: - Smallest clock skew is -0.003 ns
        Info: + Shortest clock path from clock "JTAG_NEXUS_TCK" to destination register is 3.259 ns
            Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_Y27; Fanout = 1; CLK Node = 'JTAG_NEXUS_TCK'
            Info: 2: + IC(0.000 ns) + CELL(1.048 ns) = 1.048 ns; Loc. = IOIBUF_X67_Y22_N15; Fanout = 1; COMB Node = 'JTAG_NEXUS_TCK~input'
            Info: 3: + IC(0.197 ns) + CELL(0.000 ns) = 1.245 ns; Loc. = CLKCTRL_G9; Fanout = 190; COMB Node = 'JTAG_NEXUS_TCK~inputclkctrl'
            Info: 4: + IC(1.334 ns) + CELL(0.680 ns) = 3.259 ns; Loc. = FF_X29_Y15_N31; Fanout = 2; REG Node = 'TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|DataRegister:tsk3000_DebugDataRegister|NexusReg_Shift_8__Z'
            Info: Total cell delay = 1.728 ns ( 53.02 % )
            Info: Total interconnect delay = 1.531 ns ( 46.98 % )
        Info: - Longest clock path from clock "JTAG_NEXUS_TCK" to source register is 3.262 ns
            Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_Y27; Fanout = 1; CLK Node = 'JTAG_NEXUS_TCK'
            Info: 2: + IC(0.000 ns) + CELL(1.048 ns) = 1.048 ns; Loc. = IOIBUF_X67_Y22_N15; Fanout = 1; COMB Node = 'JTAG_NEXUS_TCK~input'
            Info: 3: + IC(0.197 ns) + CELL(0.000 ns) = 1.245 ns; Loc. = CLKCTRL_G9; Fanout = 190; COMB Node = 'JTAG_NEXUS_TCK~inputclkctrl'
            Info: 4: + IC(1.337 ns) + CELL(0.680 ns) = 3.262 ns; Loc. = FF_X39_Y12_N13; Fanout = 16; REG Node = 'TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|tapstate_r_i_0_1__Z'
            Info: Total cell delay = 1.728 ns ( 52.97 % )
            Info: Total interconnect delay = 1.534 ns ( 47.03 % )
    Info: + Micro clock to output delay of source is 0.261 ns
    Info: + Micro setup delay of destination is -0.021 ns
Info: Minimum slack time is 646 ps for clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" between source register "BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_31|lpm_ff:ff1|dffs[0]" and destination register "BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_31|lpm_ff:ff1|dffs[0]"
    Info: + Shortest register to register delay is 0.597 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X48_Y24_N1; Fanout = 2; REG Node = 'BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_31|lpm_ff:ff1|dffs[0]'
        Info: 2: + IC(0.000 ns) + CELL(0.482 ns) = 0.482 ns; Loc. = LCCOMB_X48_Y24_N0; Fanout = 1; COMB Node = 'BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|n711~0'
        Info: 3: + IC(0.000 ns) + CELL(0.115 ns) = 0.597 ns; Loc. = FF_X48_Y24_N1; Fanout = 2; REG Node = 'BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_31|lpm_ff:ff1|dffs[0]'
        Info: Total cell delay = 0.597 ns ( 100.00 % )
    Info: - Smallest register to register requirement is -0.049 ns
        Info: + Hold relationship between source and destination is 0.000 ns
            Info: + Latch edge is -2.471 ns
                Info: Clock period of Destination clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" is 25.000 ns with  offset of -2.471 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
                Info: Multicycle Hold factor for Destination register is 1
            Info: - Launch edge is -2.471 ns
                Info: Clock period of Source clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" is 25.000 ns with  offset of -2.471 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
                Info: Multicycle Hold factor for Source register is 1
        Info: + Smallest clock skew is 0.000 ns
            Info: + Longest clock path from clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" to destination register is 4.399 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]'
                Info: 2: + IC(2.372 ns) + CELL(0.000 ns) = 2.372 ns; Loc. = CLKCTRL_G18; Fanout = 5896; COMB Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]~clkctrl'
                Info: 3: + IC(1.347 ns) + CELL(0.680 ns) = 4.399 ns; Loc. = FF_X48_Y24_N1; Fanout = 2; REG Node = 'BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_31|lpm_ff:ff1|dffs[0]'
                Info: Total cell delay = 0.680 ns ( 15.46 % )
                Info: Total interconnect delay = 3.719 ns ( 84.54 % )
            Info: - Shortest clock path from clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" to source register is 4.399 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]'
                Info: 2: + IC(2.372 ns) + CELL(0.000 ns) = 2.372 ns; Loc. = CLKCTRL_G18; Fanout = 5896; COMB Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]~clkctrl'
                Info: 3: + IC(1.347 ns) + CELL(0.680 ns) = 4.399 ns; Loc. = FF_X48_Y24_N1; Fanout = 2; REG Node = 'BOOTLOADER_MASTER:U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:INST_me_DAT_O_31|lpm_ff:ff1|dffs[0]'
                Info: Total cell delay = 0.680 ns ( 15.46 % )
                Info: Total interconnect delay = 3.719 ns ( 84.54 % )
        Info: - Micro clock to output delay of source is 0.261 ns
        Info: + Micro hold delay of destination is 0.212 ns
Info: Minimum slack time is 884 ps for clock "CLK_REF" between source register "FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5]" and destination register "FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6]"
    Info: + Shortest register to register delay is 0.835 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X33_Y41_N19; Fanout = 5; REG Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5]'
        Info: 2: + IC(0.543 ns) + CELL(0.177 ns) = 0.720 ns; Loc. = LCCOMB_X34_Y41_N28; Fanout = 1; COMB Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_2_1[6]'
        Info: 3: + IC(0.000 ns) + CELL(0.115 ns) = 0.835 ns; Loc. = FF_X34_Y41_N29; Fanout = 5; REG Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6]'
        Info: Total cell delay = 0.292 ns ( 34.97 % )
        Info: Total interconnect delay = 0.543 ns ( 65.03 % )
    Info: - Smallest register to register requirement is -0.049 ns
        Info: + Hold relationship between source and destination is 0.000 ns
            Info: + Latch edge is 0.000 ns
                Info: Clock period of Destination clock "CLK_REF" is 50.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Destination register is 1
                Info: Multicycle Hold factor for Destination register is 1
            Info: - Launch edge is 0.000 ns
                Info: Clock period of Source clock "CLK_REF" is 50.000 ns with  offset of 0.000 ns and duty cycle of 50
                Info: Multicycle Setup factor for Source register is 1
                Info: Multicycle Hold factor for Source register is 1
        Info: + Smallest clock skew is 0.000 ns
            Info: + Longest clock path from clock "CLK_REF" to destination register is 3.185 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AH14; Fanout = 1; CLK Node = 'CLK_REF'
                Info: 2: + IC(0.000 ns) + CELL(0.964 ns) = 0.964 ns; Loc. = IOIBUF_X36_Y0_N15; Fanout = 1; COMB Node = 'CLK_REF~input'
                Info: 3: + IC(0.197 ns) + CELL(0.000 ns) = 1.161 ns; Loc. = CLKCTRL_G19; Fanout = 10; COMB Node = 'CLK_REF~inputclkctrl'
                Info: 4: + IC(1.344 ns) + CELL(0.680 ns) = 3.185 ns; Loc. = FF_X34_Y41_N29; Fanout = 5; REG Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[6]'
                Info: Total cell delay = 1.644 ns ( 51.62 % )
                Info: Total interconnect delay = 1.541 ns ( 48.38 % )
            Info: - Shortest clock path from clock "CLK_REF" to source register is 3.185 ns
                Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AH14; Fanout = 1; CLK Node = 'CLK_REF'
                Info: 2: + IC(0.000 ns) + CELL(0.964 ns) = 0.964 ns; Loc. = IOIBUF_X36_Y0_N15; Fanout = 1; COMB Node = 'CLK_REF~input'
                Info: 3: + IC(0.197 ns) + CELL(0.000 ns) = 1.161 ns; Loc. = CLKCTRL_G19; Fanout = 10; COMB Node = 'CLK_REF~inputclkctrl'
                Info: 4: + IC(1.344 ns) + CELL(0.680 ns) = 3.185 ns; Loc. = FF_X33_Y41_N19; Fanout = 5; REG Node = 'FPGA_STARTUP8:U3|FPGA_STARTUP8_CTRL:U_FPGA_STARTUP8_CTRL|drt_count_1[5]'
                Info: Total cell delay = 1.644 ns ( 51.62 % )
                Info: Total interconnect delay = 1.541 ns ( 48.38 % )
        Info: - Micro clock to output delay of source is 0.261 ns
        Info: + Micro hold delay of destination is 0.212 ns
Info: tsu for register "Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_read_ack|lpm_ff:ff1|dffs[0]" (data pin = "TEST_BUTTON", clock pin = "CLK_REF") is 19.218 ns
    Info: + Longest pin to register delay is 21.145 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AG12; Fanout = 1; CLK Node = 'TEST_BUTTON'
        Info: 2: + IC(0.000 ns) + CELL(0.964 ns) = 0.964 ns; Loc. = IOIBUF_X34_Y0_N22; Fanout = 2; COMB Node = 'TEST_BUTTON~input'
        Info: 3: + IC(4.450 ns) + CELL(0.324 ns) = 5.738 ns; Loc. = LCCOMB_X46_Y10_N30; Fanout = 309; COMB Node = 'PinSignal_U5_O~0'
        Info: 4: + IC(2.349 ns) + CELL(0.177 ns) = 8.264 ns; Loc. = LCCOMB_X52_Y18_N22; Fanout = 127; COMB Node = 'PinSignal_U5_O~0_wirecell'
        Info: 5: + IC(2.040 ns) + CELL(0.491 ns) = 10.795 ns; Loc. = LCCOMB_X52_Y24_N0; Fanout = 7; COMB Node = 'WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_10_28'
        Info: 6: + IC(1.409 ns) + CELL(0.324 ns) = 12.528 ns; Loc. = LCCOMB_X52_Y24_N24; Fanout = 1; COMB Node = 'Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|s_or8:n2u|OUT~0'
        Info: 7: + IC(0.299 ns) + CELL(0.473 ns) = 13.300 ns; Loc. = LCCOMB_X52_Y24_N26; Fanout = 6; COMB Node = 'Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|s_or8:n2u|OUT~1'
        Info: 8: + IC(0.602 ns) + CELL(0.177 ns) = 14.079 ns; Loc. = LCCOMB_X51_Y24_N14; Fanout = 8; COMB Node = 'Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|INST_s1_CYC_O'
        Info: 9: + IC(0.911 ns) + CELL(0.327 ns) = 15.317 ns; Loc. = LCCOMB_X50_Y26_N24; Fanout = 1; COMB Node = 'Configurable_MULTIMASTER_SHARED:U_NB3000AL_Slideshow_System_MULTIMASTER_SHARED|INST_m0_CYC_O~0'
        Info: 10: + IC(1.099 ns) + CELL(0.177 ns) = 16.593 ns; Loc. = LCCOMB_X44_Y26_N4; Fanout = 12; COMB Node = 'Configurable_MULTIMASTER_SHARED:U_NB3000AL_Slideshow_System_MULTIMASTER_SHARED|INST_m0_CYC_O'
        Info: 11: + IC(1.125 ns) + CELL(0.177 ns) = 17.895 ns; Loc. = LCCOMB_X52_Y26_N14; Fanout = 2; COMB Node = 'Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|n4p~0'
        Info: 12: + IC(0.521 ns) + CELL(0.177 ns) = 18.593 ns; Loc. = LCCOMB_X52_Y26_N0; Fanout = 2; COMB Node = 'Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|State_Next_state_read_ack~0'
        Info: 13: + IC(2.260 ns) + CELL(0.177 ns) = 21.030 ns; Loc. = LCCOMB_X52_Y15_N8; Fanout = 1; COMB Node = 'Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|State_state_read_ack_in'
        Info: 14: + IC(0.000 ns) + CELL(0.115 ns) = 21.145 ns; Loc. = FF_X52_Y15_N9; Fanout = 3; REG Node = 'Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_read_ack|lpm_ff:ff1|dffs[0]'
        Info: Total cell delay = 4.080 ns ( 19.30 % )
        Info: Total interconnect delay = 17.065 ns ( 80.70 % )
    Info: + Micro setup delay of destination is -0.021 ns
    Info: - Offset between input clock "CLK_REF" and output clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" is -2.471 ns
    Info: - Shortest clock path from clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" to destination register is 4.377 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]'
        Info: 2: + IC(2.372 ns) + CELL(0.000 ns) = 2.372 ns; Loc. = CLKCTRL_G18; Fanout = 5896; COMB Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]~clkctrl'
        Info: 3: + IC(1.325 ns) + CELL(0.680 ns) = 4.377 ns; Loc. = FF_X52_Y15_N9; Fanout = 3; REG Node = 'Configurable_SHARED_MEM:U_NB3000AL_Slideshow_System_SHARED_MEM|NB3000AL_Slideshow__AltSyn_AltiumAlteraDffAsync:State_state_read_ack|lpm_ff:ff1|dffs[0]'
        Info: Total cell delay = 0.680 ns ( 15.54 % )
        Info: Total interconnect delay = 3.697 ns ( 84.46 % )
Info: tco from clock "TEST_BUTTON" to destination pin "SRAM1_D[7]" through register "WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]" is 31.113 ns
    Info: + Longest clock path from clock "TEST_BUTTON" to source register is 14.230 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AG12; Fanout = 1; CLK Node = 'TEST_BUTTON'
        Info: 2: + IC(0.000 ns) + CELL(0.964 ns) = 0.964 ns; Loc. = IOIBUF_X34_Y0_N22; Fanout = 2; COMB Node = 'TEST_BUTTON~input'
        Info: 3: + IC(4.450 ns) + CELL(0.324 ns) = 5.738 ns; Loc. = LCCOMB_X46_Y10_N30; Fanout = 309; COMB Node = 'PinSignal_U5_O~0'
        Info: 4: + IC(2.349 ns) + CELL(0.177 ns) = 8.264 ns; Loc. = LCCOMB_X52_Y18_N22; Fanout = 127; COMB Node = 'PinSignal_U5_O~0_wirecell'
        Info: 5: + IC(3.980 ns) + CELL(0.000 ns) = 12.244 ns; Loc. = CLKCTRL_G17; Fanout = 30; COMB Node = 'PinSignal_U5_O~0_wirecellclkctrl'
        Info: 6: + IC(1.809 ns) + CELL(0.177 ns) = 14.230 ns; Loc. = LCCOMB_X52_Y23_N28; Fanout = 2; REG Node = 'WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]'
        Info: Total cell delay = 1.642 ns ( 11.54 % )
        Info: Total interconnect delay = 12.588 ns ( 88.46 % )
    Info: + Micro clock to output delay of source is 0.000 ns
    Info: + Longest register to pin delay is 16.883 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCCOMB_X52_Y23_N28; Fanout = 2; REG Node = 'WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_3tmp[28]'
        Info: 2: + IC(1.170 ns) + CELL(0.177 ns) = 1.347 ns; Loc. = LCCOMB_X52_Y24_N0; Fanout = 7; COMB Node = 'WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_10_28'
        Info: 3: + IC(1.409 ns) + CELL(0.324 ns) = 3.080 ns; Loc. = LCCOMB_X52_Y24_N24; Fanout = 1; COMB Node = 'Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|s_or8:n2u|OUT~0'
        Info: 4: + IC(0.299 ns) + CELL(0.473 ns) = 3.852 ns; Loc. = LCCOMB_X52_Y24_N26; Fanout = 6; COMB Node = 'Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|s_or8:n2u|OUT~1'
        Info: 5: + IC(0.601 ns) + CELL(0.177 ns) = 4.630 ns; Loc. = LCCOMB_X51_Y24_N24; Fanout = 8; COMB Node = 'Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|INST_s0_CYC_O'
        Info: 6: + IC(1.139 ns) + CELL(0.453 ns) = 6.222 ns; Loc. = LCCOMB_X52_Y27_N22; Fanout = 1; COMB Node = 'Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|n12s'
        Info: 7: + IC(1.113 ns) + CELL(0.177 ns) = 7.512 ns; Loc. = LCCOMB_X49_Y28_N24; Fanout = 15; COMB Node = 'Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|INST_m0_CYC_O'
        Info: 8: + IC(0.330 ns) + CELL(0.177 ns) = 8.019 ns; Loc. = LCCOMB_X49_Y28_N22; Fanout = 40; COMB Node = 'Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|n3s'
        Info: 9: + IC(6.241 ns) + CELL(2.623 ns) = 16.883 ns; Loc. = IOOBUF_X0_Y36_N23; Fanout = 1; COMB Node = 'SRAM1_D[7]~output'
        Info: 10: + IC(0.000 ns) + CELL(0.000 ns) = 16.883 ns; Loc. = PIN_E1; Fanout = 0; PIN Node = 'SRAM1_D[7]'
        Info: Total cell delay = 4.581 ns ( 27.13 % )
        Info: Total interconnect delay = 12.302 ns ( 72.87 % )
Info: Longest tpd from source pin "TEST_BUTTON" to destination pin "SRAM1_D[7]" is 26.331 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AG12; Fanout = 1; CLK Node = 'TEST_BUTTON'
    Info: 2: + IC(0.000 ns) + CELL(0.964 ns) = 0.964 ns; Loc. = IOIBUF_X34_Y0_N22; Fanout = 2; COMB Node = 'TEST_BUTTON~input'
    Info: 3: + IC(4.450 ns) + CELL(0.324 ns) = 5.738 ns; Loc. = LCCOMB_X46_Y10_N30; Fanout = 309; COMB Node = 'PinSignal_U5_O~0'
    Info: 4: + IC(2.349 ns) + CELL(0.177 ns) = 8.264 ns; Loc. = LCCOMB_X52_Y18_N22; Fanout = 127; COMB Node = 'PinSignal_U5_O~0_wirecell'
    Info: 5: + IC(2.040 ns) + CELL(0.491 ns) = 10.795 ns; Loc. = LCCOMB_X52_Y24_N0; Fanout = 7; COMB Node = 'WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_10_28'
    Info: 6: + IC(1.409 ns) + CELL(0.324 ns) = 12.528 ns; Loc. = LCCOMB_X52_Y24_N24; Fanout = 1; COMB Node = 'Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|s_or8:n2u|OUT~0'
    Info: 7: + IC(0.299 ns) + CELL(0.473 ns) = 13.300 ns; Loc. = LCCOMB_X52_Y24_N26; Fanout = 6; COMB Node = 'Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|s_or8:n2u|OUT~1'
    Info: 8: + IC(0.601 ns) + CELL(0.177 ns) = 14.078 ns; Loc. = LCCOMB_X51_Y24_N24; Fanout = 8; COMB Node = 'Configurable_INTERCON_TFT:U_NB3000AL_Slideshow_System_INTERCON_TFT|INST_s0_CYC_O'
    Info: 9: + IC(1.139 ns) + CELL(0.453 ns) = 15.670 ns; Loc. = LCCOMB_X52_Y27_N22; Fanout = 1; COMB Node = 'Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|n12s'
    Info: 10: + IC(1.113 ns) + CELL(0.177 ns) = 16.960 ns; Loc. = LCCOMB_X49_Y28_N24; Fanout = 15; COMB Node = 'Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|INST_m0_CYC_O'
    Info: 11: + IC(0.330 ns) + CELL(0.177 ns) = 17.467 ns; Loc. = LCCOMB_X49_Y28_N22; Fanout = 40; COMB Node = 'Configurable_SRAM:U_NB3000AL_Slideshow_System_SRAM|n3s'
    Info: 12: + IC(6.241 ns) + CELL(2.623 ns) = 26.331 ns; Loc. = IOOBUF_X0_Y36_N23; Fanout = 1; COMB Node = 'SRAM1_D[7]~output'
    Info: 13: + IC(0.000 ns) + CELL(0.000 ns) = 26.331 ns; Loc. = PIN_E1; Fanout = 0; PIN Node = 'SRAM1_D[7]'
    Info: Total cell delay = 6.360 ns ( 24.15 % )
    Info: Total interconnect delay = 19.971 ns ( 75.85 % )
Info: th for register "TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|byp_reg_Z" (data pin = "JTAG_NEXUS_TDI", clock pin = "JTAG_NEXUS_TCK") is -2.301 ns
    Info: + Longest clock path from clock "JTAG_NEXUS_TCK" to destination register is 3.262 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_Y27; Fanout = 1; CLK Node = 'JTAG_NEXUS_TCK'
        Info: 2: + IC(0.000 ns) + CELL(1.048 ns) = 1.048 ns; Loc. = IOIBUF_X67_Y22_N15; Fanout = 1; COMB Node = 'JTAG_NEXUS_TCK~input'
        Info: 3: + IC(0.197 ns) + CELL(0.000 ns) = 1.245 ns; Loc. = CLKCTRL_G9; Fanout = 190; COMB Node = 'JTAG_NEXUS_TCK~inputclkctrl'
        Info: 4: + IC(1.337 ns) + CELL(0.680 ns) = 3.262 ns; Loc. = FF_X38_Y12_N13; Fanout = 1; REG Node = 'TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|byp_reg_Z'
        Info: Total cell delay = 1.728 ns ( 52.97 % )
        Info: Total interconnect delay = 1.534 ns ( 47.03 % )
    Info: + Micro hold delay of destination is 0.212 ns
    Info: - Shortest pin to register delay is 5.775 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AD21; Fanout = 1; PIN Node = 'JTAG_NEXUS_TDI'
        Info: 2: + IC(0.000 ns) + CELL(0.954 ns) = 0.954 ns; Loc. = IOIBUF_X59_Y0_N22; Fanout = 5; COMB Node = 'JTAG_NEXUS_TDI~input'
        Info: 3: + IC(4.529 ns) + CELL(0.177 ns) = 5.660 ns; Loc. = LCCOMB_X38_Y12_N12; Fanout = 2; COMB Node = 'TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|sh_ireg_4_0_a2_x[3]'
        Info: 4: + IC(0.000 ns) + CELL(0.115 ns) = 5.775 ns; Loc. = FF_X38_Y12_N13; Fanout = 1; REG Node = 'TSK3000A_OCDS:U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|TapController:tsk3000_TapController|byp_reg_Z'
        Info: Total cell delay = 1.246 ns ( 21.58 % )
        Info: Total interconnect delay = 4.529 ns ( 78.42 % )
Info: Minimum tco from clock "CLK_REF" to destination pin "SRAM1_D[0]" through register "WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_16" is 6.357 ns
    Info: + Offset between input clock "CLK_REF" and output clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" is -2.471 ns
    Info: + Shortest clock path from clock "altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]" to source register is 4.387 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PLL_4; Fanout = 1; CLK Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]'
        Info: 2: + IC(2.372 ns) + CELL(0.000 ns) = 2.372 ns; Loc. = CLKCTRL_G18; Fanout = 5896; COMB Node = 'altpll:U4_altpll_component|Configurable_U4_altpll:auto_generated|wire_pll1_clk[0]~clkctrl'
        Info: 3: + IC(1.335 ns) + CELL(0.680 ns) = 4.387 ns; Loc. = FF_X45_Y27_N31; Fanout = 2; REG Node = 'WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_16'
        Info: Total cell delay = 0.680 ns ( 15.50 % )
        Info: Total interconnect delay = 3.707 ns ( 84.50 % )
    Info: + Micro clock to output delay of source is 0.261 ns
    Info: + Shortest register to pin delay is 4.180 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = FF_X45_Y27_N31; Fanout = 2; REG Node = 'WB_JPGDEC_V2:U_NB3000AL_Slideshow_System_JPGDEC|JPGDEC:U_JPG|M_DAT_O_16'
        Info: 2: + IC(0.000 ns) + CELL(0.482 ns) = 0.482 ns; Loc. = LCCOMB_X45_Y27_N30; Fanout = 1; COMB Node = 'Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|INST_m0_DAT_O_16'
        Info: 3: + IC(1.246 ns) + CELL(2.452 ns) = 4.180 ns; Loc. = IOOBUF_X43_Y43_N16; Fanout = 1; COMB Node = 'SRAM1_D[0]~output'
        Info: 4: + IC(0.000 ns) + CELL(0.000 ns) = 4.180 ns; Loc. = PIN_J17; Fanout = 0; PIN Node = 'SRAM1_D[0]'
        Info: Total cell delay = 2.934 ns ( 70.19 % )
        Info: Total interconnect delay = 1.246 ns ( 29.81 % )
Info: Shortest tpd from source pin "TEST_BUTTON" to destination pin "SRAM0_A[4]" is 16.169 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = PIN_AG12; Fanout = 1; CLK Node = 'TEST_BUTTON'
    Info: 2: + IC(0.000 ns) + CELL(0.964 ns) = 0.964 ns; Loc. = IOIBUF_X34_Y0_N22; Fanout = 2; COMB Node = 'TEST_BUTTON~input'
    Info: 3: + IC(4.450 ns) + CELL(0.324 ns) = 5.738 ns; Loc. = LCCOMB_X46_Y10_N30; Fanout = 309; COMB Node = 'PinSignal_U5_O~0'
    Info: 4: + IC(2.349 ns) + CELL(0.177 ns) = 8.264 ns; Loc. = LCCOMB_X52_Y18_N22; Fanout = 127; COMB Node = 'PinSignal_U5_O~0_wirecell'
    Info: 5: + IC(1.337 ns) + CELL(0.473 ns) = 10.074 ns; Loc. = LCCOMB_X50_Y22_N14; Fanout = 6; COMB Node = 'WB_ILI9320:U_NB3000AL_Slideshow_System_TFT|ILI9320:U_ILI9320|PixelAddress_Reg_10_6'
    Info: 6: + IC(1.161 ns) + CELL(0.177 ns) = 11.412 ns; Loc. = LCCOMB_X49_Y25_N16; Fanout = 1; COMB Node = 'Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|n10o'
    Info: 7: + IC(0.301 ns) + CELL(0.472 ns) = 12.185 ns; Loc. = LCCOMB_X49_Y25_N14; Fanout = 2; COMB Node = 'Configurable_MULTIMASTER_SRAM:U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|INST_m0_ADR_O_6'
    Info: 8: + IC(1.482 ns) + CELL(2.502 ns) = 16.169 ns; Loc. = IOOBUF_X52_Y43_N9; Fanout = 1; COMB Node = 'SRAM0_A[4]~output'
    Info: 9: + IC(0.000 ns) + CELL(0.000 ns) = 16.169 ns; Loc. = PIN_A21; Fanout = 0; PIN Node = 'SRAM0_A[4]'
    Info: Total cell delay = 5.089 ns ( 31.47 % )
    Info: Total interconnect delay = 11.080 ns ( 68.53 % )
Critical Warning: Timing requirements for slow timing model timing analysis were not met. See Report window for details.
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 39 warnings
    Info: Peak virtual memory: 294 megabytes
    Info: Processing ended: Tue Apr 08 23:13:56 2014
    Info: Elapsed time: 00:01:06
    Info: Total CPU time (on all processors): 00:00:18


