Simulator report for clock1
Sat Nov 08 22:06:36 2008
Quartus II Version 8.1 Build 163 10/28/2008 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Simulator Summary
  3. Simulator Settings
  4. Simulation Waveforms
  5. Coverage Summary
  6. Complete 1/0-Value Coverage
  7. Missing 1-Value Coverage
  8. Missing 0-Value Coverage
  9. Simulator INI Usage
 10. Simulator Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+----------------------------------------------+
; Simulator Summary                            ;
+-----------------------------+----------------+
; Type                        ; Value          ;
+-----------------------------+----------------+
; Simulation Start Time       ; 0 ps           ;
; Simulation End Time         ; 10.0 ms        ;
; Simulation Netlist Size     ; 298 nodes      ;
; Simulation Coverage         ;      17.38 %   ;
; Total Number of Transitions ; 310883         ;
; Simulation Breakpoints      ; 0              ;
; Family                      ; FLEX10K        ;
; Device                      ; EPF10K10LC84-4 ;
+-----------------------------+----------------+


+-------------------------------------------------------------------------------------------------------------------------+
; Simulator Settings                                                                                                      ;
+--------------------------------------------------------------------------------------------+------------+---------------+
; Option                                                                                     ; Setting    ; Default Value ;
+--------------------------------------------------------------------------------------------+------------+---------------+
; Simulation mode                                                                            ; Timing     ; Timing        ;
; Start time                                                                                 ; 0 ns       ; 0 ns          ;
; End time                                                                                   ; 10 ms      ;               ;
; Simulation results format                                                                  ; CVWF       ;               ;
; Add pins automatically to simulation output waveforms                                      ; On         ; On            ;
; Check outputs                                                                              ; On         ; Off           ;
; Report simulation coverage                                                                 ; On         ; On            ;
; Display complete 1/0 value coverage report                                                 ; On         ; On            ;
; Display missing 1-value coverage report                                                    ; On         ; On            ;
; Display missing 0-value coverage report                                                    ; On         ; On            ;
; Detect setup and hold time violations                                                      ; Off        ; Off           ;
; Detect glitches                                                                            ; Off        ; Off           ;
; Disable timing delays in Timing Simulation                                                 ; Off        ; Off           ;
; Generate Signal Activity File                                                              ; Off        ; Off           ;
; Generate VCD File for PowerPlay Power Analyzer                                             ; Off        ; Off           ;
; Group bus channels in simulation results                                                   ; Off        ; Off           ;
; Preserve fewer signal transitions to reduce memory requirements                            ; On         ; On            ;
; Trigger vector comparison with the specified mode                                          ; INPUT_EDGE ; INPUT_EDGE    ;
; Disable setup and hold time violations detection in input registers of bi-directional pins ; Off        ; Off           ;
; Overwrite Waveform Inputs With Simulation Outputs                                          ; On         ;               ;
; Perform Glitch Filtering in Timing Simulation                                              ; Auto       ; Auto          ;
+--------------------------------------------------------------------------------------------+------------+---------------+


+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.


+--------------------------------------------------------------------+
; Coverage Summary                                                   ;
+-----------------------------------------------------+--------------+
; Type                                                ; Value        ;
+-----------------------------------------------------+--------------+
; Total coverage as a percentage                      ;      17.38 % ;
; Total nodes checked                                 ; 298          ;
; Total output ports checked                          ; 305          ;
; Total output ports with complete 1/0-value coverage ; 53           ;
; Total output ports with no 1/0-value coverage       ; 240          ;
; Total output ports with no 1-value coverage         ; 242          ;
; Total output ports with no 0-value coverage         ; 250          ;
+-----------------------------------------------------+--------------+


The following table displays output ports that toggle between 1 and 0 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Complete 1/0-Value Coverage                                                                                                                                                                                                                  ;
+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                                   ; Output Port Name                                                                                            ; Output Port Type ;
+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+
; |clock1|clock1_base:283|32                                                                                  ; |clock1|clock1_base:283|32                                                                                  ; data_out0        ;
; |clock1|key_debounce:290|11                                                                                 ; |clock1|key_debounce:290|11                                                                                 ; data_out0        ;
; |clock1|clock1_base:283|31                                                                                  ; |clock1|clock1_base:283|31                                                                                  ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:18|reg[8]                                                               ; |clock1|clock1_base:283|div1000_reg:18|reg[8]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:18|reg[7]                                                               ; |clock1|clock1_base:283|div1000_reg:18|reg[7]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:18|reg[6]                                                               ; |clock1|clock1_base:283|div1000_reg:18|reg[6]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:18|reg[5]                                                               ; |clock1|clock1_base:283|div1000_reg:18|reg[5]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|div1000~91                                                          ; |clock1|clock1_base:283|div1000_loop:19|div1000~91                                                          ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:18|reg[1]                                                               ; |clock1|clock1_base:283|div1000_reg:18|reg[1]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:18|reg[0]                                                               ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[0]      ; cout             ;
; |clock1|clock1_base:283|div1000_reg:18|reg[3]                                                               ; |clock1|clock1_base:283|div1000_reg:18|reg[3]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|div1000~92                                                          ; |clock1|clock1_base:283|div1000_loop:19|div1000~92                                                          ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:18|reg[9]                                                               ; |clock1|clock1_base:283|div1000_reg:18|reg[9]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:18|reg[2]                                                               ; |clock1|clock1_base:283|div1000_reg:18|reg[2]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:18|reg[4]                                                               ; |clock1|clock1_base:283|div1000_reg:18|reg[4]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|div1000                                                             ; |clock1|clock1_base:283|div1000_loop:19|div1000                                                             ; data_out0        ;
; |clock1|key_debounce:287|11                                                                                 ; |clock1|key_debounce:287|11                                                                                 ; data_out0        ;
; |clock1|key_debounce:288|11                                                                                 ; |clock1|key_debounce:288|11                                                                                 ; data_out0        ;
; |clock1|key_debounce:289|11                                                                                 ; |clock1|key_debounce:289|11                                                                                 ; data_out0        ;
; |clock1|clock1_base:283|div50_reg:17|reg[1]                                                                 ; |clock1|clock1_base:283|div50_reg:17|reg[1]                                                                 ; data_out0        ;
; |clock1|clock1_base:283|div50_loop:16|div50~65                                                              ; |clock1|clock1_base:283|div50_loop:16|div50~65                                                              ; data_out0        ;
; |clock1|clock1_base:283|div50_reg:17|reg[0]                                                                 ; |clock1|clock1_base:283|div50_reg:17|reg[0]                                                                 ; data_out0        ;
; |clock1|clock1_base:283|div50_loop:16|div50                                                                 ; |clock1|clock1_base:283|div50_loop:16|div50                                                                 ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|div1000~3                                                           ; |clock1|clock1_base:283|div1000_loop:19|div1000~3                                                           ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[8] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[8] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[8] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[8]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[7]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[6]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[5]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[1]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[3]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[2]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[4]      ; cout             ;
; |clock1|clock1_base:283|div50_loop:16|div50~3                                                               ; |clock1|clock1_base:283|div50_loop:16|div50~3                                                               ; data_out0        ;
; |clock1|clock1_base:283|div50_loop:16|_~162                                                                 ; |clock1|clock1_base:283|div50_loop:16|_~162                                                                 ; data_out0        ;
; |clock1|clock1_base:283|div50_loop:16|dat[5]~584                                                            ; |clock1|clock1_base:283|div50_loop:16|dat[5]~584                                                            ; data_out0        ;
; |clock1|clock1_base:283|div50_loop:16|op_3~140                                                              ; |clock1|clock1_base:283|div50_loop:16|op_3~140                                                              ; data_out0        ;
; |clock1|clock1_base:283|div50_loop:16|op_3~141                                                              ; |clock1|clock1_base:283|div50_loop:16|op_3~141                                                              ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|unreg_res_node[9]                    ; |clock1|clock1_base:283|div1000_loop:19|lpm_add_sub:op_3|addcore:adder|unreg_res_node[9]                    ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|op_2~125                                                            ; |clock1|clock1_base:283|div1000_loop:19|op_2~125                                                            ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|op_6~67                                                             ; |clock1|clock1_base:283|div1000_loop:19|op_6~67                                                             ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|_~162                                                               ; |clock1|clock1_base:283|div1000_loop:19|_~162                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|_~163                                                               ; |clock1|clock1_base:283|div1000_loop:19|_~167                                                               ; cascout          ;
; |clock1|clock1_base:283|div1000_loop:19|op_2~126                                                            ; |clock1|clock1_base:283|div1000_loop:19|op_2~126                                                            ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:19|dat[9]~1185                                                         ; |clock1|clock1_base:283|div1000_loop:19|dat[9]~1185                                                         ; data_out0        ;
; |clock1|clk50                                                                                               ; |clock1|clk50~corein                                                                                        ; dataout          ;
+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 1-Value Coverage                                                                                                                                                                                                                     ;
+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                                   ; Output Port Name                                                                                            ; Output Port Type ;
+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+
; |clock1|digilab_display:272|_~136                                                                           ; |clock1|digilab_display:272|_~136                                                                           ; data_out0        ;
; |clock1|bin6bcd:275|op_1~101                                                                                ; |clock1|bin6bcd:275|op_1~101                                                                                ; data_out0        ;
; |clock1|bin6bcd:275|op_1~102                                                                                ; |clock1|bin6bcd:275|op_1~102                                                                                ; data_out0        ;
; |clock1|bin6bcd:275|dig2[1]~482                                                                             ; |clock1|bin6bcd:275|dig2[1]~482                                                                             ; data_out0        ;
; |clock1|bin6bcd:275|op_3~56                                                                                 ; |clock1|bin6bcd:275|op_3~56                                                                                 ; data_out0        ;
; |clock1|bin6bcd:275|dig2[1]~38                                                                              ; |clock1|bin6bcd:275|dig2[1]~38                                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3306                                                              ; |clock1|digilab_display:272|digitvalue[2]~3306                                                              ; data_out0        ;
; |clock1|digilab_display:272|_~137                                                                           ; |clock1|digilab_display:272|_~137                                                                           ; data_out0        ;
; |clock1|bin6bcd:293|op_1~101                                                                                ; |clock1|bin6bcd:293|op_1~101                                                                                ; data_out0        ;
; |clock1|bin6bcd:293|op_1~102                                                                                ; |clock1|bin6bcd:293|op_1~102                                                                                ; data_out0        ;
; |clock1|bin6bcd:293|op_5~55                                                                                 ; |clock1|bin6bcd:293|op_5~55                                                                                 ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3307                                                              ; |clock1|digilab_display:272|digitvalue[3]~3307                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3310                                                              ; |clock1|digilab_display:272|digitvalue[3]~3310                                                              ; data_out0        ;
; |clock1|digilab_display:272|_~138                                                                           ; |clock1|digilab_display:272|_~138                                                                           ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3313                                                              ; |clock1|digilab_display:272|digitvalue[3]~3313                                                              ; data_out0        ;
; |clock1|digilab_display:272|segg~23                                                                         ; |clock1|digilab_display:272|segg~23                                                                         ; data_out0        ;
; |clock1|clock1_base:283|33                                                                                  ; |clock1|clock1_base:283|33                                                                                  ; data_out0        ;
; |clock1|digilab_display:272|dpvalue~108                                                                     ; |clock1|digilab_display:272|dpvalue~108                                                                     ; data_out0        ;
; |clock1|digilab_display:272|_~139                                                                           ; |clock1|digilab_display:272|_~139                                                                           ; data_out0        ;
; |clock1|key_debounce:290|8                                                                                  ; |clock1|key_debounce:290|8                                                                                  ; data_out0        ;
; |clock1|key_debounce:290|7                                                                                  ; |clock1|key_debounce:290|7                                                                                  ; data_out0        ;
; |clock1|key_debounce:290|12~25                                                                              ; |clock1|key_debounce:290|12~25                                                                              ; data_out0        ;
; |clock1|digilab_display:272|dpvalue~109                                                                     ; |clock1|digilab_display:272|dpvalue~109                                                                     ; data_out0        ;
; |clock1|digilab_display:272|sege~9                                                                          ; |clock1|digilab_display:272|sege~9                                                                          ; data_out0        ;
; |clock1|digilab_display:272|segd~9                                                                          ; |clock1|digilab_display:272|segd~9                                                                          ; data_out0        ;
; |clock1|digilab_display:272|segf~5                                                                          ; |clock1|digilab_display:272|segf~5                                                                          ; data_out0        ;
; |clock1|digilab_display:272|segb~15                                                                         ; |clock1|digilab_display:272|segb~15                                                                         ; data_out0        ;
; |clock1|digilab_display:272|sega~13                                                                         ; |clock1|digilab_display:272|sega~13                                                                         ; data_out0        ;
; |clock1|digilab_display:272|segc~7                                                                          ; |clock1|digilab_display:272|segc~7                                                                          ; data_out0        ;
; |clock1|digilab_display:272|_~140                                                                           ; |clock1|digilab_display:272|_~140                                                                           ; data_out0        ;
; |clock1|clock1_timer:292|v_seconds[0]                                                                       ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cout[0]                     ; cout             ;
; |clock1|clock1_timer:292|v_seconds[1]                                                                       ; |clock1|clock1_timer:292|v_seconds[1]                                                                       ; data_out0        ;
; |clock1|clock1_timer:292|op_7~79                                                                            ; |clock1|clock1_timer:292|op_7~79                                                                            ; data_out0        ;
; |clock1|clock1_timer:292|v_seconds[3]                                                                       ; |clock1|clock1_timer:292|v_seconds[3]                                                                       ; data_out0        ;
; |clock1|clock1_timer:292|v_seconds[2]                                                                       ; |clock1|clock1_timer:292|v_seconds[2]                                                                       ; data_out0        ;
; |clock1|bin6bcd:274|dig2[2]~395                                                                             ; |clock1|bin6bcd:274|dig2[2]~395                                                                             ; data_out0        ;
; |clock1|clock1_timer:292|v_seconds[4]                                                                       ; |clock1|clock1_timer:292|v_seconds[4]                                                                       ; data_out0        ;
; |clock1|clock1_timer:292|v_seconds[5]                                                                       ; |clock1|clock1_timer:292|v_seconds[5]                                                                       ; data_out0        ;
; |clock1|clock1_timer:292|op_7~80                                                                            ; |clock1|clock1_timer:292|op_7~80                                                                            ; data_out0        ;
; |clock1|bin6bcd:274|op_3~79                                                                                 ; |clock1|bin6bcd:274|op_3~79                                                                                 ; data_out0        ;
; |clock1|bin6bcd:274|op_1~100                                                                                ; |clock1|bin6bcd:274|op_1~100                                                                                ; data_out0        ;
; |clock1|clock1_timer:292|op_5~65                                                                            ; |clock1|clock1_timer:292|op_5~65                                                                            ; data_out0        ;
; |clock1|clock1_timer:292|op_4~70                                                                            ; |clock1|clock1_timer:292|op_4~70                                                                            ; data_out0        ;
; |clock1|key_debounce:287|8                                                                                  ; |clock1|key_debounce:287|8                                                                                  ; data_out0        ;
; |clock1|key_debounce:287|7                                                                                  ; |clock1|key_debounce:287|7                                                                                  ; data_out0        ;
; |clock1|key_debounce:287|12~29                                                                              ; |clock1|key_debounce:287|12~29                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|_~293                                                                              ; |clock1|clock1_timer:292|_~293                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|v_res_sec~0                                                                        ; |clock1|clock1_timer:292|v_res_sec~0                                                                        ; data_out0        ;
; |clock1|key_debounce:288|8                                                                                  ; |clock1|key_debounce:288|8                                                                                  ; data_out0        ;
; |clock1|key_debounce:288|7                                                                                  ; |clock1|key_debounce:288|7                                                                                  ; data_out0        ;
; |clock1|key_debounce:288|12~24                                                                              ; |clock1|key_debounce:288|12~24                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|v_res_min~59                                                                       ; |clock1|clock1_timer:292|v_res_min~59                                                                       ; data_out0        ;
; |clock1|clock1_timer:292|v_minute[0]                                                                        ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cout[0]                     ; cout             ;
; |clock1|clock1_timer:292|v_res_min~0                                                                        ; |clock1|clock1_timer:292|v_res_min~0                                                                        ; data_out0        ;
; |clock1|clock1_timer:292|_~294                                                                              ; |clock1|clock1_timer:292|_~294                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cout[3]                     ; cout             ;
; |clock1|clock1_timer:292|_~32                                                                               ; |clock1|clock1_timer:292|_~32                                                                               ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cout[1]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cout[2]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cout[4]                     ; cout             ;
; |clock1|key_debounce:289|8                                                                                  ; |clock1|key_debounce:289|8                                                                                  ; data_out0        ;
; |clock1|key_debounce:289|7                                                                                  ; |clock1|key_debounce:289|7                                                                                  ; data_out0        ;
; |clock1|key_debounce:289|12~24                                                                              ; |clock1|key_debounce:289|12~24                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|v_res_hr~45                                                                        ; |clock1|clock1_timer:292|v_res_hr~45                                                                        ; data_out0        ;
; |clock1|bin6bcd:293|op_8~56                                                                                 ; |clock1|bin6bcd:293|op_8~56                                                                                 ; data_out0        ;
; |clock1|clock1_timer:292|v_hour[0]                                                                          ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[0]                     ; cout             ;
; |clock1|clock1_timer:292|v_res_hr~46                                                                        ; |clock1|clock1_timer:292|v_res_hr~46                                                                        ; data_out0        ;
; |clock1|clock1_timer:292|_~295                                                                              ; |clock1|clock1_timer:292|_~295                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[1]                     ; cout             ;
; |clock1|clock1_timer:292|_~48                                                                               ; |clock1|clock1_timer:292|_~48                                                                               ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[2]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[3]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[4]                     ; cout             ;
; |clock1|clock1_base:283|div1000_reg:21|reg[8]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[8]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[7]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[7]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[6]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[6]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[5]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[5]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|div1000~91                                                          ; |clock1|clock1_base:283|div1000_loop:20|div1000~91                                                          ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[1]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[1]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[3]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[3]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|div1000~92                                                          ; |clock1|clock1_base:283|div1000_loop:20|div1000~92                                                          ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[9]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[9]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[2]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[2]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[4]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[4]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|div1000                                                             ; |clock1|clock1_base:283|div1000_loop:20|div1000                                                             ; data_out0        ;
; |clock1|clock1_timer:292|_~8                                                                                ; |clock1|clock1_timer:292|_~8                                                                                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cout[1]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cout[3]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cout[2]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cout[4]                     ; cout             ;
; |clock1|bin6bcd:275|dig2[1]~483                                                                             ; |clock1|bin6bcd:275|dig2[1]~483                                                                             ; data_out0        ;
; |clock1|bin6bcd:275|op_5~55                                                                                 ; |clock1|bin6bcd:275|op_5~55                                                                                 ; data_out0        ;
; |clock1|bin6bcd:275|dig2[2]~484                                                                             ; |clock1|bin6bcd:275|dig2[2]~484                                                                             ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3335                                                              ; |clock1|digilab_display:272|digitvalue[2]~3335                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3336                                                              ; |clock1|digilab_display:272|digitvalue[1]~3336                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3337                                                              ; |clock1|digilab_display:272|digitvalue[0]~3337                                                              ; data_out0        ;
; |clock1|bin6bcd:293|dig2[2]~496                                                                             ; |clock1|bin6bcd:293|dig2[2]~496                                                                             ; data_out0        ;
; |clock1|bin6bcd:293|op_3~56                                                                                 ; |clock1|bin6bcd:293|op_3~56                                                                                 ; data_out0        ;
; |clock1|bin6bcd:293|dig2[1]~497                                                                             ; |clock1|bin6bcd:293|dig2[1]~497                                                                             ; data_out0        ;
; |clock1|bin6bcd:293|op_2~60                                                                                 ; |clock1|bin6bcd:293|op_2~60                                                                                 ; data_out0        ;
; |clock1|bin6bcd:293|dig2[0]~498                                                                             ; |clock1|bin6bcd:293|dig2[0]~498                                                                             ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3338                                                              ; |clock1|digilab_display:272|digitvalue[0]~3338                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3339                                                              ; |clock1|digilab_display:272|digitvalue[0]~3339                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3340                                                              ; |clock1|digilab_display:272|digitvalue[0]~3467                                                              ; cascout          ;
; |clock1|bin6bcd:274|op_5~55                                                                                 ; |clock1|bin6bcd:274|op_5~55                                                                                 ; data_out0        ;
; |clock1|bin6bcd:274|dig2[0]~396                                                                             ; |clock1|bin6bcd:274|dig2[0]~396                                                                             ; data_out0        ;
; |clock1|bin6bcd:274|dig2[1]~397                                                                             ; |clock1|bin6bcd:274|dig2[1]~397                                                                             ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3341                                                              ; |clock1|digilab_display:272|digitvalue[1]~3341                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3342                                                              ; |clock1|digilab_display:272|digitvalue[0]~3342                                                              ; data_out0        ;
; |clock1|bin6bcd:293|dig2[1]~38                                                                              ; |clock1|bin6bcd:293|dig2[1]~38                                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3425                                                              ; |clock1|digilab_display:272|digitvalue[0]~3425                                                              ; data_out0        ;
; |clock1|bin6bcd:275|op_1~103                                                                                ; |clock1|bin6bcd:275|op_1~103                                                                                ; data_out0        ;
; |clock1|bin6bcd:275|dig2[2]~485                                                                             ; |clock1|bin6bcd:275|dig2[2]~485                                                                             ; data_out0        ;
; |clock1|bin6bcd:275|dig2[2]~486                                                                             ; |clock1|bin6bcd:275|dig2[2]~486                                                                             ; data_out0        ;
; |clock1|bin6bcd:275|op_8~54                                                                                 ; |clock1|bin6bcd:275|op_8~54                                                                                 ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3347                                                              ; |clock1|digilab_display:272|digitvalue[2]~3347                                                              ; data_out0        ;
; |clock1|bin6bcd:274|dig2[2]~398                                                                             ; |clock1|bin6bcd:274|dig2[2]~398                                                                             ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3348                                                              ; |clock1|digilab_display:272|digitvalue[1]~3348                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3349                                                              ; |clock1|digilab_display:272|digitvalue[2]~3349                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3350                                                              ; |clock1|digilab_display:272|digitvalue[2]~3350                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3351                                                              ; |clock1|digilab_display:272|digitvalue[2]~3476                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[2]~3427                                                              ; |clock1|digilab_display:272|digitvalue[2]~3427                                                              ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|unreg_res_node[5]                                   ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|unreg_res_node[5]                                   ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|unreg_res_node[5]                                   ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|unreg_res_node[5]                                   ; data_out0        ;
; |clock1|bin6bcd:293|op_1~103                                                                                ; |clock1|bin6bcd:293|op_1~103                                                                                ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3357                                                              ; |clock1|digilab_display:272|digitvalue[3]~3479                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[3]~3428                                                              ; |clock1|digilab_display:272|digitvalue[3]~3428                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3429                                                              ; |clock1|digilab_display:272|digitvalue[3]~3429                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3430                                                              ; |clock1|digilab_display:272|digitvalue[3]~3430                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3363                                                              ; |clock1|digilab_display:272|digitvalue[3]~3484                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[3]~3431                                                              ; |clock1|digilab_display:272|digitvalue[3]~3431                                                              ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|div1000~3                                                           ; |clock1|clock1_base:283|div1000_loop:20|div1000~3                                                           ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[8] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[8] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[8] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[8]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[7]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[6]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[5]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[1]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[3]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[2]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[4]      ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|unreg_res_node[5]                                   ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|unreg_res_node[5]                                   ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|unreg_res_node[9]                    ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|unreg_res_node[9]                    ; data_out0        ;
; |clock1|bin6bcd:274|dig2[1]~14                                                                              ; |clock1|bin6bcd:274|dig2[1]~14                                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3392                                                              ; |clock1|digilab_display:272|digitvalue[1]~3392                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3393                                                              ; |clock1|digilab_display:272|digitvalue[1]~3393                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3394                                                              ; |clock1|digilab_display:272|digitvalue[1]~3489                                                              ; cascout          ;
; |clock1|bin6bcd:274|dig2[2]~399                                                                             ; |clock1|bin6bcd:274|dig2[2]~399                                                                             ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3395                                                              ; |clock1|digilab_display:272|digitvalue[1]~3395                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3432                                                              ; |clock1|digilab_display:272|digitvalue[1]~3492                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[1]~3397                                                              ; |clock1|digilab_display:272|digitvalue[1]~3397                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3398                                                              ; |clock1|digilab_display:272|digitvalue[1]~3495                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[1]~3399                                                              ; |clock1|digilab_display:272|digitvalue[1]~3399                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3433                                                              ; |clock1|digilab_display:272|digitvalue[1]~3433                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3401                                                              ; |clock1|digilab_display:272|digitvalue[1]~3401                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3402                                                              ; |clock1|digilab_display:272|digitvalue[2]~3402                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3403                                                              ; |clock1|digilab_display:272|digitvalue[2]~3501                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[2]~3434                                                              ; |clock1|digilab_display:272|digitvalue[2]~3434                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3405                                                              ; |clock1|digilab_display:272|digitvalue[2]~3405                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3406                                                              ; |clock1|digilab_display:272|digitvalue[2]~3505                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[2]~3435                                                              ; |clock1|digilab_display:272|digitvalue[2]~3435                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3408                                                              ; |clock1|digilab_display:272|digitvalue[2]~3508                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[2]~3436                                                              ; |clock1|digilab_display:272|digitvalue[2]~3436                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3410                                                              ; |clock1|digilab_display:272|digitvalue[2]~3511                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[2]~3437                                                              ; |clock1|digilab_display:272|digitvalue[2]~3437                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3412                                                              ; |clock1|digilab_display:272|digitvalue[2]~3514                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[0]~3413                                                              ; |clock1|digilab_display:272|digitvalue[0]~3413                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3438                                                              ; |clock1|digilab_display:272|digitvalue[2]~3438                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3415                                                              ; |clock1|digilab_display:272|digitvalue[3]~3518                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[3]~3439                                                              ; |clock1|digilab_display:272|digitvalue[3]~3520                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[3]~3417                                                              ; |clock1|digilab_display:272|digitvalue[3]~3417                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3418                                                              ; |clock1|digilab_display:272|digitvalue[3]~3418                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3440                                                              ; |clock1|digilab_display:272|digitvalue[3]~3524                                                              ; cascout          ;
; |clock1|clock1_base:283|div1000_loop:20|op_2~125                                                            ; |clock1|clock1_base:283|div1000_loop:20|op_2~125                                                            ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|op_6~67                                                             ; |clock1|clock1_base:283|div1000_loop:20|op_6~67                                                             ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|_~194                                                               ; |clock1|clock1_base:283|div1000_loop:20|_~194                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|_~195                                                               ; |clock1|clock1_base:283|div1000_loop:20|_~199                                                               ; cascout          ;
; |clock1|clock1_base:283|div1000_loop:20|op_2~126                                                            ; |clock1|clock1_base:283|div1000_loop:20|op_2~126                                                            ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|dat[9]~1189                                                         ; |clock1|clock1_base:283|div1000_loop:20|dat[9]~1189                                                         ; data_out0        ;
; |clock1|bin6bcd:293|dig2[2]~499                                                                             ; |clock1|bin6bcd:293|dig2[2]~499                                                                             ; data_out0        ;
; |clock1|bin6bcd:274|dig2[2]~400                                                                             ; |clock1|bin6bcd:274|dig2[2]~400                                                                             ; data_out0        ;
; |clock1|bin6bcd:293|dig2[2]~500                                                                             ; |clock1|bin6bcd:293|dig2[2]~500                                                                             ; data_out0        ;
; |clock1|bin6bcd:274|op_1~101                                                                                ; |clock1|bin6bcd:274|op_1~101                                                                                ; data_out0        ;
; |clock1|bin6bcd:274|op_1~102                                                                                ; |clock1|bin6bcd:274|op_1~102                                                                                ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3261                                                              ; |clock1|digilab_display:272|digitvalue[1]~3261                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3426                                                              ; |clock1|digilab_display:272|digitvalue[1]~3426                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3274                                                              ; |clock1|digilab_display:272|digitvalue[3]~3274                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3421                                                              ; |clock1|digilab_display:272|digitvalue[3]~3421                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3271                                                              ; |clock1|digilab_display:272|digitvalue[3]~3271                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3283                                                              ; |clock1|digilab_display:272|digitvalue[1]~3283                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3284                                                              ; |clock1|digilab_display:272|digitvalue[1]~3284                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3422                                                              ; |clock1|digilab_display:272|digitvalue[1]~3422                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3423                                                              ; |clock1|digilab_display:272|digitvalue[2]~3423                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3288                                                              ; |clock1|digilab_display:272|digitvalue[2]~3288                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3300                                                              ; |clock1|digilab_display:272|digitvalue[3]~3300                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3424                                                              ; |clock1|digilab_display:272|digitvalue[3]~3538                                                              ; cascout          ;
; |clock1|t4                                                                                                  ; |clock1|t4~corein                                                                                           ; dataout          ;
; |clock1|t2                                                                                                  ; |clock1|t2~corein                                                                                           ; dataout          ;
; |clock1|t1                                                                                                  ; |clock1|t1~corein                                                                                           ; dataout          ;
; |clock1|t3                                                                                                  ; |clock1|t3~corein                                                                                           ; dataout          ;
; |clock1|seg_g                                                                                               ; |clock1|seg_g                                                                                               ; padio            ;
; |clock1|kbd_clk                                                                                             ; |clock1|kbd_clk                                                                                             ; padio            ;
; |clock1|seg_dp                                                                                              ; |clock1|seg_dp                                                                                              ; padio            ;
; |clock1|seg_e                                                                                               ; |clock1|seg_e                                                                                               ; padio            ;
; |clock1|seg_d                                                                                               ; |clock1|seg_d                                                                                               ; padio            ;
; |clock1|seg_f                                                                                               ; |clock1|seg_f                                                                                               ; padio            ;
; |clock1|seg_b                                                                                               ; |clock1|seg_b                                                                                               ; padio            ;
; |clock1|seg_a                                                                                               ; |clock1|seg_a                                                                                               ; padio            ;
; |clock1|seg_c                                                                                               ; |clock1|seg_c                                                                                               ; padio            ;
; |clock1|dig5                                                                                                ; |clock1|dig5                                                                                                ; padio            ;
; |clock1|dig6                                                                                                ; |clock1|dig6                                                                                                ; padio            ;
; |clock1|dig3                                                                                                ; |clock1|dig3                                                                                                ; padio            ;
; |clock1|dig4                                                                                                ; |clock1|dig4                                                                                                ; padio            ;
; |clock1|dig1                                                                                                ; |clock1|dig1                                                                                                ; padio            ;
; |clock1|led1                                                                                                ; |clock1|led1                                                                                                ; padio            ;
; |clock1|led2                                                                                                ; |clock1|led2                                                                                                ; padio            ;
; |clock1|led3                                                                                                ; |clock1|led3                                                                                                ; padio            ;
; |clock1|led4                                                                                                ; |clock1|led4                                                                                                ; padio            ;
; |clock1|green                                                                                               ; |clock1|green                                                                                               ; padio            ;
; |clock1|red                                                                                                 ; |clock1|red                                                                                                 ; padio            ;
; |clock1|blue                                                                                                ; |clock1|blue                                                                                                ; padio            ;
; |clock1|horiz                                                                                               ; |clock1|horiz                                                                                               ; padio            ;
; |clock1|vert                                                                                                ; |clock1|vert                                                                                                ; padio            ;
; |clock1|kbd_dta                                                                                             ; |clock1|kbd_dta~output                                                                                      ; padio            ;
+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                                                                                                                                                                                     ;
+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+
; Node Name                                                                                                   ; Output Port Name                                                                                            ; Output Port Type ;
+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+
; |clock1|digilab_display:272|digitcounter[0]                                                                 ; |clock1|digilab_display:272|digitcounter[0]                                                                 ; data_out0        ;
; |clock1|digilab_display:272|_~136                                                                           ; |clock1|digilab_display:272|_~136                                                                           ; data_out0        ;
; |clock1|bin6bcd:275|op_1~101                                                                                ; |clock1|bin6bcd:275|op_1~101                                                                                ; data_out0        ;
; |clock1|bin6bcd:275|op_1~102                                                                                ; |clock1|bin6bcd:275|op_1~102                                                                                ; data_out0        ;
; |clock1|bin6bcd:275|dig2[1]~482                                                                             ; |clock1|bin6bcd:275|dig2[1]~482                                                                             ; data_out0        ;
; |clock1|bin6bcd:275|op_3~56                                                                                 ; |clock1|bin6bcd:275|op_3~56                                                                                 ; data_out0        ;
; |clock1|bin6bcd:275|dig2[1]~38                                                                              ; |clock1|bin6bcd:275|dig2[1]~38                                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3306                                                              ; |clock1|digilab_display:272|digitvalue[2]~3306                                                              ; data_out0        ;
; |clock1|digilab_display:272|_~137                                                                           ; |clock1|digilab_display:272|_~137                                                                           ; data_out0        ;
; |clock1|bin6bcd:293|op_1~101                                                                                ; |clock1|bin6bcd:293|op_1~101                                                                                ; data_out0        ;
; |clock1|bin6bcd:293|op_1~102                                                                                ; |clock1|bin6bcd:293|op_1~102                                                                                ; data_out0        ;
; |clock1|bin6bcd:293|op_5~55                                                                                 ; |clock1|bin6bcd:293|op_5~55                                                                                 ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3307                                                              ; |clock1|digilab_display:272|digitvalue[3]~3307                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3310                                                              ; |clock1|digilab_display:272|digitvalue[3]~3310                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3313                                                              ; |clock1|digilab_display:272|digitvalue[3]~3313                                                              ; data_out0        ;
; |clock1|digilab_display:272|segg~23                                                                         ; |clock1|digilab_display:272|segg~23                                                                         ; data_out0        ;
; |clock1|clock1_base:283|33                                                                                  ; |clock1|clock1_base:283|33                                                                                  ; data_out0        ;
; |clock1|digilab_display:272|dpvalue~108                                                                     ; |clock1|digilab_display:272|dpvalue~108                                                                     ; data_out0        ;
; |clock1|digilab_display:272|_~139                                                                           ; |clock1|digilab_display:272|_~139                                                                           ; data_out0        ;
; |clock1|key_debounce:290|8                                                                                  ; |clock1|key_debounce:290|8                                                                                  ; data_out0        ;
; |clock1|key_debounce:290|7                                                                                  ; |clock1|key_debounce:290|7                                                                                  ; data_out0        ;
; |clock1|key_debounce:290|6                                                                                  ; |clock1|key_debounce:290|6                                                                                  ; data_out0        ;
; |clock1|key_debounce:290|12~25                                                                              ; |clock1|key_debounce:290|12~25                                                                              ; data_out0        ;
; |clock1|digilab_display:272|dpvalue~109                                                                     ; |clock1|digilab_display:272|dpvalue~109                                                                     ; data_out0        ;
; |clock1|digilab_display:272|sege~9                                                                          ; |clock1|digilab_display:272|sege~9                                                                          ; data_out0        ;
; |clock1|digilab_display:272|segd~9                                                                          ; |clock1|digilab_display:272|segd~9                                                                          ; data_out0        ;
; |clock1|digilab_display:272|segf~5                                                                          ; |clock1|digilab_display:272|segf~5                                                                          ; data_out0        ;
; |clock1|digilab_display:272|segb~15                                                                         ; |clock1|digilab_display:272|segb~15                                                                         ; data_out0        ;
; |clock1|digilab_display:272|sega~13                                                                         ; |clock1|digilab_display:272|sega~13                                                                         ; data_out0        ;
; |clock1|digilab_display:272|segc~7                                                                          ; |clock1|digilab_display:272|segc~7                                                                          ; data_out0        ;
; |clock1|digilab_display:272|_~140                                                                           ; |clock1|digilab_display:272|_~140                                                                           ; data_out0        ;
; |clock1|digilab_display:272|_~141                                                                           ; |clock1|digilab_display:272|_~141                                                                           ; data_out0        ;
; |clock1|clock1_timer:292|v_seconds[0]                                                                       ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cout[0]                     ; cout             ;
; |clock1|clock1_timer:292|v_seconds[1]                                                                       ; |clock1|clock1_timer:292|v_seconds[1]                                                                       ; data_out0        ;
; |clock1|clock1_timer:292|op_7~79                                                                            ; |clock1|clock1_timer:292|op_7~79                                                                            ; data_out0        ;
; |clock1|clock1_timer:292|v_seconds[3]                                                                       ; |clock1|clock1_timer:292|v_seconds[3]                                                                       ; data_out0        ;
; |clock1|clock1_timer:292|v_seconds[2]                                                                       ; |clock1|clock1_timer:292|v_seconds[2]                                                                       ; data_out0        ;
; |clock1|bin6bcd:274|dig2[2]~395                                                                             ; |clock1|bin6bcd:274|dig2[2]~395                                                                             ; data_out0        ;
; |clock1|clock1_timer:292|v_seconds[4]                                                                       ; |clock1|clock1_timer:292|v_seconds[4]                                                                       ; data_out0        ;
; |clock1|clock1_timer:292|v_seconds[5]                                                                       ; |clock1|clock1_timer:292|v_seconds[5]                                                                       ; data_out0        ;
; |clock1|clock1_timer:292|op_7~80                                                                            ; |clock1|clock1_timer:292|op_7~80                                                                            ; data_out0        ;
; |clock1|bin6bcd:274|op_3~79                                                                                 ; |clock1|bin6bcd:274|op_3~79                                                                                 ; data_out0        ;
; |clock1|bin6bcd:274|op_1~100                                                                                ; |clock1|bin6bcd:274|op_1~100                                                                                ; data_out0        ;
; |clock1|clock1_timer:292|op_5~65                                                                            ; |clock1|clock1_timer:292|op_5~65                                                                            ; data_out0        ;
; |clock1|clock1_timer:292|op_4~70                                                                            ; |clock1|clock1_timer:292|op_4~70                                                                            ; data_out0        ;
; |clock1|key_debounce:287|8                                                                                  ; |clock1|key_debounce:287|8                                                                                  ; data_out0        ;
; |clock1|key_debounce:287|7                                                                                  ; |clock1|key_debounce:287|7                                                                                  ; data_out0        ;
; |clock1|key_debounce:287|6                                                                                  ; |clock1|key_debounce:287|6                                                                                  ; data_out0        ;
; |clock1|key_debounce:287|12~29                                                                              ; |clock1|key_debounce:287|12~29                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|_~293                                                                              ; |clock1|clock1_timer:292|_~293                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|v_res_sec~0                                                                        ; |clock1|clock1_timer:292|v_res_sec~0                                                                        ; data_out0        ;
; |clock1|key_debounce:288|8                                                                                  ; |clock1|key_debounce:288|8                                                                                  ; data_out0        ;
; |clock1|key_debounce:288|7                                                                                  ; |clock1|key_debounce:288|7                                                                                  ; data_out0        ;
; |clock1|key_debounce:288|6                                                                                  ; |clock1|key_debounce:288|6                                                                                  ; data_out0        ;
; |clock1|key_debounce:288|12~24                                                                              ; |clock1|key_debounce:288|12~24                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|v_res_min~59                                                                       ; |clock1|clock1_timer:292|v_res_min~59                                                                       ; data_out0        ;
; |clock1|clock1_timer:292|v_minute[0]                                                                        ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cout[0]                     ; cout             ;
; |clock1|clock1_timer:292|v_res_min~0                                                                        ; |clock1|clock1_timer:292|v_res_min~0                                                                        ; data_out0        ;
; |clock1|clock1_timer:292|_~294                                                                              ; |clock1|clock1_timer:292|_~294                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cout[3]                     ; cout             ;
; |clock1|clock1_timer:292|_~32                                                                               ; |clock1|clock1_timer:292|_~32                                                                               ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cout[1]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cout[2]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|a_csnbuffer:result_node|cout[4]                     ; cout             ;
; |clock1|key_debounce:289|8                                                                                  ; |clock1|key_debounce:289|8                                                                                  ; data_out0        ;
; |clock1|key_debounce:289|7                                                                                  ; |clock1|key_debounce:289|7                                                                                  ; data_out0        ;
; |clock1|key_debounce:289|6                                                                                  ; |clock1|key_debounce:289|6                                                                                  ; data_out0        ;
; |clock1|key_debounce:289|12~24                                                                              ; |clock1|key_debounce:289|12~24                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|v_res_hr~45                                                                        ; |clock1|clock1_timer:292|v_res_hr~45                                                                        ; data_out0        ;
; |clock1|bin6bcd:293|op_8~56                                                                                 ; |clock1|bin6bcd:293|op_8~56                                                                                 ; data_out0        ;
; |clock1|clock1_timer:292|v_hour[0]                                                                          ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[0]                     ; cout             ;
; |clock1|clock1_timer:292|v_res_hr~46                                                                        ; |clock1|clock1_timer:292|v_res_hr~46                                                                        ; data_out0        ;
; |clock1|clock1_timer:292|_~295                                                                              ; |clock1|clock1_timer:292|_~295                                                                              ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[1]                     ; cout             ;
; |clock1|clock1_timer:292|_~48                                                                               ; |clock1|clock1_timer:292|_~48                                                                               ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[2]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[3]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[4]                     ; cout             ;
; |clock1|clock1_base:283|div1000_reg:21|reg[8]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[8]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[7]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[7]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[6]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[6]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[5]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[5]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|div1000~91                                                          ; |clock1|clock1_base:283|div1000_loop:20|div1000~91                                                          ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[1]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[1]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[0]                                                               ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[0]      ; cout             ;
; |clock1|clock1_base:283|div1000_reg:21|reg[3]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[3]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|div1000~92                                                          ; |clock1|clock1_base:283|div1000_loop:20|div1000~92                                                          ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[9]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[9]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[2]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[2]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_reg:21|reg[4]                                                               ; |clock1|clock1_base:283|div1000_reg:21|reg[4]                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|div1000                                                             ; |clock1|clock1_base:283|div1000_loop:20|div1000                                                             ; data_out0        ;
; |clock1|clock1_timer:292|_~8                                                                                ; |clock1|clock1_timer:292|_~8                                                                                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cout[1]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cout[3]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cout[2]                     ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]                ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|a_csnbuffer:result_node|cout[4]                     ; cout             ;
; |clock1|bin6bcd:275|dig2[1]~483                                                                             ; |clock1|bin6bcd:275|dig2[1]~483                                                                             ; data_out0        ;
; |clock1|bin6bcd:275|op_5~55                                                                                 ; |clock1|bin6bcd:275|op_5~55                                                                                 ; data_out0        ;
; |clock1|bin6bcd:275|dig2[2]~484                                                                             ; |clock1|bin6bcd:275|dig2[2]~484                                                                             ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3335                                                              ; |clock1|digilab_display:272|digitvalue[2]~3335                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3336                                                              ; |clock1|digilab_display:272|digitvalue[1]~3336                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3337                                                              ; |clock1|digilab_display:272|digitvalue[0]~3337                                                              ; data_out0        ;
; |clock1|bin6bcd:293|dig2[2]~496                                                                             ; |clock1|bin6bcd:293|dig2[2]~496                                                                             ; data_out0        ;
; |clock1|bin6bcd:293|op_3~56                                                                                 ; |clock1|bin6bcd:293|op_3~56                                                                                 ; data_out0        ;
; |clock1|bin6bcd:293|dig2[1]~497                                                                             ; |clock1|bin6bcd:293|dig2[1]~497                                                                             ; data_out0        ;
; |clock1|bin6bcd:293|op_2~60                                                                                 ; |clock1|bin6bcd:293|op_2~60                                                                                 ; data_out0        ;
; |clock1|bin6bcd:293|dig2[0]~498                                                                             ; |clock1|bin6bcd:293|dig2[0]~498                                                                             ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3338                                                              ; |clock1|digilab_display:272|digitvalue[0]~3338                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3339                                                              ; |clock1|digilab_display:272|digitvalue[0]~3339                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3340                                                              ; |clock1|digilab_display:272|digitvalue[0]~3467                                                              ; cascout          ;
; |clock1|bin6bcd:274|op_5~55                                                                                 ; |clock1|bin6bcd:274|op_5~55                                                                                 ; data_out0        ;
; |clock1|bin6bcd:274|dig2[0]~396                                                                             ; |clock1|bin6bcd:274|dig2[0]~396                                                                             ; data_out0        ;
; |clock1|bin6bcd:274|dig2[1]~397                                                                             ; |clock1|bin6bcd:274|dig2[1]~397                                                                             ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3341                                                              ; |clock1|digilab_display:272|digitvalue[1]~3341                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3342                                                              ; |clock1|digilab_display:272|digitvalue[0]~3342                                                              ; data_out0        ;
; |clock1|bin6bcd:293|dig2[1]~38                                                                              ; |clock1|bin6bcd:293|dig2[1]~38                                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[0]~3425                                                              ; |clock1|digilab_display:272|digitvalue[0]~3425                                                              ; data_out0        ;
; |clock1|bin6bcd:275|op_1~103                                                                                ; |clock1|bin6bcd:275|op_1~103                                                                                ; data_out0        ;
; |clock1|bin6bcd:275|dig2[2]~485                                                                             ; |clock1|bin6bcd:275|dig2[2]~485                                                                             ; data_out0        ;
; |clock1|bin6bcd:275|dig2[2]~486                                                                             ; |clock1|bin6bcd:275|dig2[2]~486                                                                             ; data_out0        ;
; |clock1|bin6bcd:275|op_8~54                                                                                 ; |clock1|bin6bcd:275|op_8~54                                                                                 ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3347                                                              ; |clock1|digilab_display:272|digitvalue[2]~3347                                                              ; data_out0        ;
; |clock1|bin6bcd:274|dig2[2]~398                                                                             ; |clock1|bin6bcd:274|dig2[2]~398                                                                             ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3348                                                              ; |clock1|digilab_display:272|digitvalue[1]~3348                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3349                                                              ; |clock1|digilab_display:272|digitvalue[2]~3349                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3350                                                              ; |clock1|digilab_display:272|digitvalue[2]~3350                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3351                                                              ; |clock1|digilab_display:272|digitvalue[2]~3476                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[2]~3427                                                              ; |clock1|digilab_display:272|digitvalue[2]~3427                                                              ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|unreg_res_node[5]                                   ; |clock1|clock1_timer:292|lpm_add_sub:op_2|addcore:adder|unreg_res_node[5]                                   ; data_out0        ;
; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|unreg_res_node[5]                                   ; |clock1|clock1_timer:292|lpm_add_sub:op_3|addcore:adder|unreg_res_node[5]                                   ; data_out0        ;
; |clock1|bin6bcd:293|op_1~103                                                                                ; |clock1|bin6bcd:293|op_1~103                                                                                ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3357                                                              ; |clock1|digilab_display:272|digitvalue[3]~3479                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[3]~3428                                                              ; |clock1|digilab_display:272|digitvalue[3]~3428                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3429                                                              ; |clock1|digilab_display:272|digitvalue[3]~3429                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3430                                                              ; |clock1|digilab_display:272|digitvalue[3]~3430                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3363                                                              ; |clock1|digilab_display:272|digitvalue[3]~3484                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[3]~3431                                                              ; |clock1|digilab_display:272|digitvalue[3]~3431                                                              ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|div1000~3                                                           ; |clock1|clock1_base:283|div1000_loop:20|div1000~3                                                           ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[8] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[8] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[8] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[8]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[7]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[6]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[5]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[1]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[3]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[2]      ; cout             ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|a_csnbuffer:result_node|cout[4]      ; cout             ;
; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|unreg_res_node[5]                                   ; |clock1|clock1_timer:292|lpm_add_sub:op_1|addcore:adder|unreg_res_node[5]                                   ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|unreg_res_node[9]                    ; |clock1|clock1_base:283|div1000_loop:20|lpm_add_sub:op_3|addcore:adder|unreg_res_node[9]                    ; data_out0        ;
; |clock1|bin6bcd:274|dig2[1]~14                                                                              ; |clock1|bin6bcd:274|dig2[1]~14                                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3392                                                              ; |clock1|digilab_display:272|digitvalue[1]~3392                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3393                                                              ; |clock1|digilab_display:272|digitvalue[1]~3393                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3394                                                              ; |clock1|digilab_display:272|digitvalue[1]~3489                                                              ; cascout          ;
; |clock1|bin6bcd:274|dig2[2]~399                                                                             ; |clock1|bin6bcd:274|dig2[2]~399                                                                             ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3395                                                              ; |clock1|digilab_display:272|digitvalue[1]~3395                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3432                                                              ; |clock1|digilab_display:272|digitvalue[1]~3492                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[1]~3397                                                              ; |clock1|digilab_display:272|digitvalue[1]~3397                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3398                                                              ; |clock1|digilab_display:272|digitvalue[1]~3495                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[1]~3399                                                              ; |clock1|digilab_display:272|digitvalue[1]~3399                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3433                                                              ; |clock1|digilab_display:272|digitvalue[1]~3433                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3401                                                              ; |clock1|digilab_display:272|digitvalue[1]~3401                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3402                                                              ; |clock1|digilab_display:272|digitvalue[2]~3402                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3403                                                              ; |clock1|digilab_display:272|digitvalue[2]~3501                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[2]~3434                                                              ; |clock1|digilab_display:272|digitvalue[2]~3434                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3405                                                              ; |clock1|digilab_display:272|digitvalue[2]~3405                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3406                                                              ; |clock1|digilab_display:272|digitvalue[2]~3505                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[2]~3435                                                              ; |clock1|digilab_display:272|digitvalue[2]~3435                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3408                                                              ; |clock1|digilab_display:272|digitvalue[2]~3508                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[2]~3436                                                              ; |clock1|digilab_display:272|digitvalue[2]~3436                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3410                                                              ; |clock1|digilab_display:272|digitvalue[2]~3511                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[2]~3437                                                              ; |clock1|digilab_display:272|digitvalue[2]~3437                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3412                                                              ; |clock1|digilab_display:272|digitvalue[2]~3514                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[0]~3413                                                              ; |clock1|digilab_display:272|digitvalue[0]~3413                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3438                                                              ; |clock1|digilab_display:272|digitvalue[2]~3438                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3415                                                              ; |clock1|digilab_display:272|digitvalue[3]~3518                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[3]~3439                                                              ; |clock1|digilab_display:272|digitvalue[3]~3520                                                              ; cascout          ;
; |clock1|digilab_display:272|digitvalue[3]~3417                                                              ; |clock1|digilab_display:272|digitvalue[3]~3417                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3418                                                              ; |clock1|digilab_display:272|digitvalue[3]~3418                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3440                                                              ; |clock1|digilab_display:272|digitvalue[3]~3524                                                              ; cascout          ;
; |clock1|clock1_base:283|div1000_loop:20|op_2~125                                                            ; |clock1|clock1_base:283|div1000_loop:20|op_2~125                                                            ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|op_6~67                                                             ; |clock1|clock1_base:283|div1000_loop:20|op_6~67                                                             ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|_~194                                                               ; |clock1|clock1_base:283|div1000_loop:20|_~194                                                               ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|_~195                                                               ; |clock1|clock1_base:283|div1000_loop:20|_~199                                                               ; cascout          ;
; |clock1|clock1_base:283|div1000_loop:20|op_2~126                                                            ; |clock1|clock1_base:283|div1000_loop:20|op_2~126                                                            ; data_out0        ;
; |clock1|clock1_base:283|div1000_loop:20|dat[9]~1189                                                         ; |clock1|clock1_base:283|div1000_loop:20|dat[9]~1189                                                         ; data_out0        ;
; |clock1|bin6bcd:293|dig2[2]~499                                                                             ; |clock1|bin6bcd:293|dig2[2]~499                                                                             ; data_out0        ;
; |clock1|bin6bcd:274|dig2[2]~400                                                                             ; |clock1|bin6bcd:274|dig2[2]~400                                                                             ; data_out0        ;
; |clock1|bin6bcd:293|dig2[2]~500                                                                             ; |clock1|bin6bcd:293|dig2[2]~500                                                                             ; data_out0        ;
; |clock1|bin6bcd:274|op_1~101                                                                                ; |clock1|bin6bcd:274|op_1~101                                                                                ; data_out0        ;
; |clock1|bin6bcd:274|op_1~102                                                                                ; |clock1|bin6bcd:274|op_1~102                                                                                ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3261                                                              ; |clock1|digilab_display:272|digitvalue[1]~3261                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3426                                                              ; |clock1|digilab_display:272|digitvalue[1]~3426                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3258                                                              ; |clock1|digilab_display:272|digitvalue[1]~3258                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3274                                                              ; |clock1|digilab_display:272|digitvalue[3]~3274                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3421                                                              ; |clock1|digilab_display:272|digitvalue[3]~3421                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3271                                                              ; |clock1|digilab_display:272|digitvalue[3]~3271                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3283                                                              ; |clock1|digilab_display:272|digitvalue[1]~3283                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3284                                                              ; |clock1|digilab_display:272|digitvalue[1]~3284                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[1]~3422                                                              ; |clock1|digilab_display:272|digitvalue[1]~3422                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3423                                                              ; |clock1|digilab_display:272|digitvalue[2]~3423                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[2]~3288                                                              ; |clock1|digilab_display:272|digitvalue[2]~3288                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3300                                                              ; |clock1|digilab_display:272|digitvalue[3]~3300                                                              ; data_out0        ;
; |clock1|digilab_display:272|digitvalue[3]~3424                                                              ; |clock1|digilab_display:272|digitvalue[3]~3538                                                              ; cascout          ;
; |clock1|t4                                                                                                  ; |clock1|t4~corein                                                                                           ; dataout          ;
; |clock1|t2                                                                                                  ; |clock1|t2~corein                                                                                           ; dataout          ;
; |clock1|t1                                                                                                  ; |clock1|t1~corein                                                                                           ; dataout          ;
; |clock1|t3                                                                                                  ; |clock1|t3~corein                                                                                           ; dataout          ;
; |clock1|seg_g                                                                                               ; |clock1|seg_g                                                                                               ; padio            ;
; |clock1|kbd_clk                                                                                             ; |clock1|kbd_clk                                                                                             ; padio            ;
; |clock1|seg_dp                                                                                              ; |clock1|seg_dp                                                                                              ; padio            ;
; |clock1|seg_e                                                                                               ; |clock1|seg_e                                                                                               ; padio            ;
; |clock1|seg_d                                                                                               ; |clock1|seg_d                                                                                               ; padio            ;
; |clock1|seg_f                                                                                               ; |clock1|seg_f                                                                                               ; padio            ;
; |clock1|seg_b                                                                                               ; |clock1|seg_b                                                                                               ; padio            ;
; |clock1|seg_a                                                                                               ; |clock1|seg_a                                                                                               ; padio            ;
; |clock1|seg_c                                                                                               ; |clock1|seg_c                                                                                               ; padio            ;
; |clock1|dig5                                                                                                ; |clock1|dig5                                                                                                ; padio            ;
; |clock1|dig6                                                                                                ; |clock1|dig6                                                                                                ; padio            ;
; |clock1|dig2                                                                                                ; |clock1|dig2                                                                                                ; padio            ;
; |clock1|dig3                                                                                                ; |clock1|dig3                                                                                                ; padio            ;
; |clock1|dig4                                                                                                ; |clock1|dig4                                                                                                ; padio            ;
; |clock1|led1                                                                                                ; |clock1|led1                                                                                                ; padio            ;
; |clock1|led2                                                                                                ; |clock1|led2                                                                                                ; padio            ;
; |clock1|led3                                                                                                ; |clock1|led3                                                                                                ; padio            ;
; |clock1|led4                                                                                                ; |clock1|led4                                                                                                ; padio            ;
; |clock1|green                                                                                               ; |clock1|green                                                                                               ; padio            ;
; |clock1|red                                                                                                 ; |clock1|red                                                                                                 ; padio            ;
; |clock1|blue                                                                                                ; |clock1|blue                                                                                                ; padio            ;
; |clock1|horiz                                                                                               ; |clock1|horiz                                                                                               ; padio            ;
; |clock1|vert                                                                                                ; |clock1|vert                                                                                                ; padio            ;
; |clock1|kbd_dta                                                                                             ; |clock1|kbd_dta~output                                                                                      ; padio            ;
+-------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 8.1 Build 163 10/28/2008 SJ Web Edition
    Info: Processing started: Sat Nov 08 22:06:21 2008
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off clock1 -c clock1
Info: Using vector source file "L:/BACKUP_C_20071124/Projects/Digilab/Clock_1_002/clock1.scf"
Warning: Ignored Overwrite simulation input file with simulation results option - valid only for Vector Waveform Files or Vector Table Files
Warning: Ignored node in vector source file. Can't find corresponding node name "|clock1_base:283|div1000_reg:18|reg0.CLK" in design.
Warning: Ignored node in vector source file. Can't find corresponding node name "|clock1_base:283|div1000_reg:21|reg0.CLK" in design.
Warning: Can't find signal in vector source file for input pin "|clock1|t4"
Warning: Can't find signal in vector source file for input pin "|clock1|t2"
Warning: Can't find signal in vector source file for input pin "|clock1|t1"
Warning: Can't find signal in vector source file for input pin "|clock1|t3"
Warning: Can't find signal in vector source file for input pin "|clock1|kbd_dta"
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      17.38 %
Info: Number of transitions in simulation is 310883
Info: Waveform comparison is performed with the following rules
    Info: Match 0 in expected vector source file with values: 0, L, DC in compared vector file
    Info: Match 1 in expected vector source file with values: 1, H, DC in compared vector file
    Info: Match X in expected vector source file with values: X, W, Z, U, DC in compared vector file
    Info: Match L in expected vector source file with values: 0, L, DC in compared vector file
    Info: Match H in expected vector source file with values: 1, H, DC in compared vector file
    Info: Match W in expected vector source file with values: X, W, Z, U, DC in compared vector file
    Info: Match Z in expected vector source file with values: Z, U, DC in compared vector file
    Info: Match U in expected vector source file with values: X, W, Z, U, DC in compared vector file
    Info: Match DC in expected vector source file with values: 0, 1, X, L, H, W, Z, U, DC in compared vector file
Info: The following signals will be compared in waveform comparison
    Info: Signal - clk50
    Info: Signal - |clock1_base:283|div1000_reg:18|reg0.CLK
    Info: Signal - |clock1_base:283|div1000_reg:21|reg0.CLK
Info: Waveform comparison is triggered by changes in transitions of input signals in current vector source file
    Info: Signal - clk50 used to trigger waveform comparison in current vector source file
Error: Simulation results from L:/BACKUP_C_20071124/Projects/Digilab/Clock_1_002/db/clock1.sim.cvwf (0 ps to 10.0 ms) do not match expected results from vector source file L:/BACKUP_C_20071124/Projects/Digilab/Clock_1_002/clock1.scf
    Error: File details of compared files do not match
        Error: Compared vector source file does not contain node "|clock1_base:283|div1000_reg:18|reg0.CLK"
        Error: Compared vector source file does not contain node "|clock1_base:283|div1000_reg:21|reg0.CLK"
    Warning: File details of compared files do not match
        Info: Compared vector source file contains extra node "seg_g"
        Info: Compared vector source file contains extra node "kbd_clk"
        Info: Compared vector source file contains extra node "seg_dp"
        Info: Compared vector source file contains extra node "seg_e"
        Info: Compared vector source file contains extra node "seg_d"
        Info: Compared vector source file contains extra node "seg_f"
        Info: Compared vector source file contains extra node "seg_b"
        Info: Compared vector source file contains extra node "seg_a"
        Info: Compared vector source file contains extra node "seg_c"
        Info: Compared vector source file contains extra node "dig5"
        Info: Compared vector source file contains extra node "dig6"
        Info: Compared vector source file contains extra node "dig2"
        Info: Compared vector source file contains extra node "dig3"
        Info: Compared vector source file contains extra node "dig4"
        Info: Compared vector source file contains extra node "dig1"
        Info: Compared vector source file contains extra node "led1"
        Info: Compared vector source file contains extra node "led2"
        Info: Compared vector source file contains extra node "led3"
        Info: Compared vector source file contains extra node "led4"
        Info: Compared vector source file contains extra node "green"
        Info: Compared vector source file contains extra node "red"
        Info: Compared vector source file contains extra node "blue"
        Info: Compared vector source file contains extra node "horiz"
        Info: Compared vector source file contains extra node "vert"
        Info: Compared vector source file contains extra node "kbd_dta~result"
Error: Quartus II Simulator was unsuccessful. 4 errors, 9 warnings
    Error: Peak virtual memory: 115 megabytes
    Error: Processing ended: Sat Nov 08 22:06:36 2008
    Error: Elapsed time: 00:00:15
    Error: Total CPU time (on all processors): 00:00:15


