Analysis & Synthesis report for nios
Sat May 05 14:39:37 2012
Quartus II Version 11.0 Build 157 04/27/2011 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Parallel Compilation
  5. Analysis & Synthesis Source Files Read
  6. Analysis & Synthesis Resource Usage Summary
  7. Analysis & Synthesis Resource Utilization by Entity
  8. Analysis & Synthesis RAM Summary
  9. State Machine - |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize
 10. Registers Protected by Synthesis
 11. Registers Removed During Synthesis
 12. Removed Registers Triggering Further Register Optimizations
 13. General Register Statistics
 14. Inverted Register Statistics
 15. Multiplexer Restructuring Statistics (Restructuring Performed)
 16. Source assignments for cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram|altsyncram_p9f1:auto_generated
 17. Source assignments for cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram|altsyncram_q9f1:auto_generated
 18. Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_6472:auto_generated
 19. Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated
 20. Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer
 21. Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1
 22. Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2
 23. Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3
 24. Source assignments for ram:the_ram|altsyncram:the_altsyncram|altsyncram_rva1:auto_generated
 25. Source assignments for rom:the_rom|altsyncram:the_altsyncram|altsyncram_uva1:auto_generated
 26. Source assignments for uart_9600:the_uart_9600
 27. Source assignments for uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx|altera_std_synchronizer:the_altera_std_synchronizer
 28. Source assignments for nios_reset_clk_0_domain_synch_module:nios_reset_clk_0_domain_synch
 29. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a
 30. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram
 31. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b
 32. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram
 33. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component
 34. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram
 35. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component
 36. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram
 37. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer
 38. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1
 39. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2
 40. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3
 41. Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_jtag_debug_module_phy
 42. Parameter Settings for User Entity Instance: ram:the_ram
 43. Parameter Settings for User Entity Instance: ram:the_ram|altsyncram:the_altsyncram
 44. Parameter Settings for User Entity Instance: rom:the_rom
 45. Parameter Settings for User Entity Instance: rom:the_rom|altsyncram:the_altsyncram
 46. Parameter Settings for User Entity Instance: uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx|altera_std_synchronizer:the_altera_std_synchronizer
 47. Parameter Settings for Inferred Entity Instance: sld_hub:auto_hub
 48. altsyncram Parameter Settings by Entity Instance
 49. Port Connectivity Checks: "nios_reset_clk_0_domain_synch_module:nios_reset_clk_0_domain_synch"
 50. Port Connectivity Checks: "uart_9600_s1_arbitrator:the_uart_9600_s1"
 51. Port Connectivity Checks: "sysid:the_sysid"
 52. Port Connectivity Checks: "spi_touch_spi_control_port_arbitrator:the_spi_touch_spi_control_port"
 53. Port Connectivity Checks: "spi_sdcard_spi_control_port_arbitrator:the_spi_sdcard_spi_control_port"
 54. Port Connectivity Checks: "spi_lcd22_spi_control_port_arbitrator:the_spi_lcd22_spi_control_port"
 55. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_jtag_debug_module_phy"
 56. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3"
 57. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2"
 58. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component"
 59. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_pib:the_cpu_nios2_oci_pib"
 60. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_fifo:the_cpu_nios2_oci_fifo|cpu_nios2_oci_fifowp_inc:cpu_nios2_oci_fifowp_inc_fifowp"
 61. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dtrace:the_cpu_nios2_oci_dtrace|cpu_nios2_oci_td_mode:cpu_nios2_oci_trc_ctrl_td_mode"
 62. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace"
 63. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dbrk:the_cpu_nios2_oci_dbrk"
 64. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_xbrk:the_cpu_nios2_oci_xbrk"
 65. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component"
 66. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug"
 67. Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci"
 68. Port Connectivity Checks: "cpu:the_cpu|cpu_test_bench:the_cpu_test_bench"
 69. Elapsed Time Per Partition
 70. Analysis & Synthesis Messages
 71. Analysis & Synthesis Suppressed Messages



----------------
; Legal Notice ;
----------------
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+--------------------------------------------------------------------------------+
; Analysis & Synthesis Summary                                                   ;
+------------------------------------+-------------------------------------------+
; Analysis & Synthesis Status        ; Successful - Sat May 05 14:39:37 2012     ;
; Quartus II Version                 ; 11.0 Build 157 04/27/2011 SJ Full Version ;
; Revision Name                      ; nios                                      ;
; Top-level Entity Name              ; nios                                      ;
; Family                             ; Cyclone III                               ;
; Total logic elements               ; 2,145                                     ;
;     Total combinational functions  ; 1,752                                     ;
;     Dedicated logic registers      ; 1,134                                     ;
; Total registers                    ; 1134                                      ;
; Total pins                         ; 56                                        ;
; Total virtual pins                 ; 0                                         ;
; Total memory bits                  ; 356,672                                   ;
; Embedded Multiplier 9-bit elements ; 0                                         ;
; Total PLLs                         ; 0                                         ;
+------------------------------------+-------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings                                                                                        ;
+----------------------------------------------------------------------------+--------------------+--------------------+
; Option                                                                     ; Setting            ; Default Value      ;
+----------------------------------------------------------------------------+--------------------+--------------------+
; Device                                                                     ; EP3C16Q240C8       ;                    ;
; Top-level entity name                                                      ; nios               ; nios               ;
; Family name                                                                ; Cyclone III        ; Cyclone IV GX      ;
; Use smart compilation                                                      ; Off                ; Off                ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On                 ; On                 ;
; Enable compact report table                                                ; Off                ; Off                ;
; Restructure Multiplexers                                                   ; Auto               ; Auto               ;
; Create Debugging Nodes for IP Cores                                        ; Off                ; Off                ;
; Preserve fewer node names                                                  ; On                 ; On                 ;
; Disable OpenCore Plus hardware evaluation                                  ; Off                ; Off                ;
; Verilog Version                                                            ; Verilog_2001       ; Verilog_2001       ;
; VHDL Version                                                               ; VHDL_1993          ; VHDL_1993          ;
; State Machine Processing                                                   ; Auto               ; Auto               ;
; Safe State Machine                                                         ; Off                ; Off                ;
; Extract Verilog State Machines                                             ; On                 ; On                 ;
; Extract VHDL State Machines                                                ; On                 ; On                 ;
; Ignore Verilog initial constructs                                          ; Off                ; Off                ;
; Iteration limit for constant Verilog loops                                 ; 5000               ; 5000               ;
; Iteration limit for non-constant Verilog loops                             ; 250                ; 250                ;
; Add Pass-Through Logic to Inferred RAMs                                    ; On                 ; On                 ;
; Parallel Synthesis                                                         ; On                 ; On                 ;
; DSP Block Balancing                                                        ; Auto               ; Auto               ;
; NOT Gate Push-Back                                                         ; On                 ; On                 ;
; Power-Up Don't Care                                                        ; On                 ; On                 ;
; Remove Redundant Logic Cells                                               ; Off                ; Off                ;
; Remove Duplicate Registers                                                 ; On                 ; On                 ;
; Ignore CARRY Buffers                                                       ; Off                ; Off                ;
; Ignore CASCADE Buffers                                                     ; Off                ; Off                ;
; Ignore GLOBAL Buffers                                                      ; Off                ; Off                ;
; Ignore ROW GLOBAL Buffers                                                  ; Off                ; Off                ;
; Ignore LCELL Buffers                                                       ; Off                ; Off                ;
; Ignore SOFT Buffers                                                        ; On                 ; On                 ;
; Limit AHDL Integers to 32 Bits                                             ; Off                ; Off                ;
; Optimization Technique                                                     ; Balanced           ; Balanced           ;
; Carry Chain Length                                                         ; 70                 ; 70                 ;
; Auto Carry Chains                                                          ; On                 ; On                 ;
; Auto Open-Drain Pins                                                       ; On                 ; On                 ;
; Perform WYSIWYG Primitive Resynthesis                                      ; Off                ; Off                ;
; Auto ROM Replacement                                                       ; On                 ; On                 ;
; Auto RAM Replacement                                                       ; On                 ; On                 ;
; Auto DSP Block Replacement                                                 ; On                 ; On                 ;
; Auto Shift Register Replacement                                            ; Auto               ; Auto               ;
; Allow Shift Register Merging across Hierarchies                            ; Auto               ; Auto               ;
; Auto Clock Enable Replacement                                              ; On                 ; On                 ;
; Strict RAM Replacement                                                     ; Off                ; Off                ;
; Allow Synchronous Control Signals                                          ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                                     ; Off                ; Off                ;
; Auto RAM Block Balancing                                                   ; On                 ; On                 ;
; Auto RAM to Logic Cell Conversion                                          ; Off                ; Off                ;
; Auto Resource Sharing                                                      ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                                         ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                                         ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                              ; Off                ; Off                ;
; Use LogicLock Constraints during Resource Balancing                        ; On                 ; On                 ;
; Ignore translate_off and synthesis_off directives                          ; Off                ; Off                ;
; Timing-Driven Synthesis                                                    ; On                 ; On                 ;
; Report Parameter Settings                                                  ; On                 ; On                 ;
; Report Source Assignments                                                  ; On                 ; On                 ;
; Report Connectivity Checks                                                 ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                                         ; Off                ; Off                ;
; Synchronization Register Chain Length                                      ; 2                  ; 2                  ;
; PowerPlay Power Optimization                                               ; Normal compilation ; Normal compilation ;
; HDL message level                                                          ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages                            ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report                   ; 5000               ; 5000               ;
; Number of Inverted Registers Reported in Synthesis Report                  ; 100                ; 100                ;
; Clock MUX Protection                                                       ; On                 ; On                 ;
; Auto Gated Clock Conversion                                                ; Off                ; Off                ;
; Block Design Naming                                                        ; Auto               ; Auto               ;
; SDC constraint protection                                                  ; Off                ; Off                ;
; Synthesis Effort                                                           ; Auto               ; Auto               ;
; Shift Register Replacement - Allow Asynchronous Clear Signal               ; On                 ; On                 ;
; Analysis & Synthesis Message Level                                         ; Medium             ; Medium             ;
; Disable Register Merging Across Hierarchies                                ; Auto               ; Auto               ;
; Resource Aware Inference For Block RAM                                     ; On                 ; On                 ;
; Synthesis Seed                                                             ; 1                  ; 1                  ;
+----------------------------------------------------------------------------+--------------------+--------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 2           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.00        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     1 processor            ; 100.0%      ;
;     2 processors           ; < 0.1%      ;
+----------------------------+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                                                                         ;
+----------------------------------------------------------+-----------------+----------------------------------------+--------------------------------------------------------------------------+
; File Name with User-Entered Path                         ; Used in Netlist ; File Type                              ; File Name with Absolute Path                                             ;
+----------------------------------------------------------+-----------------+----------------------------------------+--------------------------------------------------------------------------+
; nios.v                                                   ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/nios.v                                 ;
; ds18b20.v                                                ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/ds18b20.v                              ;
; cpu.v                                                    ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/cpu.v                                  ;
; cpu_test_bench.v                                         ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/cpu_test_bench.v                       ;
; altsyncram.tdf                                           ; yes             ; Megafunction                           ; c:/altera/11.0/quartus/libraries/megafunctions/altsyncram.tdf            ;
; stratix_ram_block.inc                                    ; yes             ; Megafunction                           ; c:/altera/11.0/quartus/libraries/megafunctions/stratix_ram_block.inc     ;
; lpm_mux.inc                                              ; yes             ; Megafunction                           ; c:/altera/11.0/quartus/libraries/megafunctions/lpm_mux.inc               ;
; lpm_decode.inc                                           ; yes             ; Megafunction                           ; c:/altera/11.0/quartus/libraries/megafunctions/lpm_decode.inc            ;
; aglobal110.inc                                           ; yes             ; Megafunction                           ; c:/altera/11.0/quartus/libraries/megafunctions/aglobal110.inc            ;
; a_rdenreg.inc                                            ; yes             ; Megafunction                           ; c:/altera/11.0/quartus/libraries/megafunctions/a_rdenreg.inc             ;
; altrom.inc                                               ; yes             ; Megafunction                           ; c:/altera/11.0/quartus/libraries/megafunctions/altrom.inc                ;
; altram.inc                                               ; yes             ; Megafunction                           ; c:/altera/11.0/quartus/libraries/megafunctions/altram.inc                ;
; altdpram.inc                                             ; yes             ; Megafunction                           ; c:/altera/11.0/quartus/libraries/megafunctions/altdpram.inc              ;
; db/altsyncram_p9f1.tdf                                   ; yes             ; Auto-Generated Megafunction            ; E:/Program/EP3C16/nios/ds18b20_ok/db/altsyncram_p9f1.tdf                 ;
; cpu_rf_ram_a.mif                                         ; yes             ; Auto-Found Memory Initialization File  ; E:/Program/EP3C16/nios/ds18b20_ok/cpu_rf_ram_a.mif                       ;
; db/altsyncram_q9f1.tdf                                   ; yes             ; Auto-Generated Megafunction            ; E:/Program/EP3C16/nios/ds18b20_ok/db/altsyncram_q9f1.tdf                 ;
; cpu_rf_ram_b.mif                                         ; yes             ; Auto-Found Memory Initialization File  ; E:/Program/EP3C16/nios/ds18b20_ok/cpu_rf_ram_b.mif                       ;
; db/altsyncram_6472.tdf                                   ; yes             ; Auto-Generated Megafunction            ; E:/Program/EP3C16/nios/ds18b20_ok/db/altsyncram_6472.tdf                 ;
; cpu_ociram_default_contents.mif                          ; yes             ; Auto-Found Memory Initialization File  ; E:/Program/EP3C16/nios/ds18b20_ok/cpu_ociram_default_contents.mif        ;
; cpu_oci_test_bench.v                                     ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/cpu_oci_test_bench.v                   ;
; db/altsyncram_n802.tdf                                   ; yes             ; Auto-Generated Megafunction            ; E:/Program/EP3C16/nios/ds18b20_ok/db/altsyncram_n802.tdf                 ;
; cpu_jtag_debug_module_wrapper.v                          ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/cpu_jtag_debug_module_wrapper.v        ;
; cpu_jtag_debug_module_tck.v                              ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/cpu_jtag_debug_module_tck.v            ;
; altera_std_synchronizer.v                                ; yes             ; Megafunction                           ; c:/altera/11.0/quartus/libraries/megafunctions/altera_std_synchronizer.v ;
; cpu_jtag_debug_module_sysclk.v                           ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/cpu_jtag_debug_module_sysclk.v         ;
; sld_virtual_jtag_basic.v                                 ; yes             ; Megafunction                           ; c:/altera/11.0/quartus/libraries/megafunctions/sld_virtual_jtag_basic.v  ;
; lcd_cs.v                                                 ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/lcd_cs.v                               ;
; lcd_rs.v                                                 ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/lcd_rs.v                               ;
; lcd_wr.v                                                 ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/lcd_wr.v                               ;
; pa.v                                                     ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/pa.v                                   ;
; pb.v                                                     ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/pb.v                                   ;
; pc.v                                                     ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/pc.v                                   ;
; pd.v                                                     ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/pd.v                                   ;
; ram.v                                                    ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/ram.v                                  ;
; db/altsyncram_rva1.tdf                                   ; yes             ; Auto-Generated Megafunction            ; E:/Program/EP3C16/nios/ds18b20_ok/db/altsyncram_rva1.tdf                 ;
; ram.hex                                                  ; yes             ; Auto-Found Memory Initialization File  ; E:/Program/EP3C16/nios/ds18b20_ok/ram.hex                                ;
; reset.v                                                  ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/reset.v                                ;
; rom.v                                                    ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/rom.v                                  ;
; db/altsyncram_uva1.tdf                                   ; yes             ; Auto-Generated Megafunction            ; E:/Program/EP3C16/nios/ds18b20_ok/db/altsyncram_uva1.tdf                 ;
; rom.hex                                                  ; yes             ; Auto-Found Memory Initialization File  ; E:/Program/EP3C16/nios/ds18b20_ok/rom.hex                                ;
; sd_cs.v                                                  ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/sd_cs.v                                ;
; spi_lcd22.v                                              ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/spi_lcd22.v                            ;
; spi_sdcard.v                                             ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/spi_sdcard.v                           ;
; spi_touch.v                                              ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/spi_touch.v                            ;
; sysid.v                                                  ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/sysid.v                                ;
; touch_cs.v                                               ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/touch_cs.v                             ;
; touch_irq.v                                              ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/touch_irq.v                            ;
; uart_9600.v                                              ; yes             ; Auto-Found Verilog HDL File            ; E:/Program/EP3C16/nios/ds18b20_ok/uart_9600.v                            ;
; sld_hub.vhd                                              ; yes             ; Encrypted Megafunction                 ; c:/altera/11.0/quartus/libraries/megafunctions/sld_hub.vhd               ;
; sld_rom_sr.vhd                                           ; yes             ; Encrypted Megafunction                 ; c:/altera/11.0/quartus/libraries/megafunctions/sld_rom_sr.vhd            ;
; E:/Program/EP3C16/nios/ds18b20_ok/db/altsyncram_e3b1.tdf ; yes             ; Auto-Generated Megafunction            ; E:/Program/EP3C16/nios/ds18b20_ok/db/altsyncram_e3b1.tdf                 ;
; E:/Program/EP3C16/nios/ds18b20_ok/db/decode_ara.tdf      ; yes             ; Auto-Generated Megafunction            ; E:/Program/EP3C16/nios/ds18b20_ok/db/decode_ara.tdf                      ;
; E:/Program/EP3C16/nios/ds18b20_ok/db/mux_7nb.tdf         ; yes             ; Auto-Generated Megafunction            ; E:/Program/EP3C16/nios/ds18b20_ok/db/mux_7nb.tdf                         ;
+----------------------------------------------------------+-----------------+----------------------------------------+--------------------------------------------------------------------------+


+-----------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary               ;
+---------------------------------------------+-------------+
; Resource                                    ; Usage       ;
+---------------------------------------------+-------------+
; Estimated Total logic elements              ; 2,145       ;
;                                             ;             ;
; Total combinational functions               ; 1752        ;
; Logic element usage by number of LUT inputs ;             ;
;     -- 4 input functions                    ; 1029        ;
;     -- 3 input functions                    ; 525         ;
;     -- <=2 input functions                  ; 198         ;
;                                             ;             ;
; Logic elements by mode                      ;             ;
;     -- normal mode                          ; 1617        ;
;     -- arithmetic mode                      ; 135         ;
;                                             ;             ;
; Total registers                             ; 1134        ;
;     -- Dedicated logic registers            ; 1134        ;
;     -- I/O registers                        ; 0           ;
;                                             ;             ;
; I/O pins                                    ; 56          ;
; Total memory bits                           ; 356672      ;
; Maximum fan-out node                        ; clk_0~input ;
; Maximum fan-out                             ; 1186        ;
; Total fan-out                               ; 13055       ;
; Average fan-out                             ; 4.08        ;
+---------------------------------------------+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                                                                                                        ;
+------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node                                                               ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name                                                                                                                                                                                                                  ; Library Name ;
+------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; |nios                                                                                    ; 1752 (3)          ; 1134 (0)     ; 356672      ; 0            ; 0       ; 0         ; 56   ; 0            ; |nios                                                                                                                                                                                                                                ;              ;
;    |DS18B20:the_DS18B20|                                                                 ; 4 (4)             ; 3 (3)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|DS18B20:the_DS18B20                                                                                                                                                                                                            ;              ;
;    |DS18B20_s1_arbitrator:the_DS18B20_s1|                                                ; 2 (2)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|DS18B20_s1_arbitrator:the_DS18B20_s1                                                                                                                                                                                           ;              ;
;    |cpu:the_cpu|                                                                         ; 953 (720)         ; 499 (313)    ; 10240       ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu                                                                                                                                                                                                                    ;              ;
;       |cpu_nios2_oci:the_cpu_nios2_oci|                                                  ; 233 (39)          ; 185 (0)      ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci                                                                                                                                                                                    ;              ;
;          |cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|               ; 91 (0)            ; 96 (0)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper                                                                                                                    ;              ;
;             |cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|              ; 6 (6)             ; 49 (45)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk                                                      ;              ;
;                |altera_std_synchronizer:the_altera_std_synchronizer2|                    ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2 ;              ;
;                |altera_std_synchronizer:the_altera_std_synchronizer3|                    ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3 ;              ;
;             |cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|                    ; 81 (81)           ; 47 (43)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck                                                            ;              ;
;                |altera_std_synchronizer:the_altera_std_synchronizer1|                    ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1       ;              ;
;                |altera_std_synchronizer:the_altera_std_synchronizer|                     ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer        ;              ;
;             |sld_virtual_jtag_basic:cpu_jtag_debug_module_phy|                           ; 4 (4)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_jtag_debug_module_phy                                                                   ;              ;
;          |cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|                                 ; 11 (11)           ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg                                                                                                                                      ;              ;
;          |cpu_nios2_oci_break:the_cpu_nios2_oci_break|                                   ; 32 (32)           ; 32 (32)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_break:the_cpu_nios2_oci_break                                                                                                                                        ;              ;
;          |cpu_nios2_oci_debug:the_cpu_nios2_oci_debug|                                   ; 8 (8)             ; 7 (7)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug                                                                                                                                        ;              ;
;          |cpu_nios2_ocimem:the_cpu_nios2_ocimem|                                         ; 52 (52)           ; 44 (44)      ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem                                                                                                                                              ;              ;
;             |cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component| ; 0 (0)             ; 0 (0)        ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component                                                                   ;              ;
;                |altsyncram:the_altsyncram|                                               ; 0 (0)             ; 0 (0)        ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram                                         ;              ;
;                   |altsyncram_6472:auto_generated|                                       ; 0 (0)             ; 0 (0)        ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_6472:auto_generated          ;              ;
;       |cpu_register_bank_a_module:cpu_register_bank_a|                                   ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a                                                                                                                                                                     ;              ;
;          |altsyncram:the_altsyncram|                                                     ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram                                                                                                                                           ;              ;
;             |altsyncram_p9f1:auto_generated|                                             ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram|altsyncram_p9f1:auto_generated                                                                                                            ;              ;
;       |cpu_register_bank_b_module:cpu_register_bank_b|                                   ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b                                                                                                                                                                     ;              ;
;          |altsyncram:the_altsyncram|                                                     ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram                                                                                                                                           ;              ;
;             |altsyncram_q9f1:auto_generated|                                             ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram|altsyncram_q9f1:auto_generated                                                                                                            ;              ;
;       |cpu_test_bench:the_cpu_test_bench|                                                ; 0 (0)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu:the_cpu|cpu_test_bench:the_cpu_test_bench                                                                                                                                                                                  ;              ;
;    |cpu_data_master_arbitrator:the_cpu_data_master|                                      ; 85 (85)           ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu_data_master_arbitrator:the_cpu_data_master                                                                                                                                                                                 ;              ;
;    |cpu_instruction_master_arbitrator:the_cpu_instruction_master|                        ; 2 (2)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu_instruction_master_arbitrator:the_cpu_instruction_master                                                                                                                                                                   ;              ;
;    |cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|                          ; 28 (28)           ; 3 (3)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module                                                                                                                                                                     ;              ;
;    |lcd_cs:the_lcd_cs|                                                                   ; 3 (3)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|lcd_cs:the_lcd_cs                                                                                                                                                                                                              ;              ;
;    |lcd_cs_s1_arbitrator:the_lcd_cs_s1|                                                  ; 1 (1)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|lcd_cs_s1_arbitrator:the_lcd_cs_s1                                                                                                                                                                                             ;              ;
;    |lcd_rs:the_lcd_rs|                                                                   ; 1 (1)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|lcd_rs:the_lcd_rs                                                                                                                                                                                                              ;              ;
;    |lcd_rs_s1_arbitrator:the_lcd_rs_s1|                                                  ; 1 (1)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|lcd_rs_s1_arbitrator:the_lcd_rs_s1                                                                                                                                                                                             ;              ;
;    |lcd_wr:the_lcd_wr|                                                                   ; 1 (1)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|lcd_wr:the_lcd_wr                                                                                                                                                                                                              ;              ;
;    |lcd_wr_s1_arbitrator:the_lcd_wr_s1|                                                  ; 3 (3)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|lcd_wr_s1_arbitrator:the_lcd_wr_s1                                                                                                                                                                                             ;              ;
;    |nios_reset_clk_0_domain_synch_module:nios_reset_clk_0_domain_synch|                  ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|nios_reset_clk_0_domain_synch_module:nios_reset_clk_0_domain_synch                                                                                                                                                             ;              ;
;    |pa:the_pa|                                                                           ; 10 (10)           ; 24 (24)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|pa:the_pa                                                                                                                                                                                                                      ;              ;
;    |pa_s1_arbitrator:the_pa_s1|                                                          ; 1 (1)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|pa_s1_arbitrator:the_pa_s1                                                                                                                                                                                                     ;              ;
;    |pb:the_pb|                                                                           ; 10 (10)           ; 24 (24)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|pb:the_pb                                                                                                                                                                                                                      ;              ;
;    |pb_s1_arbitrator:the_pb_s1|                                                          ; 2 (2)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|pb_s1_arbitrator:the_pb_s1                                                                                                                                                                                                     ;              ;
;    |pc:the_pc|                                                                           ; 10 (10)           ; 24 (24)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|pc:the_pc                                                                                                                                                                                                                      ;              ;
;    |pd:the_pd|                                                                           ; 10 (10)           ; 24 (24)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|pd:the_pd                                                                                                                                                                                                                      ;              ;
;    |pd_s1_arbitrator:the_pd_s1|                                                          ; 2 (2)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|pd_s1_arbitrator:the_pd_s1                                                                                                                                                                                                     ;              ;
;    |ram:the_ram|                                                                         ; 1 (1)             ; 0 (0)        ; 262144      ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|ram:the_ram                                                                                                                                                                                                                    ;              ;
;       |altsyncram:the_altsyncram|                                                        ; 0 (0)             ; 0 (0)        ; 262144      ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|ram:the_ram|altsyncram:the_altsyncram                                                                                                                                                                                          ;              ;
;          |altsyncram_rva1:auto_generated|                                                ; 0 (0)             ; 0 (0)        ; 262144      ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|ram:the_ram|altsyncram:the_altsyncram|altsyncram_rva1:auto_generated                                                                                                                                                           ;              ;
;    |ram_s1_arbitrator:the_ram_s1|                                                        ; 25 (25)           ; 3 (3)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|ram_s1_arbitrator:the_ram_s1                                                                                                                                                                                                   ;              ;
;    |reset:the_reset|                                                                     ; 2 (2)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|reset:the_reset                                                                                                                                                                                                                ;              ;
;    |reset_s1_arbitrator:the_reset_s1|                                                    ; 1 (1)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|reset_s1_arbitrator:the_reset_s1                                                                                                                                                                                               ;              ;
;    |rom:the_rom|                                                                         ; 1 (1)             ; 0 (0)        ; 84288       ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|rom:the_rom                                                                                                                                                                                                                    ;              ;
;       |altsyncram:the_altsyncram|                                                        ; 0 (0)             ; 0 (0)        ; 84288       ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|rom:the_rom|altsyncram:the_altsyncram                                                                                                                                                                                          ;              ;
;          |altsyncram_uva1:auto_generated|                                                ; 0 (0)             ; 0 (0)        ; 84288       ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|rom:the_rom|altsyncram:the_altsyncram|altsyncram_uva1:auto_generated                                                                                                                                                           ;              ;
;    |rom_s1_arbitrator:the_rom_s1|                                                        ; 25 (25)           ; 3 (3)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|rom_s1_arbitrator:the_rom_s1                                                                                                                                                                                                   ;              ;
;    |sd_cs:the_sd_cs|                                                                     ; 1 (1)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|sd_cs:the_sd_cs                                                                                                                                                                                                                ;              ;
;    |sd_cs_s1_arbitrator:the_sd_cs_s1|                                                    ; 1 (1)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|sd_cs_s1_arbitrator:the_sd_cs_s1                                                                                                                                                                                               ;              ;
;    |sld_hub:auto_hub|                                                                    ; 92 (54)           ; 61 (33)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|sld_hub:auto_hub                                                                                                                                                                                                               ;              ;
;       |sld_rom_sr:hub_info_reg|                                                          ; 21 (21)           ; 9 (9)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|sld_hub:auto_hub|sld_rom_sr:hub_info_reg                                                                                                                                                                                       ;              ;
;       |sld_shadow_jsm:shadow_jsm|                                                        ; 17 (17)           ; 19 (19)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm                                                                                                                                                                                     ;              ;
;    |spi_lcd22:the_spi_lcd22|                                                             ; 102 (102)         ; 117 (117)    ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|spi_lcd22:the_spi_lcd22                                                                                                                                                                                                        ;              ;
;    |spi_lcd22_spi_control_port_arbitrator:the_spi_lcd22_spi_control_port|                ; 2 (2)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|spi_lcd22_spi_control_port_arbitrator:the_spi_lcd22_spi_control_port                                                                                                                                                           ;              ;
;    |spi_sdcard:the_spi_sdcard|                                                           ; 103 (103)         ; 118 (118)    ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|spi_sdcard:the_spi_sdcard                                                                                                                                                                                                      ;              ;
;    |spi_sdcard_spi_control_port_arbitrator:the_spi_sdcard_spi_control_port|              ; 3 (3)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|spi_sdcard_spi_control_port_arbitrator:the_spi_sdcard_spi_control_port                                                                                                                                                         ;              ;
;    |spi_touch:the_spi_touch|                                                             ; 111 (111)         ; 120 (120)    ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|spi_touch:the_spi_touch                                                                                                                                                                                                        ;              ;
;    |spi_touch_spi_control_port_arbitrator:the_spi_touch_spi_control_port|                ; 3 (3)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|spi_touch_spi_control_port_arbitrator:the_spi_touch_spi_control_port                                                                                                                                                           ;              ;
;    |sysid_control_slave_arbitrator:the_sysid_control_slave|                              ; 1 (1)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|sysid_control_slave_arbitrator:the_sysid_control_slave                                                                                                                                                                         ;              ;
;    |touch_cs:the_touch_cs|                                                               ; 1 (1)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|touch_cs:the_touch_cs                                                                                                                                                                                                          ;              ;
;    |touch_cs_s1_arbitrator:the_touch_cs_s1|                                              ; 1 (1)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|touch_cs_s1_arbitrator:the_touch_cs_s1                                                                                                                                                                                         ;              ;
;    |touch_irq:the_touch_irq|                                                             ; 1 (1)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|touch_irq:the_touch_irq                                                                                                                                                                                                        ;              ;
;    |touch_irq_s1_arbitrator:the_touch_irq_s1|                                            ; 3 (3)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|touch_irq_s1_arbitrator:the_touch_irq_s1                                                                                                                                                                                       ;              ;
;    |uart_9600:the_uart_9600|                                                             ; 134 (0)           ; 100 (0)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|uart_9600:the_uart_9600                                                                                                                                                                                                        ;              ;
;       |uart_9600_regs:the_uart_9600_regs|                                                ; 39 (39)           ; 29 (29)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|uart_9600:the_uart_9600|uart_9600_regs:the_uart_9600_regs                                                                                                                                                                      ;              ;
;       |uart_9600_rx:the_uart_9600_rx|                                                    ; 53 (53)           ; 41 (39)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx                                                                                                                                                                          ;              ;
;          |altera_std_synchronizer:the_altera_std_synchronizer|                           ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx|altera_std_synchronizer:the_altera_std_synchronizer                                                                                                                      ;              ;
;       |uart_9600_tx:the_uart_9600_tx|                                                    ; 42 (42)           ; 30 (30)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|uart_9600:the_uart_9600|uart_9600_tx:the_uart_9600_tx                                                                                                                                                                          ;              ;
;    |uart_9600_s1_arbitrator:the_uart_9600_s1|                                            ; 6 (6)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |nios|uart_9600_s1_arbitrator:the_uart_9600_s1                                                                                                                                                                                       ;              ;
+------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary                                                                                                                                                                                                                                                                                                                                  ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------+---------------------------------+
; Name                                                                                                                                                                                                                             ; Type ; Mode             ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size   ; MIF                             ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------+---------------------------------+
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_6472:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port   ; 256          ; 32           ; 256          ; 32           ; 8192   ; cpu_ociram_default_contents.mif ;
; cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram|altsyncram_p9f1:auto_generated|ALTSYNCRAM                                                                                                   ; AUTO ; Simple Dual Port ; 32           ; 32           ; 32           ; 32           ; 1024   ; cpu_rf_ram_a.mif                ;
; cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram|altsyncram_q9f1:auto_generated|ALTSYNCRAM                                                                                                   ; AUTO ; Simple Dual Port ; 32           ; 32           ; 32           ; 32           ; 1024   ; cpu_rf_ram_b.mif                ;
; ram:the_ram|altsyncram:the_altsyncram|altsyncram_rva1:auto_generated|ALTSYNCRAM                                                                                                                                                  ; AUTO ; Single Port      ; 8192         ; 32           ; --           ; --           ; 262144 ; ram.hex                         ;
; rom:the_rom|altsyncram:the_altsyncram|altsyncram_uva1:auto_generated|ALTSYNCRAM                                                                                                                                                  ; AUTO ; Single Port      ; 2634         ; 32           ; --           ; --           ; 84288  ; rom.hex                         ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+--------+---------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize ;
+------------+------------+------------+------------+------------+------------+--------------------------------------------------------------------------------------------------------------------+
; Name       ; DRsize.101 ; DRsize.100 ; DRsize.011 ; DRsize.010 ; DRsize.001 ; DRsize.000                                                                                                         ;
+------------+------------+------------+------------+------------+------------+--------------------------------------------------------------------------------------------------------------------+
; DRsize.000 ; 0          ; 0          ; 0          ; 0          ; 0          ; 0                                                                                                                  ;
; DRsize.001 ; 0          ; 0          ; 0          ; 0          ; 1          ; 1                                                                                                                  ;
; DRsize.010 ; 0          ; 0          ; 0          ; 1          ; 0          ; 1                                                                                                                  ;
; DRsize.011 ; 0          ; 0          ; 1          ; 0          ; 0          ; 1                                                                                                                  ;
; DRsize.100 ; 0          ; 1          ; 0          ; 0          ; 0          ; 1                                                                                                                  ;
; DRsize.101 ; 1          ; 0          ; 0          ; 0          ; 0          ; 1                                                                                                                  ;
+------------+------------+------------+------------+------------+------------+--------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Protected by Synthesis                                                                                                                                                                                                                                                                                                                       ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; Register Name                                                                                                                                                                                                                          ; Protected by Synthesis Attribute or Preserve Register Assignment ; Not to be Touched by Netlist Optimizations ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; nios_reset_clk_0_domain_synch_module:nios_reset_clk_0_domain_synch|data_out                                                                                                                                                            ; yes                                                              ; yes                                        ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1|dreg[0]       ; yes                                                              ; yes                                        ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer|dreg[0]        ; yes                                                              ; yes                                        ;
; nios_reset_clk_0_domain_synch_module:nios_reset_clk_0_domain_synch|data_in_d1                                                                                                                                                          ; yes                                                              ; yes                                        ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1|din_s1        ; yes                                                              ; yes                                        ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer|din_s1         ; yes                                                              ; yes                                        ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2|dreg[0] ; yes                                                              ; yes                                        ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3|dreg[0] ; yes                                                              ; yes                                        ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2|din_s1  ; yes                                                              ; yes                                        ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3|din_s1  ; yes                                                              ; yes                                        ;
; uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx|altera_std_synchronizer:the_altera_std_synchronizer|dreg[0]                                                                                                                      ; yes                                                              ; yes                                        ;
; uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx|altera_std_synchronizer:the_altera_std_synchronizer|din_s1                                                                                                                       ; yes                                                              ; yes                                        ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Removed During Synthesis                                                                                                                                                                                                                                                                                                                                          ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Register name                                                                                                                                                                  ; Reason for Removal                                                                                                                                                                         ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[0..35]                                                                           ; Lost fanout                                                                                                                                                                                ;
; uart_9600:the_uart_9600|uart_9600_regs:the_uart_9600_regs|readdata[10..15]                                                                                                     ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; touch_irq:the_touch_irq|readdata[1..31]                                                                                                                                        ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; rom_s1_arbitrator:the_rom_s1|d1_reasons_to_wait                                                                                                                                ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; ram_s1_arbitrator:the_ram_s1|d1_reasons_to_wait                                                                                                                                ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; pd:the_pd|readdata[8..31]                                                                                                                                                      ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; pc:the_pc|readdata[8..31]                                                                                                                                                      ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; pb:the_pb|readdata[8..31]                                                                                                                                                      ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; pa:the_pa|readdata[8..31]                                                                                                                                                      ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|W_ienable_reg[4..31]                                                                                                                                               ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|W_ipending_reg[4..31]                                                                                                                                              ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|R_ctrl_custom                                                                                                                                                      ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_im_addr[0..6]                                                                            ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_wrap                                                                                     ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dbrk:the_cpu_nios2_oci_dbrk|dbrk_goto1                                                                               ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dbrk:the_cpu_nios2_oci_dbrk|dbrk_break_pulse                                                                         ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dbrk:the_cpu_nios2_oci_dbrk|dbrk_goto0                                                                               ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_xbrk:the_cpu_nios2_oci_xbrk|xbrk_break                                                                               ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; DS18B20:the_DS18B20|readdata[1..31]                                                                                                                                            ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|W_control_rd_data[4..31]                                                                                                                                           ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[0..16]                                                                         ; Lost fanout                                                                                                                                                                                ;
; rom_s1_arbitrator:the_rom_s1|rom_s1_slavearbiterlockenable                                                                                                                     ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; ram_s1_arbitrator:the_ram_s1|ram_s1_slavearbiterlockenable                                                                                                                     ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_slavearbiterlockenable                                                                        ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; rom_s1_arbitrator:the_rom_s1|rom_s1_arb_share_counter                                                                                                                          ; Lost fanout                                                                                                                                                                                ;
; rom_s1_arbitrator:the_rom_s1|last_cycle_cpu_instruction_master_granted_slave_rom_s1                                                                                            ; Lost fanout                                                                                                                                                                                ;
; rom_s1_arbitrator:the_rom_s1|last_cycle_cpu_data_master_granted_slave_rom_s1                                                                                                   ; Lost fanout                                                                                                                                                                                ;
; rom_s1_arbitrator:the_rom_s1|rom_s1_saved_chosen_master_vector[1]                                                                                                              ; Lost fanout                                                                                                                                                                                ;
; rom_s1_arbitrator:the_rom_s1|rom_s1_reg_firsttransfer                                                                                                                          ; Lost fanout                                                                                                                                                                                ;
; ram_s1_arbitrator:the_ram_s1|ram_s1_arb_share_counter                                                                                                                          ; Lost fanout                                                                                                                                                                                ;
; ram_s1_arbitrator:the_ram_s1|last_cycle_cpu_instruction_master_granted_slave_ram_s1                                                                                            ; Lost fanout                                                                                                                                                                                ;
; ram_s1_arbitrator:the_ram_s1|last_cycle_cpu_data_master_granted_slave_ram_s1                                                                                                   ; Lost fanout                                                                                                                                                                                ;
; ram_s1_arbitrator:the_ram_s1|ram_s1_saved_chosen_master_vector[1]                                                                                                              ; Lost fanout                                                                                                                                                                                ;
; ram_s1_arbitrator:the_ram_s1|ram_s1_reg_firsttransfer                                                                                                                          ; Lost fanout                                                                                                                                                                                ;
; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_arb_share_counter                                                                             ; Lost fanout                                                                                                                                                                                ;
; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|last_cycle_cpu_instruction_master_granted_slave_cpu_jtag_debug_module                                               ; Lost fanout                                                                                                                                                                                ;
; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|last_cycle_cpu_data_master_granted_slave_cpu_jtag_debug_module                                                      ; Lost fanout                                                                                                                                                                                ;
; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_saved_chosen_master_vector[1]                                                                 ; Lost fanout                                                                                                                                                                                ;
; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_reg_firsttransfer                                                                             ; Lost fanout                                                                                                                                                                                ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[4]                                                                       ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[5]                                                                       ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[5]                                                                       ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[6]                                                                       ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[6]                                                                       ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[7]                                                                       ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[7]                                                                       ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[8]                                                                       ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[8]                                                                       ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[9]                                                                       ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[9]                                                                       ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[10]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[10]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[11]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[11]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[12]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[12]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[13]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[13]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[14]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[14]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[15]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[15]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[16]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[16]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[17]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[17]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[18]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[18]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[19]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[19]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[20]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[20]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[21]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[21]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[22]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[22]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[23]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[23]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[24]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[24]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[25]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[25]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[26]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[26]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[27]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[27]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[28]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[28]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[29]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[29]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[30]                                                                      ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[30]                                                                      ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[31]                                                                      ;
; uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx|delayed_unxsync_rxdxx2                                                                                                   ; Merged with uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx|delayed_unxsync_rxdxx1                                                                                                   ;
; rom_s1_arbitrator:the_rom_s1|rom_s1_arb_addend[0]                                                                                                                              ; Merged with rom_s1_arbitrator:the_rom_s1|rom_s1_arb_addend[1]                                                                                                                              ;
; ram_s1_arbitrator:the_ram_s1|ram_s1_arb_addend[0]                                                                                                                              ; Merged with ram_s1_arbitrator:the_ram_s1|ram_s1_arb_addend[1]                                                                                                                              ;
; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|d1_cpu_jtag_debug_module_end_xfer                                                                                   ; Merged with cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|d1_reasons_to_wait                                                                                                  ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_break:the_cpu_nios2_oci_break|trigger_state                                                                          ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dbrk:the_cpu_nios2_oci_dbrk|dbrk_break                                                                               ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_break:the_cpu_nios2_oci_break|trigbrktype                                                                            ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; ram_s1_arbitrator:the_ram_s1|ram_s1_saved_chosen_master_vector[0]                                                                                                              ; Lost fanout                                                                                                                                                                                ;
; rom_s1_arbitrator:the_rom_s1|rom_s1_saved_chosen_master_vector[0]                                                                                                              ; Lost fanout                                                                                                                                                                                ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize~3   ; Lost fanout                                                                                                                                                                                ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize~4   ; Lost fanout                                                                                                                                                                                ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize~5   ; Lost fanout                                                                                                                                                                                ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize.101 ; Lost fanout                                                                                                                                                                                ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize.011 ; Merged with cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize.001 ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize.001 ; Stuck at GND due to stuck port data_in                                                                                                                                                     ;
; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_saved_chosen_master_vector[0]                                                                 ; Lost fanout                                                                                                                                                                                ;
; Total Number of Removed Registers = 377                                                                                                                                        ;                                                                                                                                                                                            ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Removed Registers Triggering Further Register Optimizations                                                                                                                                                                                                             ;
+---------------------------------------------------------------------------------------------------------+---------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
; Register name                                                                                           ; Reason for Removal        ; Registers Removed due to This Register                                                                                            ;
+---------------------------------------------------------------------------------------------------------+---------------------------+-----------------------------------------------------------------------------------------------------------------------------------+
; rom_s1_arbitrator:the_rom_s1|d1_reasons_to_wait                                                         ; Stuck at GND              ; rom_s1_arbitrator:the_rom_s1|rom_s1_slavearbiterlockenable,                                                                       ;
;                                                                                                         ; due to stuck port data_in ; rom_s1_arbitrator:the_rom_s1|last_cycle_cpu_instruction_master_granted_slave_rom_s1,                                              ;
;                                                                                                         ;                           ; rom_s1_arbitrator:the_rom_s1|last_cycle_cpu_data_master_granted_slave_rom_s1,                                                     ;
;                                                                                                         ;                           ; rom_s1_arbitrator:the_rom_s1|rom_s1_saved_chosen_master_vector[1],                                                                ;
;                                                                                                         ;                           ; rom_s1_arbitrator:the_rom_s1|rom_s1_saved_chosen_master_vector[0]                                                                 ;
; ram_s1_arbitrator:the_ram_s1|d1_reasons_to_wait                                                         ; Stuck at GND              ; ram_s1_arbitrator:the_ram_s1|ram_s1_slavearbiterlockenable,                                                                       ;
;                                                                                                         ; due to stuck port data_in ; ram_s1_arbitrator:the_ram_s1|last_cycle_cpu_instruction_master_granted_slave_ram_s1,                                              ;
;                                                                                                         ;                           ; ram_s1_arbitrator:the_ram_s1|last_cycle_cpu_data_master_granted_slave_ram_s1,                                                     ;
;                                                                                                         ;                           ; ram_s1_arbitrator:the_ram_s1|ram_s1_saved_chosen_master_vector[1],                                                                ;
;                                                                                                         ;                           ; ram_s1_arbitrator:the_ram_s1|ram_s1_saved_chosen_master_vector[0]                                                                 ;
; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_slavearbiterlockenable ; Stuck at GND              ; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|last_cycle_cpu_instruction_master_granted_slave_cpu_jtag_debug_module, ;
;                                                                                                         ; due to stuck port data_in ; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_saved_chosen_master_vector[1],                   ;
;                                                                                                         ;                           ; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_saved_chosen_master_vector[0]                    ;
+---------------------------------------------------------------------------------------------------------+---------------------------+-----------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 1134  ;
; Number of registers using Synchronous Clear  ; 96    ;
; Number of registers using Synchronous Load   ; 160   ;
; Number of registers using Asynchronous Clear ; 924   ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 633   ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+--------------------------------------------------------------------------------------------------------------------+
; Inverted Register Statistics                                                                                       ;
+----------------------------------------------------------------------------------------------------------+---------+
; Inverted Register                                                                                        ; Fan out ;
+----------------------------------------------------------------------------------------------------------+---------+
; spi_lcd22:the_spi_lcd22|spi_slave_select_reg[0]                                                          ; 2       ;
; spi_lcd22:the_spi_lcd22|stateZero                                                                        ; 1       ;
; spi_sdcard:the_spi_sdcard|spi_slave_select_reg[0]                                                        ; 2       ;
; spi_sdcard:the_spi_sdcard|stateZero                                                                      ; 1       ;
; spi_touch:the_spi_touch|spi_slave_select_reg[0]                                                          ; 2       ;
; spi_touch:the_spi_touch|stateZero                                                                        ; 1       ;
; uart_9600:the_uart_9600|uart_9600_tx:the_uart_9600_tx|txd                                                ; 1       ;
; cpu_data_master_arbitrator:the_cpu_data_master|cpu_data_master_waitrequest                               ; 10      ;
; spi_lcd22:the_spi_lcd22|spi_slave_select_holding_reg[0]                                                  ; 1       ;
; spi_sdcard:the_spi_sdcard|spi_slave_select_holding_reg[0]                                                ; 1       ;
; spi_touch:the_spi_touch|spi_slave_select_holding_reg[0]                                                  ; 1       ;
; uart_9600:the_uart_9600|uart_9600_tx:the_uart_9600_tx|pre_txd                                            ; 2       ;
; cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_arb_addend[0]           ; 5       ;
; cpu:the_cpu|i_read                                                                                       ; 7       ;
; cpu:the_cpu|F_pc[14]                                                                                     ; 6       ;
; cpu:the_cpu|hbreak_enabled                                                                               ; 9       ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[3] ; 2       ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[0] ; 2       ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[1] ; 2       ;
; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg|oci_ienable[2] ; 2       ;
; uart_9600:the_uart_9600|uart_9600_tx:the_uart_9600_tx|tx_ready                                           ; 6       ;
; uart_9600:the_uart_9600|uart_9600_tx:the_uart_9600_tx|tx_shift_empty                                     ; 2       ;
; sld_hub:auto_hub|tdo                                                                                     ; 2       ;
; Total number of inverted registers = 23                                                                  ;         ;
+----------------------------------------------------------------------------------------------------------+---------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                                                                                                                                                                                 ;
+--------------------+-----------+---------------+----------------------+------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered                                                                                                                                                                       ; Example Multiplexer Output ;
+--------------------+-----------+---------------+----------------------+------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------+
; 3:1                ; 16 bits   ; 32 LEs        ; 32 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|E_src2[2]                                                                                                                                                      ;                            ;
; 3:1                ; 16 bits   ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; |nios|cpu:the_cpu|E_src1[29]                                                                                                                                                     ;                            ;
; 3:1                ; 16 bits   ; 32 LEs        ; 32 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|E_src1[7]                                                                                                                                                      ;                            ;
; 3:1                ; 32 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|E_shift_rot_result[0]                                                                                                                                          ;                            ;
; 3:1                ; 32 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|D_iw[15]                                                                                                                                                       ;                            ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; |nios|cpu:the_cpu|av_ld_byte0_data[4]                                                                                                                                            ;                            ;
; 3:1                ; 16 bits   ; 32 LEs        ; 32 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|av_ld_byte1_data[4]                                                                                                                                            ;                            ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; |nios|cpu:the_cpu|d_byteenable[0]                                                                                                                                                ;                            ;
; 3:1                ; 10 bits   ; 20 LEs        ; 10 LEs               ; 10 LEs                 ; |nios|uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx|unxshiftxrxd_shift_regxshift_reg_start_bit_nxx6_out[3]                                                               ;                            ;
; 8:1                ; 15 bits   ; 75 LEs        ; 30 LEs               ; 45 LEs                 ; |nios|spi_touch:the_spi_touch|data_to_cpu[13]                                                                                                                                    ;                            ;
; 8:1                ; 3 bits    ; 15 LEs        ; 12 LEs               ; 3 LEs                  ; |nios|spi_sdcard:the_spi_sdcard|data_to_cpu[10]                                                                                                                                  ;                            ;
; 8:1                ; 6 bits    ; 30 LEs        ; 18 LEs               ; 12 LEs                 ; |nios|spi_touch:the_spi_touch|data_to_cpu[8]                                                                                                                                     ;                            ;
; 8:1                ; 9 bits    ; 45 LEs        ; 18 LEs               ; 27 LEs                 ; |nios|spi_lcd22:the_spi_lcd22|data_to_cpu[1]                                                                                                                                     ;                            ;
; 8:1                ; 3 bits    ; 15 LEs        ; 6 LEs                ; 9 LEs                  ; |nios|spi_touch:the_spi_touch|data_to_cpu[5]                                                                                                                                     ;                            ;
; 8:1                ; 12 bits   ; 60 LEs        ; 36 LEs               ; 24 LEs                 ; |nios|spi_touch:the_spi_touch|data_to_cpu[6]                                                                                                                                     ;                            ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; |nios|spi_lcd22:the_spi_lcd22|shift_reg[2]                                                                                                                                       ;                            ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; |nios|spi_sdcard:the_spi_sdcard|shift_reg[7]                                                                                                                                     ;                            ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; |nios|spi_touch:the_spi_touch|shift_reg[1]                                                                                                                                       ;                            ;
; 4:1                ; 18 bits   ; 36 LEs        ; 36 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|W_alu_result[4]                                                                                                                                                ;                            ;
; 4:1                ; 15 bits   ; 30 LEs        ; 30 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|E_src2[17]                                                                                                                                                     ;                            ;
; 8:1                ; 3 bits    ; 15 LEs        ; 6 LEs                ; 9 LEs                  ; |nios|cpu:the_cpu|W_control_rd_data[3]                                                                                                                                           ;                            ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; |nios|uart_9600:the_uart_9600|uart_9600_tx:the_uart_9600_tx|unxshiftxtx_shift_register_contentsxtx_shift_reg_outxx5_out[1]                                                       ;                            ;
; 4:1                ; 24 bits   ; 48 LEs        ; 48 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|MonDReg[23]                                                                              ;                            ;
; 3:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|d_writedata[24]                                                                                                                                                ;                            ;
; 4:1                ; 6 bits    ; 12 LEs        ; 12 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|MonDReg[9]                                                                               ;                            ;
; 6:1                ; 2 bits    ; 8 LEs         ; 2 LEs                ; 6 LEs                  ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|sr[36] ;                            ;
; 6:1                ; 2 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|sr[33] ;                            ;
; 6:1                ; 13 bits   ; 52 LEs        ; 26 LEs               ; 26 LEs                 ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|sr[12] ;                            ;
; 6:1                ; 16 bits   ; 64 LEs        ; 32 LEs               ; 32 LEs                 ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|sr[32] ;                            ;
; 5:1                ; 14 bits   ; 42 LEs        ; 42 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|W_alu_result[23]                                                                                                                                               ;                            ;
; 4:1                ; 15 bits   ; 30 LEs        ; 30 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|F_pc[13]                                                                                                                                                       ;                            ;
; 4:1                ; 9 bits    ; 18 LEs        ; 9 LEs                ; 9 LEs                  ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|MonAReg[6]                                                                               ;                            ;
; 5:1                ; 32 bits   ; 96 LEs        ; 32 LEs               ; 64 LEs                 ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_break:the_cpu_nios2_oci_break|break_readreg[5]                                                                   ;                            ;
; 5:1                ; 2 bits    ; 6 LEs         ; 6 LEs                ; 0 LEs                  ; |nios|cpu:the_cpu|d_byteenable[3]                                                                                                                                                ;                            ;
; 4:1                ; 32 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|E_logic_result[7]                                                                                                                                              ;                            ;
; 4:1                ; 28 bits   ; 56 LEs        ; 56 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|W_rf_wr_data[8]                                                                                                                                                ;                            ;
; 4:1                ; 3 bits    ; 6 LEs         ; 6 LEs                ; 0 LEs                  ; |nios|cpu:the_cpu|W_rf_wr_data[3]                                                                                                                                                ;                            ;
; 4:1                ; 4 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; |nios|cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|readdata[3]                                                                                                                    ;                            ;
; 4:1                ; 5 bits    ; 10 LEs        ; 10 LEs               ; 0 LEs                  ; |nios|cpu:the_cpu|D_dst_regnum[0]                                                                                                                                                ;                            ;
+--------------------+-----------+---------------+----------------------+------------------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram|altsyncram_p9f1:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                           ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                            ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram|altsyncram_q9f1:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                           ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                            ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_6472:auto_generated ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                             ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                              ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                  ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer ;
+-----------------------------+------------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                  ; From ; To                                                                                                                                                                               ;
+-----------------------------+------------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; dreg[0]                                                                                                                                                                          ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; dreg[0]                                                                                                                                                                          ;
; PRESERVE_REGISTER           ; ON                     ; -    ; dreg[0]                                                                                                                                                                          ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; din_s1                                                                                                                                                                           ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; din_s1                                                                                                                                                                           ;
; PRESERVE_REGISTER           ; ON                     ; -    ; din_s1                                                                                                                                                                           ;
+-----------------------------+------------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1 ;
+-----------------------------+------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                  ; From ; To                                                                                                                                                                                ;
+-----------------------------+------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; dreg[0]                                                                                                                                                                           ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; dreg[0]                                                                                                                                                                           ;
; PRESERVE_REGISTER           ; ON                     ; -    ; dreg[0]                                                                                                                                                                           ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; din_s1                                                                                                                                                                            ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; din_s1                                                                                                                                                                            ;
; PRESERVE_REGISTER           ; ON                     ; -    ; din_s1                                                                                                                                                                            ;
+-----------------------------+------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2 ;
+-----------------------------+------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                  ; From ; To                                                                                                                                                                                      ;
+-----------------------------+------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; dreg[0]                                                                                                                                                                                 ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; dreg[0]                                                                                                                                                                                 ;
; PRESERVE_REGISTER           ; ON                     ; -    ; dreg[0]                                                                                                                                                                                 ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; din_s1                                                                                                                                                                                  ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; din_s1                                                                                                                                                                                  ;
; PRESERVE_REGISTER           ; ON                     ; -    ; din_s1                                                                                                                                                                                  ;
+-----------------------------+------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3 ;
+-----------------------------+------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                  ; From ; To                                                                                                                                                                                      ;
+-----------------------------+------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; dreg[0]                                                                                                                                                                                 ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; dreg[0]                                                                                                                                                                                 ;
; PRESERVE_REGISTER           ; ON                     ; -    ; dreg[0]                                                                                                                                                                                 ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; din_s1                                                                                                                                                                                  ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; din_s1                                                                                                                                                                                  ;
; PRESERVE_REGISTER           ; ON                     ; -    ; din_s1                                                                                                                                                                                  ;
+-----------------------------+------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------+
; Source assignments for ram:the_ram|altsyncram:the_altsyncram|altsyncram_rva1:auto_generated ;
+---------------------------------+--------------------+------+-------------------------------+
; Assignment                      ; Value              ; From ; To                            ;
+---------------------------------+--------------------+------+-------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                             ;
+---------------------------------+--------------------+------+-------------------------------+


+---------------------------------------------------------------------------------------------+
; Source assignments for rom:the_rom|altsyncram:the_altsyncram|altsyncram_uva1:auto_generated ;
+---------------------------------+--------------------+------+-------------------------------+
; Assignment                      ; Value              ; From ; To                            ;
+---------------------------------+--------------------+------+-------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                             ;
+---------------------------------+--------------------+------+-------------------------------+


+-------------------------------------------------+
; Source assignments for uart_9600:the_uart_9600  ;
+-----------------------------+-------+------+----+
; Assignment                  ; Value ; From ; To ;
+-----------------------------+-------+------+----+
; SYNCHRONIZER_IDENTIFICATION ; OFF   ; -    ; -  ;
+-----------------------------+-------+------+----+


+----------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx|altera_std_synchronizer:the_altera_std_synchronizer ;
+-----------------------------+------------------------+------+--------------------------------------------------------------------+
; Assignment                  ; Value                  ; From ; To                                                                 ;
+-----------------------------+------------------------+------+--------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; dreg[0]                                                            ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; dreg[0]                                                            ;
; PRESERVE_REGISTER           ; ON                     ; -    ; dreg[0]                                                            ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS ; -    ; din_s1                                                             ;
; DONT_MERGE_REGISTER         ; ON                     ; -    ; din_s1                                                             ;
; PRESERVE_REGISTER           ; ON                     ; -    ; din_s1                                                             ;
+-----------------------------+------------------------+------+--------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------+
; Source assignments for nios_reset_clk_0_domain_synch_module:nios_reset_clk_0_domain_synch ;
+-------------------+-------+------+--------------------------------------------------------+
; Assignment        ; Value ; From ; To                                                     ;
+-------------------+-------+------+--------------------------------------------------------+
; PRESERVE_REGISTER ; ON    ; -    ; data_out                                               ;
; PRESERVE_REGISTER ; ON    ; -    ; data_out~reg0                                          ;
; PRESERVE_REGISTER ; ON    ; -    ; data_in_d1                                             ;
+-------------------+-------+------+--------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a ;
+----------------+------------------+---------------------------------------------------------------------+
; Parameter Name ; Value            ; Type                                                                ;
+----------------+------------------+---------------------------------------------------------------------+
; lpm_file       ; cpu_rf_ram_a.mif ; String                                                              ;
+----------------+------------------+---------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+-----------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                  ;
+------------------------------------+----------------------+-----------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                               ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                            ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                          ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                          ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                        ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                               ;
; OPERATION_MODE                     ; DUAL_PORT            ; Untyped                                                               ;
; WIDTH_A                            ; 32                   ; Signed Integer                                                        ;
; WIDTHAD_A                          ; 5                    ; Signed Integer                                                        ;
; NUMWORDS_A                         ; 32                   ; Signed Integer                                                        ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                               ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                               ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                               ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                               ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                               ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                               ;
; WIDTH_B                            ; 32                   ; Signed Integer                                                        ;
; WIDTHAD_B                          ; 5                    ; Signed Integer                                                        ;
; NUMWORDS_B                         ; 32                   ; Signed Integer                                                        ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                               ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                               ;
; RDCONTROL_REG_B                    ; CLOCK0               ; Untyped                                                               ;
; ADDRESS_REG_B                      ; CLOCK0               ; Untyped                                                               ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                               ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                               ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                               ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                               ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                               ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                               ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                               ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                               ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                               ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                               ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                               ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                               ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                               ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                               ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                               ;
; INIT_FILE                          ; cpu_rf_ram_a.mif     ; Untyped                                                               ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                               ;
; MAXIMUM_DEPTH                      ; 0                    ; Signed Integer                                                        ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                               ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                               ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                               ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                               ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                               ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                               ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                               ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                               ;
; DEVICE_FAMILY                      ; Cyclone III          ; Untyped                                                               ;
; CBXI_PARAMETER                     ; altsyncram_p9f1      ; Untyped                                                               ;
+------------------------------------+----------------------+-----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b ;
+----------------+------------------+---------------------------------------------------------------------+
; Parameter Name ; Value            ; Type                                                                ;
+----------------+------------------+---------------------------------------------------------------------+
; lpm_file       ; cpu_rf_ram_b.mif ; String                                                              ;
+----------------+------------------+---------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+-----------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                  ;
+------------------------------------+----------------------+-----------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                               ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                            ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                          ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                          ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                        ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                               ;
; OPERATION_MODE                     ; DUAL_PORT            ; Untyped                                                               ;
; WIDTH_A                            ; 32                   ; Signed Integer                                                        ;
; WIDTHAD_A                          ; 5                    ; Signed Integer                                                        ;
; NUMWORDS_A                         ; 32                   ; Signed Integer                                                        ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                               ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                               ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                               ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                               ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                               ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                               ;
; WIDTH_B                            ; 32                   ; Signed Integer                                                        ;
; WIDTHAD_B                          ; 5                    ; Signed Integer                                                        ;
; NUMWORDS_B                         ; 32                   ; Signed Integer                                                        ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                               ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                               ;
; RDCONTROL_REG_B                    ; CLOCK0               ; Untyped                                                               ;
; ADDRESS_REG_B                      ; CLOCK0               ; Untyped                                                               ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                               ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                               ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                               ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                               ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                               ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                               ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                               ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                               ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                               ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                               ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                               ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                               ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                               ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                               ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                               ;
; INIT_FILE                          ; cpu_rf_ram_b.mif     ; Untyped                                                               ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                               ;
; MAXIMUM_DEPTH                      ; 0                    ; Signed Integer                                                        ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                               ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                               ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                               ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                               ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                               ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                               ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                               ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                               ;
; DEVICE_FAMILY                      ; Cyclone III          ; Untyped                                                               ;
; CBXI_PARAMETER                     ; altsyncram_q9f1      ; Untyped                                                               ;
+------------------------------------+----------------------+-----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component ;
+----------------+---------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value                           ; Type                                                                                                                                                   ;
+----------------+---------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; lpm_file       ; cpu_ociram_default_contents.mif ; String                                                                                                                                                 ;
+----------------+---------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram ;
+------------------------------------+---------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                           ; Type                                                                                                                                                         ;
+------------------------------------+---------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                               ; Untyped                                                                                                                                                      ;
; AUTO_CARRY_CHAINS                  ; ON                              ; AUTO_CARRY                                                                                                                                                   ;
; IGNORE_CARRY_BUFFERS               ; OFF                             ; IGNORE_CARRY                                                                                                                                                 ;
; AUTO_CASCADE_CHAINS                ; ON                              ; AUTO_CASCADE                                                                                                                                                 ;
; IGNORE_CASCADE_BUFFERS             ; OFF                             ; IGNORE_CASCADE                                                                                                                                               ;
; WIDTH_BYTEENA                      ; 1                               ; Untyped                                                                                                                                                      ;
; OPERATION_MODE                     ; BIDIR_DUAL_PORT                 ; Untyped                                                                                                                                                      ;
; WIDTH_A                            ; 32                              ; Signed Integer                                                                                                                                               ;
; WIDTHAD_A                          ; 8                               ; Signed Integer                                                                                                                                               ;
; NUMWORDS_A                         ; 256                             ; Signed Integer                                                                                                                                               ;
; OUTDATA_REG_A                      ; UNREGISTERED                    ; Untyped                                                                                                                                                      ;
; ADDRESS_ACLR_A                     ; NONE                            ; Untyped                                                                                                                                                      ;
; OUTDATA_ACLR_A                     ; NONE                            ; Untyped                                                                                                                                                      ;
; WRCONTROL_ACLR_A                   ; NONE                            ; Untyped                                                                                                                                                      ;
; INDATA_ACLR_A                      ; NONE                            ; Untyped                                                                                                                                                      ;
; BYTEENA_ACLR_A                     ; NONE                            ; Untyped                                                                                                                                                      ;
; WIDTH_B                            ; 32                              ; Signed Integer                                                                                                                                               ;
; WIDTHAD_B                          ; 8                               ; Signed Integer                                                                                                                                               ;
; NUMWORDS_B                         ; 256                             ; Signed Integer                                                                                                                                               ;
; INDATA_REG_B                       ; CLOCK1                          ; Untyped                                                                                                                                                      ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1                          ; Untyped                                                                                                                                                      ;
; RDCONTROL_REG_B                    ; CLOCK1                          ; Untyped                                                                                                                                                      ;
; ADDRESS_REG_B                      ; CLOCK1                          ; Untyped                                                                                                                                                      ;
; OUTDATA_REG_B                      ; UNREGISTERED                    ; Untyped                                                                                                                                                      ;
; BYTEENA_REG_B                      ; CLOCK1                          ; Untyped                                                                                                                                                      ;
; INDATA_ACLR_B                      ; NONE                            ; Untyped                                                                                                                                                      ;
; WRCONTROL_ACLR_B                   ; NONE                            ; Untyped                                                                                                                                                      ;
; ADDRESS_ACLR_B                     ; NONE                            ; Untyped                                                                                                                                                      ;
; OUTDATA_ACLR_B                     ; NONE                            ; Untyped                                                                                                                                                      ;
; RDCONTROL_ACLR_B                   ; NONE                            ; Untyped                                                                                                                                                      ;
; BYTEENA_ACLR_B                     ; NONE                            ; Untyped                                                                                                                                                      ;
; WIDTH_BYTEENA_A                    ; 4                               ; Signed Integer                                                                                                                                               ;
; WIDTH_BYTEENA_B                    ; 1                               ; Untyped                                                                                                                                                      ;
; RAM_BLOCK_TYPE                     ; AUTO                            ; Untyped                                                                                                                                                      ;
; BYTE_SIZE                          ; 8                               ; Untyped                                                                                                                                                      ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                        ; Untyped                                                                                                                                                      ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ            ; Untyped                                                                                                                                                      ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ            ; Untyped                                                                                                                                                      ;
; INIT_FILE                          ; cpu_ociram_default_contents.mif ; Untyped                                                                                                                                                      ;
; INIT_FILE_LAYOUT                   ; PORT_A                          ; Untyped                                                                                                                                                      ;
; MAXIMUM_DEPTH                      ; 0                               ; Untyped                                                                                                                                                      ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL                          ; Untyped                                                                                                                                                      ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL                          ; Untyped                                                                                                                                                      ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL                          ; Untyped                                                                                                                                                      ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL                          ; Untyped                                                                                                                                                      ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN                 ; Untyped                                                                                                                                                      ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN                 ; Untyped                                                                                                                                                      ;
; ENABLE_ECC                         ; FALSE                           ; Untyped                                                                                                                                                      ;
; WIDTH_ECCSTATUS                    ; 3                               ; Untyped                                                                                                                                                      ;
; DEVICE_FAMILY                      ; Cyclone III                     ; Untyped                                                                                                                                                      ;
; CBXI_PARAMETER                     ; altsyncram_6472                 ; Untyped                                                                                                                                                      ;
+------------------------------------+---------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component ;
+----------------+--------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value  ; Type                                                                                                                                                                                ;
+----------------+--------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; lpm_file       ; UNUSED ; String                                                                                                                                                                              ;
+----------------+--------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                                                                                        ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                                                                                     ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                                                                                  ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                                                                                ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                                                                                ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                                                                              ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                                                                                     ;
; OPERATION_MODE                     ; BIDIR_DUAL_PORT      ; Untyped                                                                                                                                                                     ;
; WIDTH_A                            ; 36                   ; Signed Integer                                                                                                                                                              ;
; WIDTHAD_A                          ; 7                    ; Signed Integer                                                                                                                                                              ;
; NUMWORDS_A                         ; 128                  ; Signed Integer                                                                                                                                                              ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                                                                                     ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                                                                                     ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                                                                                     ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                                                                                     ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                                                                                     ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                                                                                     ;
; WIDTH_B                            ; 36                   ; Signed Integer                                                                                                                                                              ;
; WIDTHAD_B                          ; 7                    ; Signed Integer                                                                                                                                                              ;
; NUMWORDS_B                         ; 128                  ; Signed Integer                                                                                                                                                              ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                                                                                     ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                                                                                     ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                                                                                     ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                                                                                     ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                                                                                     ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                                                                                     ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                                                                                     ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                                                                                     ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                                                                                     ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                                                                                     ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                                                                                     ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                                                                                     ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                                                                                     ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                                                                                     ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                                                                                     ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                                                                                     ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA             ; Untyped                                                                                                                                                                     ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                                                                                     ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                                                                                     ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                                                                                     ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                                                                                     ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                                                                                     ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                                                                                     ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                                                                                     ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                                                                                     ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                                                                                     ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                                                                                     ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                                                                                     ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                                                                                     ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                                                                                                                                                                     ;
; DEVICE_FAMILY                      ; Cyclone III          ; Untyped                                                                                                                                                                     ;
; CBXI_PARAMETER                     ; altsyncram_n802      ; Untyped                                                                                                                                                                     ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                        ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_jtag_debug_module_phy ;
+-------------------------+------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value                  ; Type                                                                                                                                                   ;
+-------------------------+------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; sld_mfg_id              ; 70                     ; Signed Integer                                                                                                                                         ;
; sld_type_id             ; 34                     ; Signed Integer                                                                                                                                         ;
; sld_version             ; 3                      ; Signed Integer                                                                                                                                         ;
; sld_instance_index      ; 0                      ; Signed Integer                                                                                                                                         ;
; sld_auto_instance_index ; YES                    ; String                                                                                                                                                 ;
; sld_ir_width            ; 2                      ; Signed Integer                                                                                                                                         ;
; sld_sim_n_scan          ; 0                      ; Signed Integer                                                                                                                                         ;
; sld_sim_action          ;                        ; String                                                                                                                                                 ;
; sld_sim_total_length    ; 0                      ; Signed Integer                                                                                                                                         ;
; lpm_type                ; sld_virtual_jtag_basic ; String                                                                                                                                                 ;
; lpm_hint                ; UNUSED                 ; String                                                                                                                                                 ;
+-------------------------+------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------+
; Parameter Settings for User Entity Instance: ram:the_ram ;
+----------------+------------+----------------------------+
; Parameter Name ; Value      ; Type                       ;
+----------------+------------+----------------------------+
; INIT_FILE      ; ../ram.hex ; String                     ;
+----------------+------------+----------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: ram:the_ram|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+------------------------+
; Parameter Name                     ; Value                ; Type                   ;
+------------------------------------+----------------------+------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY             ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY           ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE           ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE         ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                ;
; WIDTH_A                            ; 32                   ; Signed Integer         ;
; WIDTHAD_A                          ; 13                   ; Signed Integer         ;
; NUMWORDS_A                         ; 8192                 ; Signed Integer         ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                ;
; WIDTH_B                            ; 1                    ; Untyped                ;
; WIDTHAD_B                          ; 1                    ; Untyped                ;
; NUMWORDS_B                         ; 1                    ; Untyped                ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                ;
; WIDTH_BYTEENA_A                    ; 4                    ; Signed Integer         ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                ;
; BYTE_SIZE                          ; 8                    ; Signed Integer         ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                ;
; INIT_FILE                          ; ram.hex              ; Untyped                ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                ;
; MAXIMUM_DEPTH                      ; 8192                 ; Signed Integer         ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                ;
; ENABLE_ECC                         ; FALSE                ; Untyped                ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                ;
; DEVICE_FAMILY                      ; Cyclone III          ; Untyped                ;
; CBXI_PARAMETER                     ; altsyncram_rva1      ; Untyped                ;
+------------------------------------+----------------------+------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------+
; Parameter Settings for User Entity Instance: rom:the_rom ;
+----------------+------------+----------------------------+
; Parameter Name ; Value      ; Type                       ;
+----------------+------------+----------------------------+
; INIT_FILE      ; ../rom.hex ; String                     ;
+----------------+------------+----------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: rom:the_rom|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+------------------------+
; Parameter Name                     ; Value                ; Type                   ;
+------------------------------------+----------------------+------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY             ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY           ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE           ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE         ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                ;
; WIDTH_A                            ; 32                   ; Signed Integer         ;
; WIDTHAD_A                          ; 12                   ; Signed Integer         ;
; NUMWORDS_A                         ; 2634                 ; Signed Integer         ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                ;
; WIDTH_B                            ; 1                    ; Untyped                ;
; WIDTHAD_B                          ; 1                    ; Untyped                ;
; NUMWORDS_B                         ; 1                    ; Untyped                ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                ;
; WIDTH_BYTEENA_A                    ; 4                    ; Signed Integer         ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                ;
; BYTE_SIZE                          ; 8                    ; Signed Integer         ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                ;
; INIT_FILE                          ; rom.hex              ; Untyped                ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                ;
; MAXIMUM_DEPTH                      ; 2634                 ; Signed Integer         ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                ;
; ENABLE_ECC                         ; FALSE                ; Untyped                ;
; WIDTH_ECCSTATUS                    ; 3                    ; Untyped                ;
; DEVICE_FAMILY                      ; Cyclone III          ; Untyped                ;
; CBXI_PARAMETER                     ; altsyncram_uva1      ; Untyped                ;
+------------------------------------+----------------------+------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx|altera_std_synchronizer:the_altera_std_synchronizer ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                          ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: sld_hub:auto_hub             ;
+--------------------------+----------------------------------+-----------------+
; Parameter Name           ; Value                            ; Type            ;
+--------------------------+----------------------------------+-----------------+
; sld_hub_ip_version       ; 1                                ; Untyped         ;
; sld_hub_ip_minor_version ; 4                                ; Untyped         ;
; sld_common_ip_version    ; 0                                ; Untyped         ;
; device_family            ; Cyclone III                      ; Untyped         ;
; n_nodes                  ; 1                                ; Untyped         ;
; n_sel_bits               ; 1                                ; Untyped         ;
; n_node_ir_bits           ; 4                                ; Untyped         ;
; node_info                ; 00011001000100000100011000000000 ; Unsigned Binary ;
; compilation_mode         ; 1                                ; Untyped         ;
; BROADCAST_FEATURE        ; 1                                ; Signed Integer  ;
; FORCE_IR_CAPTURE_FEATURE ; 1                                ; Signed Integer  ;
+--------------------------+----------------------------------+-----------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; altsyncram Parameter Settings by Entity Instance                                                                                                                                                                                       ;
+-------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Name                                      ; Value                                                                                                                                                                                      ;
+-------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Number of entity instances                ; 6                                                                                                                                                                                          ;
; Entity Instance                           ; cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram                                                                                                       ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                                                                                                  ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 32                                                                                                                                                                                         ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 32                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 32                                                                                                                                                                                         ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                                                                                  ;
; Entity Instance                           ; cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram                                                                                                       ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                                                                                                  ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 32                                                                                                                                                                                         ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 32                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 32                                                                                                                                                                                         ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                                                                                  ;
; Entity Instance                           ; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram     ;
;     -- OPERATION_MODE                     ; BIDIR_DUAL_PORT                                                                                                                                                                            ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 256                                                                                                                                                                                        ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 32                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 256                                                                                                                                                                                        ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                   ;
; Entity Instance                           ; cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram ;
;     -- OPERATION_MODE                     ; BIDIR_DUAL_PORT                                                                                                                                                                            ;
;     -- WIDTH_A                            ; 36                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 128                                                                                                                                                                                        ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 36                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 128                                                                                                                                                                                        ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                   ;
; Entity Instance                           ; ram:the_ram|altsyncram:the_altsyncram                                                                                                                                                      ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                                                                                ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 8192                                                                                                                                                                                       ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 1                                                                                                                                                                                          ;
;     -- NUMWORDS_B                         ; 1                                                                                                                                                                                          ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                                                                                  ;
; Entity Instance                           ; rom:the_rom|altsyncram:the_altsyncram                                                                                                                                                      ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                                                                                ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 2634                                                                                                                                                                                       ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 1                                                                                                                                                                                          ;
;     -- NUMWORDS_B                         ; 1                                                                                                                                                                                          ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                                                                                  ;
+-------------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "nios_reset_clk_0_domain_synch_module:nios_reset_clk_0_domain_synch" ;
+---------+-------+----------+-------------------------------------------------------------------+
; Port    ; Type  ; Severity ; Details                                                           ;
+---------+-------+----------+-------------------------------------------------------------------+
; data_in ; Input ; Info     ; Stuck at VCC                                                      ;
+---------+-------+----------+-------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "uart_9600_s1_arbitrator:the_uart_9600_s1"                                                                         ;
+------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                               ; Type   ; Severity ; Details                                                                             ;
+------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; uart_9600_s1_dataavailable_from_sa ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; uart_9600_s1_readyfordata_from_sa  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+------------------------------------+--------+----------+-------------------------------------------------------------------------------------+


+---------------------------------------------+
; Port Connectivity Checks: "sysid:the_sysid" ;
+-------+-------+----------+------------------+
; Port  ; Type  ; Severity ; Details          ;
+-------+-------+----------+------------------+
; clock ; Input ; Info     ; Stuck at GND     ;
+-------+-------+----------+------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "spi_touch_spi_control_port_arbitrator:the_spi_touch_spi_control_port"                                                           ;
+--------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                                             ; Type   ; Severity ; Details                                                                             ;
+--------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; spi_touch_spi_control_port_dataavailable_from_sa ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; spi_touch_spi_control_port_endofpacket_from_sa   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; spi_touch_spi_control_port_readyfordata_from_sa  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "spi_sdcard_spi_control_port_arbitrator:the_spi_sdcard_spi_control_port"                                                          ;
+---------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                                              ; Type   ; Severity ; Details                                                                             ;
+---------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; spi_sdcard_spi_control_port_dataavailable_from_sa ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; spi_sdcard_spi_control_port_endofpacket_from_sa   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; spi_sdcard_spi_control_port_readyfordata_from_sa  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+---------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "spi_lcd22_spi_control_port_arbitrator:the_spi_lcd22_spi_control_port"                                                           ;
+--------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                                             ; Type   ; Severity ; Details                                                                             ;
+--------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; spi_lcd22_spi_control_port_dataavailable_from_sa ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; spi_lcd22_spi_control_port_endofpacket_from_sa   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; spi_lcd22_spi_control_port_readyfordata_from_sa  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_jtag_debug_module_phy" ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Port               ; Type   ; Severity ; Details                                                                                                                                         ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------+
; virtual_state_e1dr ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; virtual_state_pdr  ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; virtual_state_e2dr ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; virtual_state_cir  ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; tms                ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_tlr     ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_sdrs    ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_cdr     ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_sdr     ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_e1dr    ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_pdr     ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_e2dr    ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_udr     ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_sirs    ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_cir     ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_sir     ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_e1ir    ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_pir     ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_e2ir    ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
; jtag_state_uir     ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                        ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3" ;
+---------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port    ; Type  ; Severity ; Details                                                                                                                                                                                                                       ;
+---------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; reset_n ; Input ; Info     ; Stuck at VCC                                                                                                                                                                                                                  ;
+---------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2" ;
+---------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port    ; Type  ; Severity ; Details                                                                                                                                                                                                                       ;
+---------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; reset_n ; Input ; Info     ; Stuck at VCC                                                                                                                                                                                                                  ;
+---------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component"                       ;
+-----------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port      ; Type   ; Severity ; Details                                                                                                                                                                            ;
+-----------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; address_b ; Input  ; Warning  ; Input port expression (17 bits) is wider than the input port (7 bits) it drives.  The 10 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
; clocken0  ; Input  ; Info     ; Stuck at VCC                                                                                                                                                                       ;
; clocken1  ; Input  ; Info     ; Stuck at VCC                                                                                                                                                                       ;
; q_a       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                                                                                ;
; q_b       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                                                                                ;
+-----------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_pib:the_cpu_nios2_oci_pib"   ;
+---------+--------+----------+-------------------------------------------------------------------------------------+
; Port    ; Type   ; Severity ; Details                                                                             ;
+---------+--------+----------+-------------------------------------------------------------------------------------+
; clkx2   ; Input  ; Info     ; Stuck at GND                                                                        ;
; tr_clk  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; tr_data ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+---------+--------+----------+-------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_fifo:the_cpu_nios2_oci_fifo|cpu_nios2_oci_fifowp_inc:cpu_nios2_oci_fifowp_inc_fifowp" ;
+------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Port       ; Type   ; Severity ; Details                                                                                                                                   ;
+------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------+
; fifowp_inc ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                                       ;
+------------+--------+----------+-------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dtrace:the_cpu_nios2_oci_dtrace|cpu_nios2_oci_td_mode:cpu_nios2_oci_trc_ctrl_td_mode" ;
+---------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port    ; Type   ; Severity ; Details                                                                                                                                      ;
+---------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; td_mode ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                                          ;
+---------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace"                                                                                         ;
+------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port ; Type  ; Severity ; Details                                                                                                                                                                             ;
+------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; jdo  ; Input ; Warning  ; Input port expression (38 bits) is wider than the input port (16 bits) it drives.  The 22 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ;
+------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dbrk:the_cpu_nios2_oci_dbrk"      ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; Port         ; Type   ; Severity ; Details                                                                             ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; dbrk_trigout ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_xbrk:the_cpu_nios2_oci_xbrk"      ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; Port         ; Type   ; Severity ; Details                                                                             ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; xbrk_trigout ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component" ;
+----------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port     ; Type  ; Severity ; Details                                                                                                                                                    ;
+----------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; clocken0 ; Input ; Info     ; Stuck at VCC                                                                                                                                               ;
; clocken1 ; Input ; Info     ; Stuck at VCC                                                                                                                                               ;
+----------+-------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug" ;
+----------+-------+----------+---------------------------------------------------------------------------------------+
; Port     ; Type  ; Severity ; Details                                                                               ;
+----------+-------+----------+---------------------------------------------------------------------------------------+
; debugreq ; Input ; Info     ; Stuck at GND                                                                          ;
+----------+-------+----------+---------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci"                                                      ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port               ; Type   ; Severity ; Details                                                                             ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+
; oci_ienable[31..4] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------+
; Port Connectivity Checks: "cpu:the_cpu|cpu_test_bench:the_cpu_test_bench" ;
+-----------------+-------+----------+--------------------------------------+
; Port            ; Type  ; Severity ; Details                              ;
+-----------------+-------+----------+--------------------------------------+
; F_pcb[1..0]     ; Input ; Info     ; Stuck at GND                         ;
; i_address[1..0] ; Input ; Info     ; Stuck at GND                         ;
+-----------------+-------+----------+--------------------------------------+


+-------------------------------+
; Elapsed Time Per Partition    ;
+----------------+--------------+
; Partition Name ; Elapsed Time ;
+----------------+--------------+
; Top            ; 00:00:06     ;
+----------------+--------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 11.0 Build 157 04/27/2011 SJ Full Version
    Info: Processing started: Sat May 05 14:39:23 2012
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off nios -c nios
Info: Parallel compilation is enabled and will use 2 of the 2 processors detected
Warning: Using design file nios.v, which is not specified as a design file for the current project, but contains definitions for 24 design units and 24 entities in project
    Info: Found entity 1: DS18B20_s1_arbitrator
    Info: Found entity 2: cpu_jtag_debug_module_arbitrator
    Info: Found entity 3: cpu_data_master_arbitrator
    Info: Found entity 4: cpu_instruction_master_arbitrator
    Info: Found entity 5: lcd_cs_s1_arbitrator
    Info: Found entity 6: lcd_rs_s1_arbitrator
    Info: Found entity 7: lcd_wr_s1_arbitrator
    Info: Found entity 8: pa_s1_arbitrator
    Info: Found entity 9: pb_s1_arbitrator
    Info: Found entity 10: pc_s1_arbitrator
    Info: Found entity 11: pd_s1_arbitrator
    Info: Found entity 12: ram_s1_arbitrator
    Info: Found entity 13: reset_s1_arbitrator
    Info: Found entity 14: rom_s1_arbitrator
    Info: Found entity 15: sd_cs_s1_arbitrator
    Info: Found entity 16: spi_lcd22_spi_control_port_arbitrator
    Info: Found entity 17: spi_sdcard_spi_control_port_arbitrator
    Info: Found entity 18: spi_touch_spi_control_port_arbitrator
    Info: Found entity 19: sysid_control_slave_arbitrator
    Info: Found entity 20: touch_cs_s1_arbitrator
    Info: Found entity 21: touch_irq_s1_arbitrator
    Info: Found entity 22: uart_9600_s1_arbitrator
    Info: Found entity 23: nios_reset_clk_0_domain_synch_module
    Info: Found entity 24: nios
Info: Elaborating entity "nios" for the top level hierarchy
Info: Elaborating entity "DS18B20_s1_arbitrator" for hierarchy "DS18B20_s1_arbitrator:the_DS18B20_s1"
Warning: Using design file ds18b20.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: DS18B20
Info: Elaborating entity "DS18B20" for hierarchy "DS18B20:the_DS18B20"
Info: Elaborating entity "cpu_jtag_debug_module_arbitrator" for hierarchy "cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module"
Info: Elaborating entity "cpu_data_master_arbitrator" for hierarchy "cpu_data_master_arbitrator:the_cpu_data_master"
Info: Elaborating entity "cpu_instruction_master_arbitrator" for hierarchy "cpu_instruction_master_arbitrator:the_cpu_instruction_master"
Warning: Using design file cpu.v, which is not specified as a design file for the current project, but contains definitions for 22 design units and 22 entities in project
    Info: Found entity 1: cpu_register_bank_a_module
    Info: Found entity 2: cpu_register_bank_b_module
    Info: Found entity 3: cpu_nios2_oci_debug
    Info: Found entity 4: cpu_ociram_lpm_dram_bdp_component_module
    Info: Found entity 5: cpu_nios2_ocimem
    Info: Found entity 6: cpu_nios2_avalon_reg
    Info: Found entity 7: cpu_nios2_oci_break
    Info: Found entity 8: cpu_nios2_oci_xbrk
    Info: Found entity 9: cpu_nios2_oci_dbrk
    Info: Found entity 10: cpu_nios2_oci_itrace
    Info: Found entity 11: cpu_nios2_oci_td_mode
    Info: Found entity 12: cpu_nios2_oci_dtrace
    Info: Found entity 13: cpu_nios2_oci_compute_tm_count
    Info: Found entity 14: cpu_nios2_oci_fifowp_inc
    Info: Found entity 15: cpu_nios2_oci_fifocount_inc
    Info: Found entity 16: cpu_nios2_oci_fifo
    Info: Found entity 17: cpu_nios2_oci_pib
    Info: Found entity 18: cpu_traceram_lpm_dram_bdp_component_module
    Info: Found entity 19: cpu_nios2_oci_im
    Info: Found entity 20: cpu_nios2_performance_monitors
    Info: Found entity 21: cpu_nios2_oci
    Info: Found entity 22: cpu
Info: Elaborating entity "cpu" for hierarchy "cpu:the_cpu"
Warning: Using design file cpu_test_bench.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_test_bench
Info: Elaborating entity "cpu_test_bench" for hierarchy "cpu:the_cpu|cpu_test_bench:the_cpu_test_bench"
Info: Elaborating entity "cpu_register_bank_a_module" for hierarchy "cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a"
Info: Elaborating entity "altsyncram" for hierarchy "cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram"
Info: Elaborated megafunction instantiation "cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram"
Info: Instantiated megafunction "cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram" with the following parameter:
    Info: Parameter "address_reg_b" = "CLOCK0"
    Info: Parameter "init_file" = "cpu_rf_ram_a.mif"
    Info: Parameter "maximum_depth" = "0"
    Info: Parameter "numwords_a" = "32"
    Info: Parameter "numwords_b" = "32"
    Info: Parameter "operation_mode" = "DUAL_PORT"
    Info: Parameter "outdata_reg_b" = "UNREGISTERED"
    Info: Parameter "ram_block_type" = "AUTO"
    Info: Parameter "rdcontrol_reg_b" = "CLOCK0"
    Info: Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE"
    Info: Parameter "width_a" = "32"
    Info: Parameter "width_b" = "32"
    Info: Parameter "widthad_a" = "5"
    Info: Parameter "widthad_b" = "5"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_p9f1.tdf
    Info: Found entity 1: altsyncram_p9f1
Info: Elaborating entity "altsyncram_p9f1" for hierarchy "cpu:the_cpu|cpu_register_bank_a_module:cpu_register_bank_a|altsyncram:the_altsyncram|altsyncram_p9f1:auto_generated"
Info: Elaborating entity "cpu_register_bank_b_module" for hierarchy "cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b"
Info: Elaborating entity "altsyncram" for hierarchy "cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram"
Info: Elaborated megafunction instantiation "cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram"
Info: Instantiated megafunction "cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram" with the following parameter:
    Info: Parameter "address_reg_b" = "CLOCK0"
    Info: Parameter "init_file" = "cpu_rf_ram_b.mif"
    Info: Parameter "maximum_depth" = "0"
    Info: Parameter "numwords_a" = "32"
    Info: Parameter "numwords_b" = "32"
    Info: Parameter "operation_mode" = "DUAL_PORT"
    Info: Parameter "outdata_reg_b" = "UNREGISTERED"
    Info: Parameter "ram_block_type" = "AUTO"
    Info: Parameter "rdcontrol_reg_b" = "CLOCK0"
    Info: Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE"
    Info: Parameter "width_a" = "32"
    Info: Parameter "width_b" = "32"
    Info: Parameter "widthad_a" = "5"
    Info: Parameter "widthad_b" = "5"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_q9f1.tdf
    Info: Found entity 1: altsyncram_q9f1
Info: Elaborating entity "altsyncram_q9f1" for hierarchy "cpu:the_cpu|cpu_register_bank_b_module:cpu_register_bank_b|altsyncram:the_altsyncram|altsyncram_q9f1:auto_generated"
Info: Elaborating entity "cpu_nios2_oci" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci"
Info: Elaborating entity "cpu_nios2_oci_debug" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_debug:the_cpu_nios2_oci_debug"
Info: Elaborating entity "cpu_nios2_ocimem" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem"
Info: Elaborating entity "cpu_ociram_lpm_dram_bdp_component_module" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component"
Info: Elaborating entity "altsyncram" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram"
Info: Elaborated megafunction instantiation "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram"
Info: Instantiated megafunction "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram" with the following parameter:
    Info: Parameter "address_aclr_a" = "NONE"
    Info: Parameter "address_aclr_b" = "NONE"
    Info: Parameter "address_reg_b" = "CLOCK1"
    Info: Parameter "indata_aclr_a" = "NONE"
    Info: Parameter "indata_aclr_b" = "NONE"
    Info: Parameter "init_file" = "cpu_ociram_default_contents.mif"
    Info: Parameter "intended_device_family" = "CYCLONEIII"
    Info: Parameter "lpm_type" = "altsyncram"
    Info: Parameter "numwords_a" = "256"
    Info: Parameter "numwords_b" = "256"
    Info: Parameter "operation_mode" = "BIDIR_DUAL_PORT"
    Info: Parameter "outdata_aclr_a" = "NONE"
    Info: Parameter "outdata_aclr_b" = "NONE"
    Info: Parameter "outdata_reg_a" = "UNREGISTERED"
    Info: Parameter "outdata_reg_b" = "UNREGISTERED"
    Info: Parameter "ram_block_type" = "AUTO"
    Info: Parameter "read_during_write_mode_mixed_ports" = "OLD_DATA"
    Info: Parameter "width_a" = "32"
    Info: Parameter "width_b" = "32"
    Info: Parameter "width_byteena_a" = "4"
    Info: Parameter "widthad_a" = "8"
    Info: Parameter "widthad_b" = "8"
    Info: Parameter "wrcontrol_aclr_a" = "NONE"
    Info: Parameter "wrcontrol_aclr_b" = "NONE"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_6472.tdf
    Info: Found entity 1: altsyncram_6472
Info: Elaborating entity "altsyncram_6472" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_ocimem:the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component_module:cpu_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_6472:auto_generated"
Info: Elaborating entity "cpu_nios2_avalon_reg" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_avalon_reg:the_cpu_nios2_avalon_reg"
Info: Elaborating entity "cpu_nios2_oci_break" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_break:the_cpu_nios2_oci_break"
Info: Elaborating entity "cpu_nios2_oci_xbrk" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_xbrk:the_cpu_nios2_oci_xbrk"
Info: Elaborating entity "cpu_nios2_oci_dbrk" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dbrk:the_cpu_nios2_oci_dbrk"
Info: Elaborating entity "cpu_nios2_oci_itrace" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace"
Info: Elaborating entity "cpu_nios2_oci_dtrace" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dtrace:the_cpu_nios2_oci_dtrace"
Info: Elaborating entity "cpu_nios2_oci_td_mode" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_dtrace:the_cpu_nios2_oci_dtrace|cpu_nios2_oci_td_mode:cpu_nios2_oci_trc_ctrl_td_mode"
Info: Elaborating entity "cpu_nios2_oci_fifo" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_fifo:the_cpu_nios2_oci_fifo"
Info: Elaborating entity "cpu_nios2_oci_compute_tm_count" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_fifo:the_cpu_nios2_oci_fifo|cpu_nios2_oci_compute_tm_count:cpu_nios2_oci_compute_tm_count_tm_count"
Info: Elaborating entity "cpu_nios2_oci_fifowp_inc" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_fifo:the_cpu_nios2_oci_fifo|cpu_nios2_oci_fifowp_inc:cpu_nios2_oci_fifowp_inc_fifowp"
Info: Elaborating entity "cpu_nios2_oci_fifocount_inc" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_fifo:the_cpu_nios2_oci_fifo|cpu_nios2_oci_fifocount_inc:cpu_nios2_oci_fifocount_inc_fifocount"
Warning: Using design file cpu_oci_test_bench.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_oci_test_bench
Info: Elaborating entity "cpu_oci_test_bench" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_fifo:the_cpu_nios2_oci_fifo|cpu_oci_test_bench:the_cpu_oci_test_bench"
Warning: Entity "cpu_oci_test_bench" contains only dangling pins
Info: Elaborating entity "cpu_nios2_oci_pib" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_pib:the_cpu_nios2_oci_pib"
Info: Elaborating entity "cpu_nios2_oci_im" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im"
Info: Elaborating entity "cpu_traceram_lpm_dram_bdp_component_module" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component"
Info: Elaborating entity "altsyncram" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram"
Info: Elaborated megafunction instantiation "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram"
Info: Instantiated megafunction "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram" with the following parameter:
    Info: Parameter "address_aclr_a" = "NONE"
    Info: Parameter "address_aclr_b" = "NONE"
    Info: Parameter "address_reg_b" = "CLOCK1"
    Info: Parameter "indata_aclr_a" = "NONE"
    Info: Parameter "indata_aclr_b" = "NONE"
    Info: Parameter "init_file" = "UNUSED"
    Info: Parameter "intended_device_family" = "CYCLONEIII"
    Info: Parameter "lpm_type" = "altsyncram"
    Info: Parameter "numwords_a" = "128"
    Info: Parameter "numwords_b" = "128"
    Info: Parameter "operation_mode" = "BIDIR_DUAL_PORT"
    Info: Parameter "outdata_aclr_a" = "NONE"
    Info: Parameter "outdata_aclr_b" = "NONE"
    Info: Parameter "outdata_reg_a" = "UNREGISTERED"
    Info: Parameter "outdata_reg_b" = "UNREGISTERED"
    Info: Parameter "ram_block_type" = "AUTO"
    Info: Parameter "read_during_write_mode_mixed_ports" = "OLD_DATA"
    Info: Parameter "width_a" = "36"
    Info: Parameter "width_b" = "36"
    Info: Parameter "widthad_a" = "7"
    Info: Parameter "widthad_b" = "7"
    Info: Parameter "wrcontrol_aclr_a" = "NONE"
    Info: Parameter "wrcontrol_aclr_b" = "NONE"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_n802.tdf
    Info: Found entity 1: altsyncram_n802
Info: Elaborating entity "altsyncram_n802" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated"
Warning: Using design file cpu_jtag_debug_module_wrapper.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_jtag_debug_module_wrapper
Info: Elaborating entity "cpu_jtag_debug_module_wrapper" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper"
Warning: Using design file cpu_jtag_debug_module_tck.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_jtag_debug_module_tck
Info: Elaborating entity "cpu_jtag_debug_module_tck" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck"
Info: Elaborating entity "altera_std_synchronizer" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer"
Info: Elaborated megafunction instantiation "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer"
Info: Instantiated megafunction "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer" with the following parameter:
    Info: Parameter "depth" = "2"
Warning: Using design file cpu_jtag_debug_module_sysclk.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_jtag_debug_module_sysclk
Info: Elaborating entity "cpu_jtag_debug_module_sysclk" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_sysclk:the_cpu_jtag_debug_module_sysclk"
Info: Elaborating entity "sld_virtual_jtag_basic" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_jtag_debug_module_phy"
Info: Elaborated megafunction instantiation "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_jtag_debug_module_phy"
Info: Instantiated megafunction "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_jtag_debug_module_phy" with the following parameter:
    Info: Parameter "sld_auto_instance_index" = "YES"
    Info: Parameter "sld_instance_index" = "0"
    Info: Parameter "sld_ir_width" = "2"
    Info: Parameter "sld_mfg_id" = "70"
    Info: Parameter "sld_sim_action" = ""
    Info: Parameter "sld_sim_n_scan" = "0"
    Info: Parameter "sld_sim_total_length" = "0"
    Info: Parameter "sld_type_id" = "34"
    Info: Parameter "sld_version" = "3"
Info: Elaborating entity "sld_virtual_jtag_impl" for hierarchy "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_jtag_debug_module_phy|sld_virtual_jtag_impl:sld_virtual_jtag_impl_inst"
Info: Elaborated megafunction instantiation "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_jtag_debug_module_phy|sld_virtual_jtag_impl:sld_virtual_jtag_impl_inst", which is child of megafunction instantiation "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_jtag_debug_module_phy"
Info: Elaborating entity "lcd_cs_s1_arbitrator" for hierarchy "lcd_cs_s1_arbitrator:the_lcd_cs_s1"
Warning: Using design file lcd_cs.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: lcd_cs
Info: Elaborating entity "lcd_cs" for hierarchy "lcd_cs:the_lcd_cs"
Info: Elaborating entity "lcd_rs_s1_arbitrator" for hierarchy "lcd_rs_s1_arbitrator:the_lcd_rs_s1"
Warning: Using design file lcd_rs.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: lcd_rs
Info: Elaborating entity "lcd_rs" for hierarchy "lcd_rs:the_lcd_rs"
Info: Elaborating entity "lcd_wr_s1_arbitrator" for hierarchy "lcd_wr_s1_arbitrator:the_lcd_wr_s1"
Warning: Using design file lcd_wr.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: lcd_wr
Info: Elaborating entity "lcd_wr" for hierarchy "lcd_wr:the_lcd_wr"
Info: Elaborating entity "pa_s1_arbitrator" for hierarchy "pa_s1_arbitrator:the_pa_s1"
Warning: Using design file pa.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: pa
Info: Elaborating entity "pa" for hierarchy "pa:the_pa"
Info: Elaborating entity "pb_s1_arbitrator" for hierarchy "pb_s1_arbitrator:the_pb_s1"
Warning: Using design file pb.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: pb
Info: Elaborating entity "pb" for hierarchy "pb:the_pb"
Info: Elaborating entity "pc_s1_arbitrator" for hierarchy "pc_s1_arbitrator:the_pc_s1"
Warning: Using design file pc.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: pc
Info: Elaborating entity "pc" for hierarchy "pc:the_pc"
Info: Elaborating entity "pd_s1_arbitrator" for hierarchy "pd_s1_arbitrator:the_pd_s1"
Warning: Using design file pd.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: pd
Info: Elaborating entity "pd" for hierarchy "pd:the_pd"
Info: Elaborating entity "ram_s1_arbitrator" for hierarchy "ram_s1_arbitrator:the_ram_s1"
Warning: Using design file ram.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: ram
Info: Elaborating entity "ram" for hierarchy "ram:the_ram"
Info: Elaborating entity "altsyncram" for hierarchy "ram:the_ram|altsyncram:the_altsyncram"
Info: Elaborated megafunction instantiation "ram:the_ram|altsyncram:the_altsyncram"
Info: Instantiated megafunction "ram:the_ram|altsyncram:the_altsyncram" with the following parameter:
    Info: Parameter "byte_size" = "8"
    Info: Parameter "init_file" = "ram.hex"
    Info: Parameter "lpm_type" = "altsyncram"
    Info: Parameter "maximum_depth" = "8192"
    Info: Parameter "numwords_a" = "8192"
    Info: Parameter "operation_mode" = "SINGLE_PORT"
    Info: Parameter "outdata_reg_a" = "UNREGISTERED"
    Info: Parameter "ram_block_type" = "AUTO"
    Info: Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE"
    Info: Parameter "width_a" = "32"
    Info: Parameter "width_byteena_a" = "4"
    Info: Parameter "widthad_a" = "13"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_rva1.tdf
    Info: Found entity 1: altsyncram_rva1
Info: Elaborating entity "altsyncram_rva1" for hierarchy "ram:the_ram|altsyncram:the_altsyncram|altsyncram_rva1:auto_generated"
Info: Elaborating entity "reset_s1_arbitrator" for hierarchy "reset_s1_arbitrator:the_reset_s1"
Warning: Using design file reset.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: reset
Info: Elaborating entity "reset" for hierarchy "reset:the_reset"
Info: Elaborating entity "rom_s1_arbitrator" for hierarchy "rom_s1_arbitrator:the_rom_s1"
Warning: Using design file rom.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: rom
Info: Elaborating entity "rom" for hierarchy "rom:the_rom"
Info: Elaborating entity "altsyncram" for hierarchy "rom:the_rom|altsyncram:the_altsyncram"
Info: Elaborated megafunction instantiation "rom:the_rom|altsyncram:the_altsyncram"
Info: Instantiated megafunction "rom:the_rom|altsyncram:the_altsyncram" with the following parameter:
    Info: Parameter "byte_size" = "8"
    Info: Parameter "init_file" = "rom.hex"
    Info: Parameter "lpm_type" = "altsyncram"
    Info: Parameter "maximum_depth" = "2634"
    Info: Parameter "numwords_a" = "2634"
    Info: Parameter "operation_mode" = "SINGLE_PORT"
    Info: Parameter "outdata_reg_a" = "UNREGISTERED"
    Info: Parameter "ram_block_type" = "AUTO"
    Info: Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE"
    Info: Parameter "width_a" = "32"
    Info: Parameter "width_byteena_a" = "4"
    Info: Parameter "widthad_a" = "12"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_uva1.tdf
    Info: Found entity 1: altsyncram_uva1
Info: Elaborating entity "altsyncram_uva1" for hierarchy "rom:the_rom|altsyncram:the_altsyncram|altsyncram_uva1:auto_generated"
Warning: Width of data items in "rom.hex" is greater than the memory width. Wrapping data items to subsequent addresses. Found 2048 warnings, reporting 10
    Warning: Data at line (2) of memory initialization file "rom.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses.
    Warning: Data at line (3) of memory initialization file "rom.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses.
    Warning: Data at line (4) of memory initialization file "rom.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses.
    Warning: Data at line (5) of memory initialization file "rom.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses.
    Warning: Data at line (6) of memory initialization file "rom.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses.
    Warning: Data at line (7) of memory initialization file "rom.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses.
    Warning: Data at line (8) of memory initialization file "rom.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses.
    Warning: Data at line (9) of memory initialization file "rom.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses.
    Warning: Data at line (10) of memory initialization file "rom.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses.
    Warning: Data at line (11) of memory initialization file "rom.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses.
Critical Warning: Memory depth (2634) in the design file differs from memory depth (16384) in the Memory Initialization File "E:/Program/EP3C16/nios/ds18b20_ok/rom.hex" -- truncated remaining initial content value to fit RAM
Info: Elaborating entity "sd_cs_s1_arbitrator" for hierarchy "sd_cs_s1_arbitrator:the_sd_cs_s1"
Warning: Using design file sd_cs.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: sd_cs
Info: Elaborating entity "sd_cs" for hierarchy "sd_cs:the_sd_cs"
Info: Elaborating entity "spi_lcd22_spi_control_port_arbitrator" for hierarchy "spi_lcd22_spi_control_port_arbitrator:the_spi_lcd22_spi_control_port"
Warning: Using design file spi_lcd22.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: spi_lcd22
Info: Elaborating entity "spi_lcd22" for hierarchy "spi_lcd22:the_spi_lcd22"
Info: Elaborating entity "spi_sdcard_spi_control_port_arbitrator" for hierarchy "spi_sdcard_spi_control_port_arbitrator:the_spi_sdcard_spi_control_port"
Warning: Using design file spi_sdcard.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: spi_sdcard
Info: Elaborating entity "spi_sdcard" for hierarchy "spi_sdcard:the_spi_sdcard"
Info: Elaborating entity "spi_touch_spi_control_port_arbitrator" for hierarchy "spi_touch_spi_control_port_arbitrator:the_spi_touch_spi_control_port"
Warning: Using design file spi_touch.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: spi_touch
Info: Elaborating entity "spi_touch" for hierarchy "spi_touch:the_spi_touch"
Info: Elaborating entity "sysid_control_slave_arbitrator" for hierarchy "sysid_control_slave_arbitrator:the_sysid_control_slave"
Warning: Using design file sysid.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: sysid
Info: Elaborating entity "sysid" for hierarchy "sysid:the_sysid"
Info: Elaborating entity "touch_cs_s1_arbitrator" for hierarchy "touch_cs_s1_arbitrator:the_touch_cs_s1"
Warning: Using design file touch_cs.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: touch_cs
Info: Elaborating entity "touch_cs" for hierarchy "touch_cs:the_touch_cs"
Info: Elaborating entity "touch_irq_s1_arbitrator" for hierarchy "touch_irq_s1_arbitrator:the_touch_irq_s1"
Warning: Using design file touch_irq.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: touch_irq
Info: Elaborating entity "touch_irq" for hierarchy "touch_irq:the_touch_irq"
Info: Elaborating entity "uart_9600_s1_arbitrator" for hierarchy "uart_9600_s1_arbitrator:the_uart_9600_s1"
Warning: Using design file uart_9600.v, which is not specified as a design file for the current project, but contains definitions for 7 design units and 7 entities in project
    Info: Found entity 1: uart_9600_log_module
    Info: Found entity 2: uart_9600_tx
    Info: Found entity 3: uart_9600_rx_stimulus_source_character_source_rom_module
    Info: Found entity 4: uart_9600_rx_stimulus_source
    Info: Found entity 5: uart_9600_rx
    Info: Found entity 6: uart_9600_regs
    Info: Found entity 7: uart_9600
Info: Elaborating entity "uart_9600" for hierarchy "uart_9600:the_uart_9600"
Info: Elaborating entity "uart_9600_tx" for hierarchy "uart_9600:the_uart_9600|uart_9600_tx:the_uart_9600_tx"
Info: Elaborating entity "uart_9600_rx" for hierarchy "uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx"
Info: Elaborating entity "uart_9600_rx_stimulus_source" for hierarchy "uart_9600:the_uart_9600|uart_9600_rx:the_uart_9600_rx|uart_9600_rx_stimulus_source:the_uart_9600_rx_stimulus_source"
Info: Elaborating entity "uart_9600_regs" for hierarchy "uart_9600:the_uart_9600|uart_9600_regs:the_uart_9600_regs"
Info: Elaborating entity "nios_reset_clk_0_domain_synch_module" for hierarchy "nios_reset_clk_0_domain_synch_module:nios_reset_clk_0_domain_synch"
Warning: Synthesized away the following node(s):
    Warning: Synthesized away the following RAM node(s):
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[0]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[1]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[2]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[3]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[4]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[5]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[6]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[7]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[8]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[9]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[10]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[11]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[12]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[13]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[14]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[15]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[16]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[17]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[18]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[19]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[20]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[21]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[22]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[23]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[24]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[25]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[26]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[27]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[28]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[29]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[30]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[31]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[32]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[33]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[34]"
        Warning (14320): Synthesized away node "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component_module:cpu_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_n802:auto_generated|q_a[35]"
Warning: 3 hierarchies have connectivity warnings - see the Connectivity Checks report folder
Info: Registers with preset signals will power-up high
Info: DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
Info: Timing-Driven Synthesis is running on partition "Top"
Info: 75 registers lost all their fanouts during netlist optimizations. The first 75 are displayed below.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[0]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[1]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[2]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[3]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[4]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[5]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[6]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[7]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[8]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[9]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[10]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[11]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[12]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[13]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[14]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[15]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[16]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[17]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[18]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[19]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[20]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[21]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[22]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[23]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[24]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[25]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[26]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[27]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[28]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[29]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[30]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[31]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[34]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[33]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[32]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_itrace:the_cpu_nios2_oci_itrace|itm[35]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[0]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[16]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[15]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[14]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[13]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[12]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[11]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[10]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[9]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[8]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[7]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[6]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[5]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[4]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[3]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[2]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_nios2_oci_im:the_cpu_nios2_oci_im|trc_jtag_addr[1]" lost all its fanouts during netlist optimizations.
    Info: Register "rom_s1_arbitrator:the_rom_s1|rom_s1_arb_share_counter" lost all its fanouts during netlist optimizations.
    Info: Register "rom_s1_arbitrator:the_rom_s1|last_cycle_cpu_instruction_master_granted_slave_rom_s1" lost all its fanouts during netlist optimizations.
    Info: Register "rom_s1_arbitrator:the_rom_s1|last_cycle_cpu_data_master_granted_slave_rom_s1" lost all its fanouts during netlist optimizations.
    Info: Register "rom_s1_arbitrator:the_rom_s1|rom_s1_saved_chosen_master_vector[1]" lost all its fanouts during netlist optimizations.
    Info: Register "rom_s1_arbitrator:the_rom_s1|rom_s1_reg_firsttransfer" lost all its fanouts during netlist optimizations.
    Info: Register "ram_s1_arbitrator:the_ram_s1|ram_s1_arb_share_counter" lost all its fanouts during netlist optimizations.
    Info: Register "ram_s1_arbitrator:the_ram_s1|last_cycle_cpu_instruction_master_granted_slave_ram_s1" lost all its fanouts during netlist optimizations.
    Info: Register "ram_s1_arbitrator:the_ram_s1|last_cycle_cpu_data_master_granted_slave_ram_s1" lost all its fanouts during netlist optimizations.
    Info: Register "ram_s1_arbitrator:the_ram_s1|ram_s1_saved_chosen_master_vector[1]" lost all its fanouts during netlist optimizations.
    Info: Register "ram_s1_arbitrator:the_ram_s1|ram_s1_reg_firsttransfer" lost all its fanouts during netlist optimizations.
    Info: Register "cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_arb_share_counter" lost all its fanouts during netlist optimizations.
    Info: Register "cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|last_cycle_cpu_instruction_master_granted_slave_cpu_jtag_debug_module" lost all its fanouts during netlist optimizations.
    Info: Register "cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|last_cycle_cpu_data_master_granted_slave_cpu_jtag_debug_module" lost all its fanouts during netlist optimizations.
    Info: Register "cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_saved_chosen_master_vector[1]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_reg_firsttransfer" lost all its fanouts during netlist optimizations.
    Info: Register "ram_s1_arbitrator:the_ram_s1|ram_s1_saved_chosen_master_vector[0]" lost all its fanouts during netlist optimizations.
    Info: Register "rom_s1_arbitrator:the_rom_s1|rom_s1_saved_chosen_master_vector[0]" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize~3" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize~4" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize~5" lost all its fanouts during netlist optimizations.
    Info: Register "cpu:the_cpu|cpu_nios2_oci:the_cpu_nios2_oci|cpu_jtag_debug_module_wrapper:the_cpu_jtag_debug_module_wrapper|cpu_jtag_debug_module_tck:the_cpu_jtag_debug_module_tck|DRsize.101" lost all its fanouts during netlist optimizations.
    Info: Register "cpu_jtag_debug_module_arbitrator:the_cpu_jtag_debug_module|cpu_jtag_debug_module_saved_chosen_master_vector[0]" lost all its fanouts during netlist optimizations.
Info: Generated suppressed messages file E:/Program/EP3C16/nios/ds18b20_ok/nios.map.smsg
Info: Generating hard_block partition "hard_block:auto_generated_inst"
Info: Implemented 2415 device resources after synthesis - the final resource count might be different
    Info: Implemented 10 input pins
    Info: Implemented 17 output pins
    Info: Implemented 33 bidirectional pins
    Info: Implemented 2194 logic cells
    Info: Implemented 160 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 78 warnings
    Info: Peak virtual memory: 320 megabytes
    Info: Processing ended: Sat May 05 14:39:37 2012
    Info: Elapsed time: 00:00:14
    Info: Total CPU time (on all processors): 00:00:15


+------------------------------------------+
; Analysis & Synthesis Suppressed Messages ;
+------------------------------------------+
The suppressed messages can be found in E:/Program/EP3C16/nios/ds18b20_ok/nios.map.smsg.


