| Report Title |
Power Analysis Report |
| Design File |
D:\File\Micky\Github\T-FPGA\example\FPGA\spi-blink\impl\gwsynthesis\spi-blink.vg |
| Physical Constraints File |
D:\File\Micky\Github\T-FPGA\example\FPGA\spi-blink\src\spi-blink.cst |
| Timing Constraints File |
D:\File\Micky\Github\T-FPGA\example\FPGA\spi-blink\src\spi-blink.sdc |
| Version |
V1.9.8.01 |
| Part Number |
GW1NSR-LV4CQN48PC6/I5 |
| Device |
GW1NSR-4C |
| Created Time |
Thu Feb 23 17:21:25 2023
|
| Legal Announcement |
Copyright (C)2014-2021 Gowin Semiconductor Corporation. All rights reserved. |
| Total Power (mW) |
10.148 |
| Quiescent Power (mW) |
8.782 |
| Dynamic Power (mW) |
1.366 |
| Junction Temperature |
25.108 |
| Theta JA |
10.500 |
| Max Allowed Ambient Temperature |
84.892 |
| Default IO Toggle Rate |
0.125 |
Default Remain Toggle Rate |
0.125 |
| Use Vectorless Estimation |
false |
| Filter Glitches |
false |
| Related Vcd File |
|
| Related Saif File |
|
| Use Custom Theta JA |
false |
| Air Flow |
LFM_0 |
| Heat Sink |
None |
| Use Custom Theta SA |
false |
| Board Thermal Model |
None |
| Use Custom Theta JB |
false |
| Ambient Temperature |
25.000
|
| Voltage Source |
Voltage |
Dynamic Current(mA) |
Quiescent Current(mA) |
Power(mW) |
| VCC |
1.200 |
0.812 |
2.026 |
3.406 |
| VCCX |
2.500 |
0.076 |
2.424 |
6.250 |
| VCCO18 |
1.800 |
0.032 |
0.083 |
0.207 |
| VCCO33 |
3.300 |
0.043 |
0.043 |
0.285 |
| Block Type |
Total Power(mW) |
Static Power(mW) |
Average Toggle Rate(millions of transitions/sec) |
| Logic |
0.010 |
NA |
5.656 |
| IO |
1.237
| 0.755
| 4.375
|
| PLL |
0.872
| NA |
NA |
| Hierarchy Entity |
Total Power(mW) |
Block Dynamic Power(mW) |
| spi_top |
0.882 |
0.882(0.877) |
| spi_top/pll/ |
0.872 |
0.872(0.000) |
| spi_top/spi_slaver1/ |
0.005 |
0.005(0.000) |
| Clock Domain |
Clock Frequency(Mhz) |
Total Dynamic Power(mW) |
| rxd_flag_d |
50.000 |
0.003 |
| pll/pllvr_inst/CLKOUT.default_gen_clk |
31.250 |
0.009 |
| osc/osc_inst/OSCOUT.default_clk |
25.000 |
0.872 |