Index: libgcc/config/arm/lib1funcs.S =================================================================== --- libgcc/config/arm/lib1funcs.S (revision 231739) +++ libgcc/config/arm/lib1funcs.S (revision 231740) @@ -108,7 +108,8 @@ # define __ARM_ARCH__ 7 #endif -#if defined(__ARM_ARCH_8A__) +#if defined(__ARM_ARCH_8A__) || defined(__ARM_ARCH_8M_BASE__) \ + || defined(__ARM_ARCH_8M_MAIN__) # define __ARM_ARCH__ 8 #endif Index: libgcc/ChangeLog.arm =================================================================== --- libgcc/ChangeLog.arm (revision 231739) +++ libgcc/ChangeLog.arm (revision 231740) @@ -1,5 +1,9 @@ 2015-12-17 Thomas Preud'homme + * config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M. + +2015-12-17 Thomas Preud'homme + * config/arm/bpabi-v6m.S: Fix header comment to mention Thumb-1 rather than ARMv6-M. * config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases Index: gcc/doc/invoke.texi =================================================================== --- gcc/doc/invoke.texi (revision 231739) +++ gcc/doc/invoke.texi (revision 231740) @@ -13172,6 +13172,7 @@ @samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv6-m}, @samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, @samp{armv7e-m}, @samp{armv7ve}, @samp{armv8-a}, @samp{armv8-a+crc}, +@samp{armv8-m.base}, @samp{armv8-m.main}, @samp{armv8-m.main+dsp} @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}. @option{-march=armv7ve} is the armv7-a architecture with virtualization @@ -13467,10 +13468,10 @@ @opindex mno-unaligned-access Enables (or disables) reading and writing of 16- and 32- bit values from addresses that are not 16- or 32- bit aligned. By default -unaligned access is disabled for all pre-ARMv6 and all ARMv6-M -architectures, and enabled for all other architectures. If unaligned -access is not enabled then words in packed data structures are -accessed a byte at a time. +unaligned access is disabled for all pre-ARMv6, all ARMv6-M and for +ARMv8-M Baseline architectures, and enabled for all other +architectures. If unaligned access is not enabled then words in packed +data structures are accessed a byte at a time. The ARM attribute @code{Tag_CPU_unaligned_access} is set in the generated object file to either true or false, depending upon the Index: gcc/testsuite/ChangeLog.arm =================================================================== --- gcc/testsuite/ChangeLog.arm (revision 231739) +++ gcc/testsuite/ChangeLog.arm (revision 231740) @@ -1,5 +1,11 @@ 2015-12-17 Thomas Preud'homme + * lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and + check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and + ARMv8-M Mainline architectures. + +2015-12-17 Thomas Preud'homme + * lib/target-supports.exp (check_effective_target_arm_cortex_m): Use __ARM_ARCH_ISA_ARM to test for Cortex-M devices. Index: gcc/testsuite/lib/target-supports.exp =================================================================== --- gcc/testsuite/lib/target-supports.exp (revision 231739) +++ gcc/testsuite/lib/target-supports.exp (revision 231740) @@ -2865,7 +2865,9 @@ v7r "-march=armv7-r" __ARM_ARCH_7R__ v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__ v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__ - v8a "-march=armv8-a" __ARM_ARCH_8A__ } { + v8a "-march=armv8-a" __ARM_ARCH_8A__ } + v8m_base "-march=armv8-m.base -mthumb" __ARM_ARCH_8M_BASE__ + v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } { eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] { proc check_effective_target_arm_arch_FUNC_ok { } { if { [ string match "*-marm*" "FLAG" ] && Index: gcc/ChangeLog.arm =================================================================== --- gcc/ChangeLog.arm (revision 231739) +++ gcc/ChangeLog.arm (revision 231740) @@ -1,5 +1,28 @@ 2015-12-17 Thomas Preud'homme + * config/arm/arm-arches.def (armv8-m.base): Define new architecture. + (armv8-m.main): Likewise. + (armv8-m.main+dsp): Likewise + * config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define. + (FL_FOR_ARCH8M_MAIN): Likewise. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and + armv8-m.main+dsp to BE8_LINK_SPEC. + * config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M. + (enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN. + (TARGET_ARM_V8M): Define. + * config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M + Baseline and Mainline. + (arm_option_override_internal): Also disable arm_restrict_it when + !arm_arch_notm. + (arm_file_start): Increase architecture buffer size. + * doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main + and armv8-m.main+dsp. + (mno-unaligned-access): Clarify that this is disabled by default for + ARMv8-M Baseline architecture as well. + +2015-12-17 Thomas Preud'homme + * config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to decide whether to prevent some libgcc routines being included for some multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the Index: gcc/config/arm/arm-tables.opt =================================================================== --- gcc/config/arm/arm-tables.opt (revision 231739) +++ gcc/config/arm/arm-tables.opt (revision 231740) @@ -407,11 +407,20 @@ Enum(arm_arch) String(armv8-a+crc) Value(25) EnumValue -Enum(arm_arch) String(iwmmxt) Value(26) +Enum(arm_arch) String(armv8-m.base) Value(26) EnumValue -Enum(arm_arch) String(iwmmxt2) Value(27) +Enum(arm_arch) String(armv8-m.main) Value(27) +EnumValue +Enum(arm_arch) String(armv8-m.main+dsp) Value(28) + +EnumValue +Enum(arm_arch) String(iwmmxt) Value(29) + +EnumValue +Enum(arm_arch) String(iwmmxt2) Value(30) + Enum Name(arm_fpu) Type(int) Known ARM FPUs (for use with the -mfpu= option): Index: gcc/config/arm/arm.c =================================================================== --- gcc/config/arm/arm.c (revision 231739) +++ gcc/config/arm/arm.c (revision 231740) @@ -2153,9 +2153,11 @@ static const struct processors *arm_selected_cpu; static const struct processors *arm_selected_tune; -/* The name of the preprocessor macro to define for this architecture. */ +/* The name of the preprocessor macro to define for this architecture. PROFILE + is replaced by the architecture name (eg. 8A) in arm_option_override () and + is thus chosen to be big enough to hold the biggest architecture name. */ -char arm_arch_name[] = "__ARM_ARCH_0UNK__"; +char arm_arch_name[] = "__ARM_ARCH_PROFILE__"; /* Available values for -mfpu=. */ @@ -2869,7 +2871,8 @@ if (arm_restrict_it == 2) arm_restrict_it = arm_arch8 && TARGET_THUMB2; - if (!TARGET_THUMB2) + /* ARM execution state and M profile don't have [restrict] IT. */ + if (!TARGET_THUMB2 || !arm_arch_notm) arm_restrict_it = 0; /* If we are not using the default (ARM mode) section anchor offset @@ -25731,7 +25734,7 @@ const char* pos = strchr (arm_selected_arch->name, '+'); if (pos) { - char buf[15]; + char buf[32]; gcc_assert (strlen (arm_selected_arch->name) <= sizeof (buf) / sizeof (*pos)); strncpy (buf, arm_selected_arch->name, Index: gcc/config/arm/arm.h =================================================================== --- gcc/config/arm/arm.h (revision 231739) +++ gcc/config/arm/arm.h (revision 231740) @@ -377,7 +377,7 @@ && arm_arch_notm) /* Nonzero if this chip supports load-acquire and store-release. */ -#define TARGET_HAVE_LDACQ (TARGET_ARM_ARCH >= 8) +#define TARGET_HAVE_LDACQ (TARGET_ARM_ARCH >= 8 && TARGET_32BIT) /* Nonzero if integer division instructions supported. */ #define TARGET_IDIV ((TARGET_ARM && arm_arch_arm_hwdiv) \ @@ -483,7 +483,9 @@ BASE_ARCH_7R = 7, BASE_ARCH_7M = 7, BASE_ARCH_7EM = 7, - BASE_ARCH_8A = 8 + BASE_ARCH_8A = 8, + BASE_ARCH_8M_BASE = 8, + BASE_ARCH_8M_MAIN = 8 }; /* The major revision number of the ARM Architecture implemented by the target. */ @@ -2340,6 +2342,8 @@ && !arm_arch_thumb2) #define TARGET_ARM_V7M (TARGET_ARM_ARCH == BASE_ARCH_7M && !arm_arch_notm \ && arm_arch_thumb2) +#define TARGET_ARM_V8M (TARGET_ARM_ARCH == BASE_ARCH_8M_BASE \ + && !arm_arch_notm && !arm_arch_thumb2) /* The highest Thumb instruction set version supported by the chip. */ #define TARGET_ARM_ARCH_ISA_THUMB \ Index: gcc/config/arm/arm-protos.h =================================================================== --- gcc/config/arm/arm-protos.h (revision 231739) +++ gcc/config/arm/arm-protos.h (revision 231740) @@ -397,6 +397,8 @@ #define FL_FOR_ARCH7M (FL_FOR_ARCH7 | FL_THUMB_DIV) #define FL_FOR_ARCH7EM (FL_FOR_ARCH7M | FL_ARCH7EM) #define FL_FOR_ARCH8A (FL_FOR_ARCH7VE | FL_ARCH8) +#define FL_FOR_ARCH8M_BASE (FL_FOR_ARCH6M | FL_ARCH8 | FL_THUMB_DIV) +#define FL_FOR_ARCH8M_MAIN (FL_FOR_ARCH7M | FL_ARCH8) /* The bits in this mask specify which instructions we are allowed to generate. */ Index: gcc/config/arm/arm-arches.def =================================================================== --- gcc/config/arm/arm-arches.def (revision 231739) +++ gcc/config/arm/arm-arches.def (revision 231740) @@ -56,5 +56,8 @@ ARM_ARCH("armv7e-m", cortexm4, 7EM, FL_CO_PROC | FL_FOR_ARCH7EM) ARM_ARCH("armv8-a", cortexa53, 8A, FL_CO_PROC | FL_FOR_ARCH8A) ARM_ARCH("armv8-a+crc",cortexa53, 8A,FL_CO_PROC | FL_CRC32 | FL_FOR_ARCH8A) +ARM_ARCH("armv8-m.base", cortexm0, 8M_BASE, FL_FOR_ARCH8M_BASE) +ARM_ARCH("armv8-m.main", cortexm7, 8M_MAIN, FL_CO_PROC | FL_FOR_ARCH8M_MAIN) +ARM_ARCH("armv8-m.main+dsp",cortexm7,8M_MAIN,FL_CO_PROC|FL_ARCH7EM|FL_FOR_ARCH8M_MAIN) ARM_ARCH("iwmmxt", iwmmxt, 5TE, FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT) ARM_ARCH("iwmmxt2", iwmmxt2, 5TE, FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT | FL_IWMMXT2) Index: gcc/config/arm/bpabi.h =================================================================== --- gcc/config/arm/bpabi.h (revision 231739) +++ gcc/config/arm/bpabi.h (revision 231740) @@ -84,6 +84,9 @@ |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7 \ |march=armv6-m|mcpu=cortex-m0 \ |march=armv8-a \ + |march=armv8-m.base \ + |march=armv8-m.main \ + |march=armv8-m.main+dsp \ :%{!r:--be8}}}" #else #define BE8_LINK_SPEC \ @@ -110,6 +113,9 @@ |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7 \ |march=armv6-m|mcpu=cortex-m0 \ |march=armv8-a \ + |march=armv8-m.base \ + |march=armv8-m.main \ + |march=armv8-m.main+dsp \ :%{!r:--be8}}}" #endif