Hierarchy Input Constant Input Unused Input Floating Input Output Constant Output Unused Output Floating Output Bidir Constant Bidir Unused Bidir Input only Bidir Output only Bidir
U_NB3000AL_Slideshow_System_TFT|U_ILI9320 82 0 0 0 87 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_TFT 95 6 16 6 95 6 6 6 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|Timer_4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|Timer_3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|Timer_2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|Timer_1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|Timer_0 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|State_state_write_setup 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|State_state_write_pulse 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|State_state_write_hold 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|State_state_write_ack 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|State_state_read_ack 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|State_state_addresssetup 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|i512|lpm_add_sub_inst|auto_generated 9 0 0 0 5 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM|i512 9 4 0 4 4 4 4 4 0 0 0 0 0
U_NB3000AL_Slideshow_System_SRAM 61 0 2 0 79 0 0 0 32 0 0 0 0
U_NB3000AL_Slideshow_System_SHARED_MEM|Timer_1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SHARED_MEM|Timer_0 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SHARED_MEM|State_state_write_pulse 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SHARED_MEM|State_state_write_ack 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SHARED_MEM|State_state_read_ack 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SHARED_MEM|State_state_addresssetup 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_SHARED_MEM|i459|auto_generated 3 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_SHARED_MEM 62 14 3 14 72 14 14 14 32 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pbo_7 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pbo_6 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pbo_5 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pbo_4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pbo_3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pbo_2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pbo_1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pbo_0 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pao_7 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pao_6 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pao_5 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pao_4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pao_3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pao_2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pao_1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO|INST_pao_0 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_PRTIO 30 3 0 3 17 3 3 3 0 0 0 0 0
U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|State_3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|State_2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|State_1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM|State_0 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_MULTIMASTER_SRAM 271 0 0 0 191 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MULTIMASTER_SHARED|State_2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_MULTIMASTER_SHARED|State_1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_MULTIMASTER_SHARED|State_0 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_MULTIMASTER_SHARED 212 0 0 0 158 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_Shifter|U_Shift_Barrel 40 0 0 0 32 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_Shifter 43 1 3 1 33 1 1 1 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|U_JtagDebugUnit|TSK3000_DebugSignalController 9 0 0 0 6 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|U_JtagDebugUnit|TSK3000_DebugPort|tsk3000_ControlRegister 12 0 0 0 6 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|U_JtagDebugUnit|TSK3000_DebugPort|tsk3000_DebugDataRegister 40 0 0 0 34 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|U_JtagDebugUnit|TSK3000_DebugPort|tsk3000_SubstituteRegister 41 0 0 0 34 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|U_JtagDebugUnit|TSK3000_DebugPort|tsk3000_TapController 8 0 0 0 14 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|U_JtagDebugUnit|TSK3000_DebugPort 72 0 0 0 76 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS|U_JtagDebugUnit 73 0 0 0 75 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_OCDS 72 2 0 2 71 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MDU|U_MultDiv|RegA_Abs_0_muladd_0_31_28__Z|auto_generated|ded_mult1|right_mult|pre_result 22 0 0 0 22 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MDU|U_MultDiv|RegA_Abs_0_muladd_0_31_28__Z|auto_generated|ded_mult1|right_mult 34 0 9 0 22 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MDU|U_MultDiv|RegA_Abs_0_muladd_0_31_28__Z|auto_generated|ded_mult1|left_mult|pre_result 18 0 0 0 18 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MDU|U_MultDiv|RegA_Abs_0_muladd_0_31_28__Z|auto_generated|ded_mult1|left_mult 30 0 9 0 18 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MDU|U_MultDiv|RegA_Abs_0_muladd_0_31_28__Z|auto_generated|ded_mult1 48 9 0 9 36 9 9 9 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MDU|U_MultDiv|RegA_Abs_0_muladd_0_31_28__Z|auto_generated 41 0 3 0 36 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MDU|U_MultDiv 79 0 0 0 43 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MDU 71 0 0 0 33 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_InputSynchronizer 34 0 0 0 39 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|ProgramCounter 139 0 0 0 33 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_DataHazardResolverA 185 0 0 0 109 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_ALU 76 0 0 0 47 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_Bus_MuxB 50 0 0 0 32 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_CalculateEffectiveAddress 48 0 0 0 32 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_Execute_Mux 116 0 0 0 16 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_ExecuteBusy 3 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_MDU_EnableControl 3 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_ProgramCounterControl|U_BranchComparator 74 0 0 0 6 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_ProgramCounterControl|U_BranchTarget_Relative 46 0 0 0 30 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_ProgramCounterControl|U_MakeReturnPC 33 0 0 0 30 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_ProgramCounterControl 184 0 0 0 96 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_ShiftAmountMux 11 0 0 0 5 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_Shifter_EnableControl 3 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute|U_WriteSteering 4 0 0 0 2 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Execute 257 0 0 0 191 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_InterruptController 92 0 0 0 117 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_MemoryManager 232 0 0 0 136 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_PipeLineController 27 0 0 0 23 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_PipeStage_Decode 30 0 0 0 91 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_ReadSteering|U_ReadSteering_Mux 58 0 0 0 28 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_ReadSteering 58 0 0 0 28 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_RegisterFile 277 0 0 0 200 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Registers_GP|ram|auto_generated 45 0 0 0 32 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Registers_GP|ram_1|auto_generated 45 0 0 0 32 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Registers_GP 49 0 0 0 106 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Registers_SP 222 0 0 0 86 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Regs_EX_MEM 323 0 0 0 154 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Regs_ID_EX 226 0 0 0 159 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Regs_IF_ID 48 0 0 0 34 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU|U_Regs_MEM_WB 55 0 0 0 49 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU|U_MCU 339 0 0 0 309 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_MCU 333 62 0 62 375 62 62 62 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|AND2_componentB4 2 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|AND2_componentB3 2 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|AND2_componentB2 2 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|AND2_componentB1 2 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|AND2_componentA4 2 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|AND2_componentA3 2 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|AND2_componentA2 2 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|AND2_componentA1 2 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4_component|altsyncram_component|auto_generated 46 0 0 0 16 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u4_component 46 0 0 0 16 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3_component|altsyncram_component|auto_generated 46 0 0 0 16 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u3_component 46 0 0 0 16 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2_component|altsyncram_component|auto_generated 46 0 0 0 16 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u2_component 46 0 0 0 16 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1_component|altsyncram_component|auto_generated 46 0 0 0 16 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory|Memory_MCU_u1_component 46 0 0 0 16 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_MCU_SubPart_BootMemory 102 38 0 38 65 38 38 38 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|STORE|un10_20_2_|auto_generated 19 0 0 0 19 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|STORE|un11_20_1_|auto_generated 20 0 0 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|STORE|v_1402_20_0_|auto_generated 21 0 0 0 21 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|STORE|u_1772_20_0_|auto_generated 21 0 0 0 21 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|STORE 146 0 0 0 75 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult2_1_muladd_0_19_0_|auto_generated|ded_mult1|pre_result 20 0 0 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult2_1_muladd_0_19_0_|auto_generated|ded_mult1 32 9 0 9 20 9 9 9 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult2_1_muladd_0_19_0_|auto_generated 24 0 3 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult3_1_muladd_0_19_0_|auto_generated|ded_mult1|pre_result 20 0 0 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult3_1_muladd_0_19_0_|auto_generated|ded_mult1 32 9 0 9 20 9 9 9 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult3_1_muladd_0_19_0_|auto_generated 24 0 3 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult4_1_muladd_0_19_0_|auto_generated|ded_mult1|pre_result 20 0 0 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult4_1_muladd_0_19_0_|auto_generated|ded_mult1 32 9 0 9 20 9 9 9 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult4_1_muladd_0_19_0_|auto_generated 24 0 3 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult5_1_muladd_0_19_0_|auto_generated|ded_mult1|pre_result 20 0 0 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult5_1_muladd_0_19_0_|auto_generated|ded_mult1 32 9 0 9 20 9 9 9 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult5_1_muladd_0_19_0_|auto_generated 24 0 3 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult6_1_muladd_0_19_0_|auto_generated|ded_mult1|pre_result 20 0 0 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult6_1_muladd_0_19_0_|auto_generated|ded_mult1 32 9 0 9 20 9 9 9 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult6_1_muladd_0_19_0_|auto_generated 24 0 3 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult7_1_muladd_0_19_0_|auto_generated|ded_mult1|pre_result 20 0 0 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult7_1_muladd_0_19_0_|auto_generated|ded_mult1 32 9 0 9 20 9 9 9 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult7_1_muladd_0_19_0_|auto_generated 24 0 3 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult8_1_muladd_0_19_0_|auto_generated|ded_mult1|pre_result 20 0 0 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult8_1_muladd_0_19_0_|auto_generated|ded_mult1 32 9 0 9 20 9 9 9 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult8_1_muladd_0_19_0_|auto_generated 24 0 3 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT|PROCESS_MULTADD_mult1_1_19_0_|auto_generated 20 0 0 0 20 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|IDCT 31 0 0 0 39 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|SOS|HUFFDECODE 2139 0 0 0 30 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|SOS|jpg_comp_dcprev_I_1|auto_generated 20 0 0 0 12 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|SOS|jpg_comp|auto_generated 9 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|SOS|jpg_comp_1|auto_generated 9 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|SOS|un1_qt_din_muladd_0_11_0_|auto_generated|ded_mult1|pre_result 21 0 0 0 21 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|SOS|un1_qt_din_muladd_0_11_0_|auto_generated|ded_mult1 21 0 0 0 21 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|SOS|un1_qt_din_muladd_0_11_0_|auto_generated 25 0 4 0 21 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|SOS 2314 0 0 0 110 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|DRI 14 0 0 0 18 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|DHT 15 0 0 0 2127 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|DQT 17 0 0 0 22 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG|SOF0 21 0 0 0 80 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|U_JPG 114 0 0 0 195 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|M_QT|altsyncram_component|auto_generated 18 0 0 0 8 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|M_QT 18 0 0 0 8 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|M_MDU|altsyncram_component|auto_generated 48 0 0 0 24 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|M_MDU 48 4 0 4 24 4 4 4 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|M_IDCT|altsyncram_component|auto_generated 20 0 0 0 12 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|M_IDCT 20 0 0 0 12 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|M_HUFF|altsyncram_component|auto_generated 20 0 0 0 8 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC|M_HUFF 20 0 0 0 8 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_JPGDEC 74 6 0 6 105 6 6 6 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT|UseBadDecode 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT|LPM_COMPARE_8_8_4|auto_generated 16 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT|DecodeAddr_7 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT|DecodeAddr_6 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT|DecodeAddr_5 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT|DecodeAddr_4 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT|DecodeAddr_3 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT|DecodeAddr_2 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT|DecodeAddr_1 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT|DecodeAddr_0 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT|Bad_Decode 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_TFT 138 32 4 32 151 32 32 32 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM|UseBadDecode 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM|LPM_COMPARE_8_8_3|auto_generated 16 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM|DecodeAddr_7 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM|DecodeAddr_6 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM|DecodeAddr_5 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM|DecodeAddr_4 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM|DecodeAddr_3 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM|DecodeAddr_2 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM|DecodeAddr_1 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM|DecodeAddr_0 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM|Bad_Decode 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_MEM 138 0 4 0 151 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC|UseBadDecode 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC|LPM_COMPARE_8_8_2|auto_generated 16 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC|DecodeAddr_7 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC|DecodeAddr_6 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC|DecodeAddr_5 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC|DecodeAddr_4 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC|DecodeAddr_3 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC|DecodeAddr_2 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC|DecodeAddr_1 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC|DecodeAddr_0 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC|Bad_Decode 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_JPGDEC 138 0 4 0 151 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO|UseBadDecode 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO|LPM_COMPARE_8_8_1|auto_generated 16 0 0 0 1 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO|DecodeAddr_7 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO|DecodeAddr_6 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO|DecodeAddr_5 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO|DecodeAddr_4 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO|DecodeAddr_3 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO|DecodeAddr_2 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO|DecodeAddr_1 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO|DecodeAddr_0 5 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO|Bad_Decode 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_INTERCON_IO 148 0 5 0 142 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER|U_spi 49 0 0 0 45 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_SPI_CONTROLLER 49 8 0 8 37 8 8 8 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_31 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_30 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_29 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_28 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_27 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_26 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_25 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_24 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_23 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_22 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_21 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_20 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_19 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|WishboneAddress_18 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|SaveDataByte 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|n4p 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|MemoryDone 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_9 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_8 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_7 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_6 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_5 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_31 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_30 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_29 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_28 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_27 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_26 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_25 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_24 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_23 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_22 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_21 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_20 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_19 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_18 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_17 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_16 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_15 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_14 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_13 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_12 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_11 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_10 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_DAT_O_0 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_9 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_8 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_7 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_6 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_5 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_19 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_18 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_17 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_16 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_15 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_14 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_13 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_12 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_11 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|INST_me_ADR_O_10 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|i1619|lpm_add_sub_inst|auto_generated 63 0 0 0 32 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|i1619 63 31 0 31 31 31 31 31 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|i1618|lpm_add_sub_inst|auto_generated 5 0 0 0 3 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|i1618 5 2 0 2 2 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspiwritedivisor 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspisenddevicerequest5 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspisenddevicerequest4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspisenddevicerequest3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspisenddevicerequest2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspiresetexit 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspipreparedeviceselect4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspipreparedeviceselect3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspipreparedeviceselect2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspipreparedeviceselect1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspipreparedevicerequest4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspipreparedevicerequest3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspipreparedevicerequest2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspipreparedevicerequest1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspipreparecommand2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspipreparecommand1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspipreparecommand 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspidevicerequestcheck 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspicorecleanup 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspichannelcloseprepare4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspichannelcloseprepare3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspichannelcloseprepare2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspichannelcloseprepare1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspibusyyouwish 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sspibusy 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sidle 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fState_sbootloaderfinished 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnStateNext_sspisendreceivebyte 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnStateNext_sspisenddevicerequest2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnStateNext_sspisendcodelocation3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnStateNext_sspisendcodelocation2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnStateNext_sspisendcodelocation1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnStateNext_sspiregisterbyte 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnStateNext_sspipreparecommand1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnStateNext_sspidevicerequestcheck 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnStateNext_sspicorecleanup 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspiwritedivisor 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspisendreceivebyte 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspisendreadcommand 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspisenddevicerequest5 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspisenddevicerequest4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspisenddevicerequest3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspisenddevicerequest2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspisenddevicerequest1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspisendcodelocation3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspisendcodelocation2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspisendcodelocation1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspiresetexit 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspiregisterbyte 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspipreparedeviceselect4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspipreparedeviceselect3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspipreparedeviceselect2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspipreparedeviceselect1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspipreparedevicerequest4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspipreparedevicerequest3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspipreparedevicerequest2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspipreparedevicerequest1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspipreparecommand2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspipreparecommand1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspipreparecommand 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspigetdevicerequestconfirmation 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspideviceselect 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspidevicerequestcheck 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspicorecleanup 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspichannelcloseprepare4 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspichannelcloseprepare3 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspichannelcloseprepare2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspichannelcloseprepare1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspichannelclose 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspibusyyouwish 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sspibusy 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sidle 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fReturnState_sbootloaderfinished 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fMeState_sidle 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|fMeState_saddressincrement 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|ByteCounter_2 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|ByteCounter_1 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER|ByteCounter_0 4 2 0 2 1 2 2 2 0 0 0 0 0
U_NB3000AL_Slideshow_System_BOOTLOADER_U_BOOTLOADER 69 32 56 32 98 32 32 32 0 0 0 0 0
U_NB3000AL_Slideshow_System_BACKLIGHT|PWM1 16 0 0 0 12 0 0 0 0 0 0 0 0
U_NB3000AL_Slideshow_System_BACKLIGHT 16 0 0 0 11 0 0 0 0 0 0 0 0
U4_altpll_component|auto_generated 3 0 0 0 11 0 0 0 0 0 0 0 0
U3|U_FPGA_STARTUP8_CTRL 9 0 0 0 1 0 0 0 0 0 0 0 0
U3 9 8 0 8 1 8 8 8 0 0 0 0 0
U1 17 0 0 0 16 0 0 0 16 0 0 0 0