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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 13.438 ns
From           : SRAM0_D[1]
To             : EMAC32:U_Unique_MAC_System_EMAC|MAC32_TX:U_MAC32_TX|len[8]
From Clock     : --
To Clock       : CLK_BRD
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 20.875 ns
From           : TSK3000A_MCU:U_Unique_MAC_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Regs_ID_EX:U_Regs_ID_EX|Reg_VLWcst_3
To             : SRAM0_E
From Clock     : CLK_BRD
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 16.212 ns
From           : TEST_BUTTON
To             : ETH_RESETB_E
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 0.777 ns
From           : ETH_MDIO
To             : EMAC32:U_Unique_MAC_System_EMAC|MAC32_MDI:U_MAC32_MDI|data_in[0]
From Clock     : --
To Clock       : CLK_REF
Failed Paths   : 0

Type           : Worst-case Minimum tco
Slack          : N/A
Required Time  : None
Actual Time    : 8.069 ns
From           : WB_SPI32:U_Unique_MAC_System_SPI_SubPart_Port|spi32:U_spi|SPI_CLK
To             : SPI_CLK
From Clock     : CLK_BRD
To Clock       : --
Failed Paths   : 0

Type           : Worst-case Minimum tpd
Slack          : N/A
Required Time  : None
Actual Time    : 16.212 ns
From           : TEST_BUTTON
To             : ETH_RESETB_E
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Clock Setup: 'CLK_BRD'
Slack          : N/A
Required Time  : None
Actual Time    : 49.69 MHz ( period = 20.124 ns )
From           : Memory_MCU:U_Unique_MAC_System_MCU_SubPart_BootMemory|Memory_MCU_u4:Memory_MCU_u4_component|altsyncram:altsyncram_component|altsyncram_c1h2:auto_generated|ram_block1a4~porta_address_reg0
To             : TSK3000A_MCU:U_Unique_MAC_System_MCU_SubPart_MCU|MCU_Top:U_MCU|Registers_GP:U_Registers_GP|altsyncram:ram_1|altsyncram_j5g1:auto_generated|ram_block1a0~portb_address_reg0
From Clock     : CLK_BRD
To Clock       : CLK_BRD
Failed Paths   : 0

Type           : Clock Setup: 'ETH_TXC'
Slack          : N/A
Required Time  : None
Actual Time    : 86.72 MHz ( period = 11.532 ns )
From           : EMAC32:U_Unique_MAC_System_EMAC|MAC32_TX:U_MAC32_TX|counter_tx[9]
To             : EMAC32:U_Unique_MAC_System_EMAC|MAC32_TX:U_MAC32_TX|counter_tx[14]
From Clock     : ETH_TXC
To Clock       : ETH_TXC
Failed Paths   : 0

Type           : Clock Setup: 'ETH_RXC'
Slack          : N/A
Required Time  : None
Actual Time    : 117.70 MHz ( period = 8.496 ns )
From           : EMAC32:U_Unique_MAC_System_EMAC|MAC32_RX:U_MAC32_RX|counter_rx[1]
To             : EMAC32:U_Unique_MAC_System_EMAC|MAC32_RX:U_MAC32_RX|mac_ok
From Clock     : ETH_RXC
To Clock       : ETH_RXC
Failed Paths   : 0

Type           : Clock Setup: 'JTAG_NEXUS_TCK'
Slack          : N/A
Required Time  : None
Actual Time    : 162.00 MHz ( period = 6.173 ns )
From           : TSK3000A_OCDS:U_Unique_MAC_System_MCU_SubPart_OCDS|JtagDebugUnit:U_JtagDebugUnit|DebugPort:TSK3000_DebugPort|SubstituteRegister:tsk3000_SubstituteRegister|NexusReg_Shift_0__Z
To             : TERMINAL:U_Unique_MAC_System_SOFT_TERM|TERMINALCORE:U_terminal|TERMINALCORE_DATAREG_INOUT_WR_8_2:RegisterWriteFromInstrument|sh_reg[7]
From Clock     : JTAG_NEXUS_TCK
To Clock       : JTAG_NEXUS_TCK
Failed Paths   : 0

Type           : Clock Setup: 'CLK_REF'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 250.00 MHz ( period = 4.000 ns )
From           : EMAC32:U_Unique_MAC_System_EMAC|MAC32_MDI:U_MAC32_MDI|counter[5]
To             : EMAC32:U_Unique_MAC_System_EMAC|MAC32_MDI:U_MAC32_MDI|data_in[2]
From Clock     : CLK_REF
To Clock       : CLK_REF
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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