State Machine - |hello|base_cro:inst2|sdram_0:the_sdram_0|m_next
Name m_next.010000000 m_next.000010000 m_next.000001000 m_next.000000001 
m_next.000000001 0 0 0 0 
m_next.000001000 0 0 1 1 
m_next.000010000 0 1 0 1 
m_next.010000000 1 0 0 1 

State Machine - |hello|base_cro:inst2|sdram_0:the_sdram_0|m_state
Name m_state.100000000 m_state.010000000 m_state.001000000 m_state.000100000 m_state.000010000 m_state.000001000 m_state.000000100 m_state.000000010 m_state.000000001 
m_state.000000001 0 0 0 0 0 0 0 0 0 
m_state.000000010 0 0 0 0 0 0 0 1 1 
m_state.000000100 0 0 0 0 0 0 1 0 1 
m_state.000001000 0 0 0 0 0 1 0 0 1 
m_state.000010000 0 0 0 0 1 0 0 0 1 
m_state.000100000 0 0 0 1 0 0 0 0 1 
m_state.001000000 0 0 1 0 0 0 0 0 1 
m_state.010000000 0 1 0 0 0 0 0 0 1 
m_state.100000000 1 0 0 0 0 0 0 0 1 

State Machine - |hello|base_cro:inst2|sdram_0:the_sdram_0|i_next
Name i_next.111 i_next.101 i_next.010 i_next.000 
i_next.000 0 0 0 0 
i_next.010 0 0 1 1 
i_next.101 0 1 0 1 
i_next.111 1 0 0 1 

State Machine - |hello|base_cro:inst2|sdram_0:the_sdram_0|i_state
Name i_state.111 i_state.101 i_state.011 i_state.010 i_state.001 i_state.000 
i_state.000 0 0 0 0 0 0 
i_state.001 0 0 0 0 1 1 
i_state.010 0 0 0 1 0 1 
i_state.011 0 0 1 0 0 1 
i_state.101 0 1 0 0 0 1 
i_state.111 1 0 0 0 0 1 

State Machine - |hello|base_cro:inst2|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module_tck:the_cpu_0_jtag_debug_module_tck|DRsize
Name DRsize.101 DRsize.100 DRsize.011 DRsize.010 DRsize.001 DRsize.000 
DRsize.000 0 0 0 0 0 0 
DRsize.001 0 0 0 0 1 1 
DRsize.010 0 0 0 1 0 1 
DRsize.011 0 0 1 0 0 1 
DRsize.100 0 1 0 0 0 1 
DRsize.101 1 0 0 0 0 1