//Copyright (C)2014-2021 Gowin Semiconductor Corporation. //All rights reserved. 1. PnR Messages : PnR Report : D:\File\Micky\Github\T-FPGA\example\FPGA\spi-blink\impl\gwsynthesis\spi-blink.vg : D:\File\Micky\Github\T-FPGA\example\FPGA\spi-blink\src\spi-blink.cst : D:\File\Micky\Github\T-FPGA\example\FPGA\spi-blink\src\spi-blink.sdc : V1.9.8.01 : GW1NSR-LV4CQN48PC6/I5 : GW1NSR-4C :Thu Feb 23 17:21:25 2023 2. PnR Details Running placement: Placement Phase 0: CPU time = 0h 0m 0.004s, Elapsed time = 0h 0m 0.003s Placement Phase 1: CPU time = 0h 0m 0.056s, Elapsed time = 0h 0m 0.056s Placement Phase 2: CPU time = 0h 0m 0.001s, Elapsed time = 0h 0m 0.001s Placement Phase 3: CPU time = 0h 0m 0.745s, Elapsed time = 0h 0m 0.745s Total Placement: CPU time = 0h 0m 0.806s, Elapsed time = 0h 0m 0.805s Running routing: Routing Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s Routing Phase 1: CPU time = 0h 0m 0.027s, Elapsed time = 0h 0m 0.028s Routing Phase 2: CPU time = 0h 0m 0.031s, Elapsed time = 0h 0m 0.032s Total Routing: CPU time = 0h 0m 0.058s, Elapsed time = 0h 0m 0.06s Generate output files: CPU time = 0h 0m 0.472s, Elapsed time = 0h 0m 0.471s Total Time and Memory Usage: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s, Peak memory usage = 145MB 3. Resource Usage Summary ---------------------------------------------------------- Resources | Usage ---------------------------------------------------------- Logic | 33/4608 1% --LUT,ALU,ROM16 | 33(25 LUT, 8 ALU, 0 ROM16) --SSRAM(RAM16) | 0 Register | 37/3570 1% --Logic Register as Latch | 0/3456 0% --Logic Register as FF | 34/3456 1% --I/O Register as Latch | 0/114 0% --I/O Register as FF | 3/114 2% CLS | 29/2304 1% I/O Port | 16 I/O Buf | 15 --Input Buf | 4 --Output Buf | 11 --Inout Buf | 0 IOLOGIC | 0% BSRAM | 0% DSP | 0% PLL | 1/2 50% DCS | 0/4 0% DQCE | 0/12 0% OSC | 1/1 100% CLKDIV | 0/6 0% DLLDLY | 0/6 0% DHCEN | 0/12 0% ========================================================== 4. I/O Bank Usage Summary ----------------------- I/O Bank | Usage ----------------------- bank 0 | 0/10(0%) bank 1 | 6/10(60%) bank 2 | 8/9(88%) bank 3 | 1/24(4%) ======================= 5. Global Clock Usage Summary ------------------------------- Global Clock | Usage ------------------------------- PRIMARY | 3/8(37%) SECONDARY | 0/8(0%) GCLK_PIN | 2/5(40%) PLL | 1/2(50%) CLKDIV | 0/6(0%) DLLDLY | 0/6(0%) =============================== 6. Global Clock Signals ------------------------------------------- Signal | Global Clock | Location ------------------------------------------- oscout_o | PRIMARY | RIGHT clk_30M | PRIMARY | LEFT RIGHT rxd_flag_d | PRIMARY | LEFT RIGHT =========================================== 7. Pinout by Port Name ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Port Name | Diff Pair | Loc./Bank | Constraint | Dir. | Site | IO Type | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Slew Rate | Vref | Single Resistor | Diff Resistor | BankVccio ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- clk | | 45/1 | Y | in | IOT13[A] | LVCMOS12 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 rst | | 46/1 | Y | in | IOT13[B] | LVCMOS33 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 cs | | 39/1 | Y | in | IOT26[A] | LVCMOS33 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 sck | | 44/1 | Y | in | IOT17[B] | LVCMOS33 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 MOSI | | 41/1 | Y | in | IOT20[A] | LVCMOS33 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 MISO | | 40/1 | Y | out | IOT26[B] | LVCMOS33 | 8 | NONE | NA | NA | OFF | FAST | NA | NA | NA | 3.3 rxd_out[0] | | 35/2 | N | out | IOR2[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 rxd_out[1] | | 34/2 | N | out | IOR2[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 rxd_out[2] | | 33/2 | N | out | IOR9[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 rxd_out[3] | | 32/2 | N | out | IOR11[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 rxd_out[4] | | 29/2 | N | out | IOR15[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 rxd_out[5] | | 31/2 | N | out | IOR11[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 rxd_out[6] | | 30/2 | N | out | IOR15[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 rxd_out[7] | | 28/2 | N | out | IOR17[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 rxd_flag | | 42/1 | Y | out | IOT20[B] | LVCMOS33 | 8 | NONE | NA | NA | OFF | FAST | NA | NA | NA | 3.3 led_state | | 15/3 | Y | out | IOB5[A] | LVCMOS33 | 8 | NONE | NA | NA | OFF | FAST | NA | NA | NA | 3.3 =================================================================================================================================================================================================================== 8. All Package Pins ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Loc./Bank| Signal | Dir. | Site | IO Type | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Slew Rate | Vref | Single Resistor | Diff Resistor | Bank Vccio ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- 3/0 | - | in | IOT2[A] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | - 4/0 | - | out | IOT2[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | NA | NA | - 6/0 | - | in | IOT3[A] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | - 7/0 | - | in | IOT3[B] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | - 8/0 | - | in | IOT4[B] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | - 9/0 | - | in | IOT5[B] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | - 10/0 | - | in | IOT7[A] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | - 1/0 | - | in | IOT10[A] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | - 2/0 | - | in | IOT10[B] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | - 48/1 | - | in | IOT11[A] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 47/1 | - | in | IOT11[B] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 45/1 | clk | in | IOT13[A] | LVCMOS12 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 46/1 | rst | in | IOT13[B] | LVCMOS33 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 43/1 | - | in | IOT17[A] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 44/1 | sck | in | IOT17[B] | LVCMOS33 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 41/1 | MOSI | in | IOT20[A] | LVCMOS33 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 42/1 | rxd_flag | out | IOT20[B] | LVCMOS33 | 8 | NONE | NA | NA | OFF | FAST | NA | NA | NA | 3.3 39/1 | cs | in | IOT26[A] | LVCMOS33 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 40/1 | MISO | out | IOT26[B] | LVCMOS33 | 8 | NONE | NA | NA | OFF | FAST | NA | NA | NA | 3.3 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- 13/3 | - | in | IOB4[A] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 14/3 | - | in | IOB4[B] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 15/3 | led_state | out | IOB5[A] | LVCMOS33 | 8 | NONE | NA | NA | OFF | FAST | NA | NA | NA | 3.3 16/3 | - | in | IOB6[A] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 17/3 | - | in | IOB6[B] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 18/3 | - | in | IOB13[A] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 19/3 | - | in | IOB13[B] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 20/3 | - | in | IOB16[A] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 21/3 | - | in | IOB16[B] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 22/3 | - | in | IOB22[A] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 23/3 | - | in | IOB22[B] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 3.3 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- 35/2 | rxd_out[0] | out | IOR2[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 34/2 | rxd_out[1] | out | IOR2[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 33/2 | rxd_out[2] | out | IOR9[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 32/2 | rxd_out[3] | out | IOR11[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 31/2 | rxd_out[5] | out | IOR11[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 30/2 | rxd_out[6] | out | IOR15[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 29/2 | rxd_out[4] | out | IOR15[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 28/2 | rxd_out[7] | out | IOR17[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | FAST | NA | OFF | NA | 1.8 27/2 | - | in | IOR17[B] | LVCMOS18 | NA | UP | NA | NONE | NA | NA | NA | NA | NA | 1.8 ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ========================================================================================================================================================================================