Assembler report for LED_CTL_PRJ
Sat Oct 02 23:31:48 2010
Quartus II Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Assembler Summary
  3. Assembler Settings
  4. Assembler Generated Files
  5. Assembler Device Options: P:/users/Wolfgang/Projekte/Altium Nanoboard/Discovery Session 1/ProjectOutputs/NB3000AL_02/LED_CTL_PRJ.sof
  6. Assembler Device Options: P:/users/Wolfgang/Projekte/Altium Nanoboard/Discovery Session 1/ProjectOutputs/NB3000AL_02/LED_CTL_PRJ.rbf
  7. Assembler Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2010 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+---------------------------------------------------------------+
; Assembler Summary                                             ;
+-----------------------+---------------------------------------+
; Assembler Status      ; Successful - Sat Oct 02 23:31:48 2010 ;
; Revision Name         ; LED_CTL_PRJ                           ;
; Top-level Entity Name ; LED_CTL_PRJ                           ;
; Family                ; Cyclone III                           ;
; Device                ; EP3C40F780C8                          ;
+-----------------------+---------------------------------------+


+--------------------------------------------------------------------------------------------------------+
; Assembler Settings                                                                                     ;
+-----------------------------------------------------------------------------+----------+---------------+
; Option                                                                      ; Setting  ; Default Value ;
+-----------------------------------------------------------------------------+----------+---------------+
; Generate compressed bitstreams                                              ; Off      ; On            ;
; Use configuration device                                                    ; On       ; Off           ;
; Generate Tabular Text File (.ttf) For Target Device                         ; On       ; Off           ;
; Generate Raw Binary File (.rbf) For Target Device                           ; On       ; Off           ;
; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device ; On       ; Off           ;
; Auto-restart configuration after error                                      ; Off      ; On            ;
; Generate Serial Vector Format File (.svf) for Target Device                 ; On       ; Off           ;
; Generate a JEDEC STAPL Format File (.jam) for Target Device                 ; On       ; Off           ;
; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; On       ; Off           ;
; Use smart compilation                                                       ; Off      ; Off           ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation  ; On       ; On            ;
; Enable compact report table                                                 ; Off      ; Off           ;
; Compression mode                                                            ; Off      ; Off           ;
; Clock source for configuration device                                       ; Internal ; Internal      ;
; Clock frequency of the configuration device                                 ; 10 MHZ   ; 10 MHz        ;
; Divide clock frequency by                                                   ; 1        ; 1             ;
; Auto user code                                                              ; Off      ; Off           ;
; Configuration device                                                        ; Auto     ; Auto          ;
; Configuration device auto user code                                         ; Off      ; Off           ;
; Hexadecimal Output File start address                                       ; 0        ; 0             ;
; Hexadecimal Output File count direction                                     ; Up       ; Up            ;
; Release clears before tri-states                                            ; Off      ; Off           ;
; Enable OCT_DONE                                                             ; Off      ; Off           ;
; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; On       ; On            ;
+-----------------------------------------------------------------------------+----------+---------------+


+---------------------------------------------------------------------------------------------------------------+
; Assembler Generated Files                                                                                     ;
+---------------------------------------------------------------------------------------------------------------+
; File Name                                                                                                     ;
+---------------------------------------------------------------------------------------------------------------+
; P:/users/Wolfgang/Projekte/Altium Nanoboard/Discovery Session 1/ProjectOutputs/NB3000AL_02/LED_CTL_PRJ.sof    ;
; P:/users/Wolfgang/Projekte/Altium Nanoboard/Discovery Session 1/ProjectOutputs/NB3000AL_02/LED_CTL_PRJ.jam    ;
; P:/users/Wolfgang/Projekte/Altium Nanoboard/Discovery Session 1/ProjectOutputs/NB3000AL_02/LED_CTL_PRJ.jbc    ;
; P:/users/Wolfgang/Projekte/Altium Nanoboard/Discovery Session 1/ProjectOutputs/NB3000AL_02/LED_CTL_PRJ.svf    ;
; P:/users/Wolfgang/Projekte/Altium Nanoboard/Discovery Session 1/ProjectOutputs/NB3000AL_02/LED_CTL_PRJ.ttf    ;
; P:/users/Wolfgang/Projekte/Altium Nanoboard/Discovery Session 1/ProjectOutputs/NB3000AL_02/LED_CTL_PRJ.rbf    ;
; P:/users/Wolfgang/Projekte/Altium Nanoboard/Discovery Session 1/ProjectOutputs/NB3000AL_02/LED_CTL_PRJ.hexout ;
+---------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Assembler Device Options: P:/users/Wolfgang/Projekte/Altium Nanoboard/Discovery Session 1/ProjectOutputs/NB3000AL_02/LED_CTL_PRJ.sof ;
+----------------+---------------------------------------------------------------------------------------------------------------------+
; Option         ; Setting                                                                                                             ;
+----------------+---------------------------------------------------------------------------------------------------------------------+
; Device         ; EP3C40F780C8                                                                                                        ;
; JTAG usercode  ; 0xFFFFFFFF                                                                                                          ;
; Checksum       ; 0x0020D764                                                                                                          ;
+----------------+---------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Assembler Device Options: P:/users/Wolfgang/Projekte/Altium Nanoboard/Discovery Session 1/ProjectOutputs/NB3000AL_02/LED_CTL_PRJ.rbf ;
+---------------------+----------------------------------------------------------------------------------------------------------------+
; Option              ; Setting                                                                                                        ;
+---------------------+----------------------------------------------------------------------------------------------------------------+
; Raw Binary File     ;                                                                                                                ;
;  Compression Ratio  ; 1                                                                                                              ;
+---------------------+----------------------------------------------------------------------------------------------------------------+


+--------------------+
; Assembler Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Assembler
    Info: Version 9.1 Build 350 03/24/2010 Service Pack 2 SJ Web Edition
    Info: Copyright (C) 1991-2010 Altera Corporation. All rights reserved.
    Info: Your use of Altera Corporation's design tools, logic functions 
    Info: and other software and tools, and its AMPP partner logic 
    Info: functions, and any output files from any of the foregoing 
    Info: (including device programming or simulation files), and any 
    Info: associated documentation or information are expressly subject 
    Info: to the terms and conditions of the Altera Program License 
    Info: Subscription Agreement, Altera MegaCore Function License 
    Info: Agreement, or other applicable license agreement, including, 
    Info: without limitation, that your use is for the sole purpose of 
    Info: programming logic devices manufactured by Altera and sold by 
    Info: Altera or its authorized distributors.  Please refer to the 
    Info: applicable agreement for further details.
    Info: Processing started: Sat Oct 02 23:31:36 2010
Info: Command: quartus_asm LED_CTL_PRJ
Info: Writing out detailed assembly data for power analysis
Info: Assembler is generating device programming files
Info: Quartus II Assembler was successful. 0 errors, 0 warnings
    Info: Peak virtual memory: 258 megabytes
    Info: Processing ended: Sat Oct 02 23:31:49 2010
    Info: Elapsed time: 00:00:13
    Info: Total CPU time (on all processors): 00:00:10


