Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
nios_cpu_inst|nios_cpu_reset_clk_0_domain_synch |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_sysid |
3 |
15 |
1 |
15 |
32 |
15 |
15 |
15 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_sysid_control_slave |
54 |
1 |
2 |
1 |
39 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_row |
38 |
0 |
28 |
0 |
32 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_row_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_ram|the_altsyncram|auto_generated|mux2 |
65 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_ram|the_altsyncram|auto_generated|decode3 |
2 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_ram|the_altsyncram|auto_generated |
53 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_ram |
55 |
0 |
1 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_ram_s1 |
111 |
1 |
4 |
1 |
96 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_led |
38 |
0 |
28 |
0 |
32 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_led_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_cpu |
150 |
32 |
0 |
32 |
109 |
32 |
32 |
32 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_cpu_instruction_master |
95 |
0 |
1 |
0 |
53 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_cpu_data_master |
245 |
0 |
16 |
0 |
51 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_cpu_jtag_debug_module |
113 |
1 |
4 |
1 |
92 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_col |
38 |
0 |
28 |
0 |
32 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
0 |
nios_cpu_inst|the_col_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
nios_cpu_inst |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |