| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| nios_reset_clk_0_domain_synch |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_uart_9600|the_uart_9600_regs |
41 |
13 |
6 |
13 |
44 |
13 |
13 |
13 |
0 |
0 |
0 |
0 |
0 |
| the_uart_9600|the_uart_9600_rx|the_uart_9600_rx_stimulus_source |
18 |
0 |
17 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_uart_9600|the_uart_9600_rx |
20 |
1 |
0 |
1 |
13 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_uart_9600|the_uart_9600_tx |
28 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_uart_9600 |
26 |
0 |
0 |
0 |
20 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_uart_9600_s1 |
73 |
1 |
18 |
1 |
48 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_touch_irq |
5 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_touch_irq_s1 |
54 |
1 |
2 |
1 |
40 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_touch_cs |
38 |
31 |
31 |
31 |
33 |
31 |
31 |
31 |
0 |
0 |
0 |
0 |
0 |
| the_touch_cs_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_sysid |
3 |
16 |
1 |
16 |
32 |
16 |
16 |
16 |
0 |
0 |
0 |
0 |
0 |
| the_sysid_control_slave |
54 |
1 |
2 |
1 |
39 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_spi_touch |
25 |
0 |
0 |
0 |
23 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_spi_touch_spi_control_port |
74 |
1 |
18 |
1 |
48 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_spi_sdcard |
25 |
0 |
0 |
0 |
23 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_spi_sdcard_spi_control_port |
74 |
1 |
18 |
1 |
48 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_spi_lcd22 |
25 |
0 |
0 |
0 |
23 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_spi_lcd22_spi_control_port |
74 |
1 |
18 |
1 |
48 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_sd_cs |
38 |
31 |
31 |
31 |
33 |
31 |
31 |
31 |
0 |
0 |
0 |
0 |
0 |
| the_sd_cs_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_rom|the_altsyncram|auto_generated |
51 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_rom |
53 |
0 |
1 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_rom_s1 |
110 |
1 |
4 |
1 |
94 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_reset |
38 |
31 |
31 |
31 |
33 |
31 |
31 |
31 |
0 |
0 |
0 |
0 |
0 |
| the_reset_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_ram|the_altsyncram|auto_generated |
52 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_ram |
54 |
0 |
1 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_ram_s1 |
110 |
1 |
4 |
1 |
95 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_pd |
38 |
0 |
24 |
0 |
32 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
| the_pd_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_pc |
38 |
0 |
24 |
0 |
32 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
| the_pc_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_pb |
38 |
0 |
24 |
0 |
32 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
| the_pb_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_pa |
38 |
0 |
24 |
0 |
32 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
| the_pa_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_lcd_wr |
38 |
31 |
31 |
31 |
33 |
31 |
31 |
31 |
0 |
0 |
0 |
0 |
0 |
| the_lcd_wr_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_lcd_rs |
38 |
31 |
31 |
31 |
33 |
31 |
31 |
31 |
0 |
0 |
0 |
0 |
0 |
| the_lcd_rs_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_lcd_cs |
38 |
31 |
31 |
31 |
33 |
31 |
31 |
31 |
0 |
0 |
0 |
0 |
0 |
| the_lcd_cs_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_jtag_debug_module_wrapper|the_cpu_jtag_debug_module_sysclk |
43 |
0 |
0 |
0 |
51 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_jtag_debug_module_wrapper|the_cpu_jtag_debug_module_tck |
130 |
0 |
1 |
0 |
43 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_jtag_debug_module_wrapper |
123 |
0 |
0 |
0 |
53 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component|the_altsyncram|auto_generated |
92 |
0 |
0 |
0 |
72 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_im|cpu_traceram_lpm_dram_bdp_component |
92 |
2 |
0 |
2 |
72 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_im |
97 |
36 |
17 |
36 |
48 |
36 |
36 |
36 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_pib |
39 |
20 |
38 |
20 |
19 |
20 |
20 |
20 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_fifo|the_cpu_oci_test_bench |
36 |
0 |
36 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_fifo|cpu_nios2_oci_fifocount_inc_fifocount |
5 |
0 |
0 |
0 |
5 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_fifo|cpu_nios2_oci_fifowp_inc_fifowp |
4 |
2 |
0 |
2 |
4 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_fifo|cpu_nios2_oci_compute_tm_count_tm_count |
3 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_fifo |
151 |
0 |
65 |
0 |
36 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_dtrace|cpu_nios2_oci_trc_ctrl_td_mode |
9 |
0 |
6 |
0 |
4 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_dtrace |
103 |
0 |
92 |
0 |
72 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_itrace |
25 |
17 |
23 |
17 |
87 |
17 |
17 |
17 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_dbrk |
88 |
0 |
0 |
0 |
92 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_xbrk |
54 |
5 |
51 |
5 |
6 |
5 |
5 |
5 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_break |
52 |
36 |
6 |
36 |
71 |
36 |
36 |
36 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_avalon_reg |
49 |
0 |
28 |
0 |
68 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component|the_altsyncram|auto_generated |
90 |
0 |
0 |
0 |
64 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_ocimem|cpu_ociram_lpm_dram_bdp_component |
90 |
2 |
0 |
2 |
64 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_ocimem |
93 |
0 |
6 |
0 |
64 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci|the_cpu_nios2_oci_debug |
50 |
1 |
30 |
1 |
7 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_nios2_oci |
158 |
0 |
0 |
0 |
68 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|cpu_register_bank_b|the_altsyncram|auto_generated |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|cpu_register_bank_b |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|cpu_register_bank_a|the_altsyncram|auto_generated |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|cpu_register_bank_a |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu|the_cpu_test_bench |
459 |
3 |
422 |
3 |
34 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
| the_cpu |
149 |
0 |
28 |
0 |
109 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu_instruction_master |
132 |
0 |
5 |
0 |
51 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu_data_master |
704 |
28 |
57 |
28 |
83 |
28 |
28 |
28 |
0 |
0 |
0 |
0 |
0 |
| the_cpu_jtag_debug_module |
112 |
2 |
4 |
2 |
92 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| the_DS18B20 |
38 |
0 |
31 |
0 |
32 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
| the_DS18B20_s1 |
87 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |