| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| nios_reset_clk_0_domain_synch |
3 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_sysid |
3 |
20 |
1 |
20 |
32 |
20 |
20 |
20 |
0 |
0 |
0 |
0 |
0 |
| the_sysid_control_slave |
53 |
1 |
2 |
1 |
39 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_rom|the_altsyncram|auto_generated |
52 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_rom |
55 |
0 |
1 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_rom_s1 |
110 |
1 |
4 |
1 |
96 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_ram|the_altsyncram|auto_generated |
51 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_ram |
53 |
0 |
1 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_ram_s1 |
109 |
1 |
4 |
1 |
94 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_pa |
38 |
0 |
24 |
0 |
32 |
0 |
0 |
0 |
8 |
0 |
0 |
0 |
0 |
| the_pa_s1 |
86 |
1 |
2 |
1 |
74 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| the_cpu |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu_instruction_master |
131 |
0 |
2 |
0 |
52 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu_data_master |
208 |
0 |
12 |
0 |
50 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| the_cpu_jtag_debug_module |
111 |
1 |
4 |
1 |
92 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |