Index of /pub/projects/OpenEPC3C16/verilog/DS18B20

	Name	Last modified	Size	Description
	Parent Directory		-
	db/	2014-07-21 05:43	-
	incremental_db/	2014-07-21 05:43	-
	src/	2016-02-03 21:01	-
	ds18b20_seg7.done	2012-10-12 05:29	26
	undo_redo.txt	2012-10-12 05:29	72
	output_file.map	2012-10-12 05:29	130
	ds18b20_seg7.map.smsg	2012-10-12 05:29	135
	ds18b20_seg7.cdf	2012-10-12 05:29	363
	ds18b20_seg7.map.summary	2012-10-12 05:29	470
	ds18b20_seg7.fit.smsg	2012-10-12 05:29	513
	ds18b20_seg7.fit.summary	2012-10-12 05:29	611
	ds18b20_seg7.qws	2012-10-12 05:29	953
	ds18b20_seg7.qpf	2012-10-12 05:29	1.3K
	ds18b20_seg7.tan.summary	2012-10-12 05:29	1.6K
	ds18b20_seg7.sta.summary	2012-10-12 05:29	1.9K
	ds18b20_seg7.qsf	2012-10-12 05:29	5.0K
	ds18b20_seg7.asm.rpt	2012-10-12 05:29	7.9K
	ds18b20_seg7.flow.rpt	2012-10-12 05:29	9.9K
	ds18b20_seg7.pin	2012-10-12 05:29	30K
	ds18b20_seg7.map.rpt	2012-10-12 05:29	35K
	ds18b20_seg7_assignment_defaults.qdf	2012-10-12 05:29	48K
	ds18b20_seg7.tan.rpt	2012-10-12 05:29	90K
	ds18b20_seg7.fit.rpt	2012-10-12 05:29	174K
	ds18b20_seg7.sta.rpt	2012-10-12 05:29	423K
	ds18b20_seg7.sof	2012-10-12 05:29	485K
	ds18b20_seg7.pof	2012-10-12 05:29	512K
	output_file.jic	2012-10-12 05:29	512K