Index of /pub/projects/OpenEPC3C16/verilog/VGA

	Name	Last modified	Size	Description
	Parent Directory		-
	PLLJ_PLLSPE_INFO.txt	2012-10-12 05:30	135
	altpla.ppf	2012-10-12 05:30	355
	altpla.qip	2012-10-12 05:30	274
	altpla.v	2012-10-12 05:30	14K
	altpll.qip	2012-10-12 05:30	0
	clkdiv.v	2012-10-12 05:30	239
	db/	2014-07-21 05:45	-
	greybox_tmp/	2014-07-21 05:45	-
	incremental_db/	2014-07-21 05:45	-
	output_file.jic	2012-10-12 05:30	2.0M
	output_file.map	2012-10-12 05:30	189
	qmegawiz_errors_log.txt	2012-10-12 05:30	230
	simulation/	2014-07-21 05:45	-
	vga_pll.ppf	2012-10-12 05:30	356
	vga_pll.qip	2012-10-12 05:30	452
	vga_pll.v	2012-10-12 05:30	14K
	vga_pll_bb.v	2012-10-12 05:30	11K
	vga_pll_inst.v	2012-10-12 05:30	72
	vga_red.asm.rpt	2012-10-12 05:30	6.8K
	vga_red.done	2012-10-12 05:30	26
	vga_red.dpf	2012-10-12 05:30	239
	vga_red.eda.rpt	2012-10-12 05:30	8.4K
	vga_red.fit.rpt	2012-10-12 05:30	149K
	vga_red.fit.smsg	2012-10-12 05:30	513
	vga_red.fit.summary	2012-10-12 05:30	605
	vga_red.flow.rpt	2012-10-12 05:30	13K
	vga_red.map.rpt	2012-10-12 05:30	66K
	vga_red.map.summary	2012-10-12 05:30	457
	vga_red.pin	2012-10-12 05:30	30K
	vga_red.qpf	2012-10-12 05:30	1.2K
	vga_red.qsf	2012-10-12 05:30	4.9K
	vga_red.sof	2012-10-12 05:30	485K
	vga_red.sta.rpt	2012-10-12 05:30	260K
	vga_red.sta.summary	2012-10-12 05:30	1.6K
	vga_red.v	2012-10-12 05:30	1.3K
	vga_red.v.bak	2012-10-12 05:30	32
	vga_red_assignment_defaults.qdf	2012-10-12 05:30	47K
	vga_red_nativelink_simulation.rpt	2012-10-12 05:30	1.0K