Fitter report for USB_LED
Fri May 04 14:09:32 2012
Quartus II Version 11.0 Build 157 04/27/2011 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Fitter Summary
  3. Fitter Settings
  4. Parallel Compilation
  5. I/O Assignment Warnings
  6. Incremental Compilation Preservation Summary
  7. Incremental Compilation Partition Settings
  8. Incremental Compilation Placement Preservation
  9. Pin-Out File
 10. Fitter Resource Usage Summary
 11. Fitter Partition Statistics
 12. Input Pins
 13. Output Pins
 14. Bidir Pins
 15. Dual Purpose and Dedicated Pins
 16. I/O Bank Usage
 17. All Package Pins
 18. Output Pin Default Load For Reported TCO
 19. Fitter Resource Utilization by Entity
 20. Delay Chain Summary
 21. Pad To Core Delay Chain Fanout
 22. Control Signals
 23. Global & Other Fast Signals
 24. Non-Global High Fan-Out Signals
 25. Fitter RAM Summary
 26. Interconnect Usage Summary
 27. LAB Logic Elements
 28. LAB-wide Signals
 29. LAB Signals Sourced
 30. LAB Signals Sourced Out
 31. LAB Distinct Inputs
 32. I/O Rules Summary
 33. I/O Rules Details
 34. I/O Rules Matrix
 35. Fitter Device Options
 36. Operating Settings and Conditions
 37. Fitter Messages
 38. Fitter Suppressed Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2011 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+--------------------------------------------------------------------------------+
; Fitter Summary                                                                 ;
+------------------------------------+-------------------------------------------+
; Fitter Status                      ; Successful - Fri May 04 14:09:32 2012     ;
; Quartus II Version                 ; 11.0 Build 157 04/27/2011 SJ Full Version ;
; Revision Name                      ; USB_LED                                   ;
; Top-level Entity Name              ; USB_LED                                   ;
; Family                             ; Cyclone III                               ;
; Device                             ; EP3C16Q240C8                              ;
; Timing Models                      ; Final                                     ;
; Total logic elements               ; 613 / 15,408 ( 4 % )                      ;
;     Total combinational functions  ; 425 / 15,408 ( 3 % )                      ;
;     Dedicated logic registers      ; 489 / 15,408 ( 3 % )                      ;
; Total registers                    ; 489                                       ;
; Total pins                         ; 30 / 161 ( 19 % )                         ;
; Total virtual pins                 ; 0                                         ;
; Total memory bits                  ; 16,384 / 516,096 ( 3 % )                  ;
; Embedded Multiplier 9-bit elements ; 0 / 112 ( 0 % )                           ;
; Total PLLs                         ; 0 / 4 ( 0 % )                             ;
+------------------------------------+-------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Settings                                                                                                                                            ;
+----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+
; Option                                                                     ; Setting                               ; Default Value                         ;
+----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+
; Device                                                                     ; EP3C16Q240C8                          ;                                       ;
; Minimum Core Junction Temperature                                          ; 0                                     ;                                       ;
; Maximum Core Junction Temperature                                          ; 85                                    ;                                       ;
; Fit Attempts to Skip                                                       ; 0                                     ; 0.0                                   ;
; Device I/O Standard                                                        ; 3.3-V LVTTL                           ;                                       ;
; Use smart compilation                                                      ; Off                                   ; Off                                   ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On                                    ; On                                    ;
; Enable compact report table                                                ; Off                                   ; Off                                   ;
; Use TimeQuest Timing Analyzer                                              ; On                                    ; On                                    ;
; Auto Merge PLLs                                                            ; On                                    ; On                                    ;
; Router Timing Optimization Level                                           ; Normal                                ; Normal                                ;
; Perform Clocking Topology Analysis During Routing                          ; Off                                   ; Off                                   ;
; Placement Effort Multiplier                                                ; 1.0                                   ; 1.0                                   ;
; Router Effort Multiplier                                                   ; 1.0                                   ; 1.0                                   ;
; Optimize Hold Timing                                                       ; All Paths                             ; All Paths                             ;
; Optimize Multi-Corner Timing                                               ; Off                                   ; Off                                   ;
; PowerPlay Power Optimization                                               ; Normal compilation                    ; Normal compilation                    ;
; SSN Optimization                                                           ; Off                                   ; Off                                   ;
; Optimize Timing                                                            ; Normal compilation                    ; Normal compilation                    ;
; Optimize Timing for ECOs                                                   ; Off                                   ; Off                                   ;
; Regenerate full fit report during ECO compiles                             ; Off                                   ; Off                                   ;
; Optimize IOC Register Placement for Timing                                 ; Normal                                ; Normal                                ;
; Limit to One Fitting Attempt                                               ; Off                                   ; Off                                   ;
; Final Placement Optimizations                                              ; Automatically                         ; Automatically                         ;
; Fitter Aggressive Routability Optimizations                                ; Automatically                         ; Automatically                         ;
; Fitter Initial Placement Seed                                              ; 1                                     ; 1                                     ;
; PCI I/O                                                                    ; Off                                   ; Off                                   ;
; Weak Pull-Up Resistor                                                      ; Off                                   ; Off                                   ;
; Enable Bus-Hold Circuitry                                                  ; Off                                   ; Off                                   ;
; Auto Packed Registers                                                      ; Auto                                  ; Auto                                  ;
; Auto Delay Chains                                                          ; On                                    ; On                                    ;
; Allow Single-ended Buffer for Differential-XSTL Input                      ; Off                                   ; Off                                   ;
; Treat Bidirectional Pin as Output Pin                                      ; Off                                   ; Off                                   ;
; Perform Physical Synthesis for Combinational Logic for Fitting             ; Off                                   ; Off                                   ;
; Perform Physical Synthesis for Combinational Logic for Performance         ; Off                                   ; Off                                   ;
; Perform Register Duplication for Performance                               ; Off                                   ; Off                                   ;
; Perform Logic to Memory Mapping for Fitting                                ; Off                                   ; Off                                   ;
; Perform Register Retiming for Performance                                  ; Off                                   ; Off                                   ;
; Perform Asynchronous Signal Pipelining                                     ; Off                                   ; Off                                   ;
; Fitter Effort                                                              ; Auto Fit                              ; Auto Fit                              ;
; Physical Synthesis Effort Level                                            ; Normal                                ; Normal                                ;
; Logic Cell Insertion - Logic Duplication                                   ; Auto                                  ; Auto                                  ;
; Auto Register Duplication                                                  ; Auto                                  ; Auto                                  ;
; Auto Global Clock                                                          ; On                                    ; On                                    ;
; Auto Global Register Control Signals                                       ; On                                    ; On                                    ;
; Reserve all unused pins                                                    ; As input tri-stated with weak pull-up ; As input tri-stated with weak pull-up ;
; Synchronizer Identification                                                ; Off                                   ; Off                                   ;
; Enable Beneficial Skew Optimization                                        ; On                                    ; On                                    ;
; Optimize Design for Metastability                                          ; On                                    ; On                                    ;
; Force Fitter to Avoid Periphery Placement Warnings                         ; Off                                   ; Off                                   ;
; RAM Bit Reservation (Cyclone III)                                          ; Off                                   ; Off                                   ;
; Enable input tri-state on active configuration pins in user mode           ; Off                                   ; Off                                   ;
+----------------------------------------------------------------------------+---------------------------------------+---------------------------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 2           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.33        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     1 processor            ; 100.0%      ;
;     2 processors           ;  20.0%      ;
+----------------------------+-------------+


+---------------------------------------+
; I/O Assignment Warnings               ;
+--------------+------------------------+
; Pin Name     ; Reason                 ;
+--------------+------------------------+
; SLOE         ; Missing drive strength ;
; SLRD         ; Missing drive strength ;
; FIFOADR[0]   ; Missing drive strength ;
; FIFOADR[1]   ; Missing drive strength ;
; SLWR         ; Missing drive strength ;
; led[0]       ; Missing drive strength ;
; led[1]       ; Missing drive strength ;
; led[2]       ; Missing drive strength ;
; led[3]       ; Missing drive strength ;
; FIFODATA[4]  ; Missing drive strength ;
; FIFODATA[5]  ; Missing drive strength ;
; FIFODATA[6]  ; Missing drive strength ;
; FIFODATA[7]  ; Missing drive strength ;
; FIFODATA[8]  ; Missing drive strength ;
; FIFODATA[9]  ; Missing drive strength ;
; FIFODATA[10] ; Missing drive strength ;
; FIFODATA[11] ; Missing drive strength ;
; FIFODATA[12] ; Missing drive strength ;
; FIFODATA[13] ; Missing drive strength ;
; FIFODATA[14] ; Missing drive strength ;
; FIFODATA[15] ; Missing drive strength ;
; FIFODATA[0]  ; Missing drive strength ;
; FIFODATA[1]  ; Missing drive strength ;
; FIFODATA[2]  ; Missing drive strength ;
; FIFODATA[3]  ; Missing drive strength ;
+--------------+------------------------+


+----------------------------------------------+
; Incremental Compilation Preservation Summary ;
+---------------------+------------------------+
; Type                ; Value                  ;
+---------------------+------------------------+
; Placement (by node) ;                        ;
;     -- Requested    ; 0 / 1013 ( 0.00 % )    ;
;     -- Achieved     ; 0 / 1013 ( 0.00 % )    ;
;                     ;                        ;
; Routing (by net)    ;                        ;
;     -- Requested    ; 0 / 0 ( 0.00 % )       ;
;     -- Achieved     ; 0 / 0 ( 0.00 % )       ;
+---------------------+------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Incremental Compilation Partition Settings                                                                                                                                             ;
+--------------------------------+----------------+-------------------+-------------------------+------------------------+------------------------------+--------------------------------+
; Partition Name                 ; Partition Type ; Netlist Type Used ; Preservation Level Used ; Netlist Type Requested ; Preservation Level Requested ; Contents                       ;
+--------------------------------+----------------+-------------------+-------------------------+------------------------+------------------------------+--------------------------------+
; Top                            ; User-created   ; Source File       ; N/A                     ; Source File            ; N/A                          ;                                ;
; sld_hub:auto_hub               ; Auto-generated ; Post-Synthesis    ; N/A                     ; Post-Synthesis         ; N/A                          ; sld_hub:auto_hub               ;
; sld_signaltap:auto_signaltap_0 ; Auto-generated ; Post-Synthesis    ; N/A                     ; Post-Synthesis         ; N/A                          ; sld_signaltap:auto_signaltap_0 ;
; hard_block:auto_generated_inst ; Auto-generated ; Source File       ; N/A                     ; Source File            ; N/A                          ; hard_block:auto_generated_inst ;
+--------------------------------+----------------+-------------------+-------------------------+------------------------+------------------------------+--------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Incremental Compilation Placement Preservation                                                             ;
+--------------------------------+---------+-------------------+-------------------------+-------------------+
; Partition Name                 ; # Nodes ; # Preserved Nodes ; Preservation Level Used ; Netlist Type Used ;
+--------------------------------+---------+-------------------+-------------------------+-------------------+
; Top                            ; 170     ; 0                 ; N/A                     ; Source File       ;
; sld_hub:auto_hub               ; 178     ; 0                 ; N/A                     ; Post-Synthesis    ;
; sld_signaltap:auto_signaltap_0 ; 663     ; 0                 ; N/A                     ; Post-Synthesis    ;
; hard_block:auto_generated_inst ; 2       ; 0                 ; N/A                     ; Source File       ;
+--------------------------------+---------+-------------------+-------------------------+-------------------+


+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in E:/Program/EP3C16/vhdl/USB_LED/FPGA_A/USB_LED.pin.


+---------------------------------------------------------------------------------------------------+
; Fitter Resource Usage Summary                                                                     ;
+---------------------------------------------+-----------------------------------------------------+
; Resource                                    ; Usage                                               ;
+---------------------------------------------+-----------------------------------------------------+
; Total logic elements                        ; 613 / 15,408 ( 4 % )                                ;
;     -- Combinational with no register       ; 124                                                 ;
;     -- Register only                        ; 188                                                 ;
;     -- Combinational with a register        ; 301                                                 ;
;                                             ;                                                     ;
; Logic element usage by number of LUT inputs ;                                                     ;
;     -- 4 input functions                    ; 170                                                 ;
;     -- 3 input functions                    ; 121                                                 ;
;     -- <=2 input functions                  ; 134                                                 ;
;     -- Register only                        ; 188                                                 ;
;                                             ;                                                     ;
; Logic elements by mode                      ;                                                     ;
;     -- normal mode                          ; 350                                                 ;
;     -- arithmetic mode                      ; 75                                                  ;
;                                             ;                                                     ;
; Total registers*                            ; 489 / 16,138 ( 3 % )                                ;
;     -- Dedicated logic registers            ; 489 / 15,408 ( 3 % )                                ;
;     -- I/O registers                        ; 0 / 730 ( 0 % )                                     ;
;                                             ;                                                     ;
; Total LABs:  partially or completely used   ; 55 / 963 ( 6 % )                                    ;
; User inserted logic elements                ; 0                                                   ;
; Virtual pins                                ; 0                                                   ;
; I/O pins                                    ; 30 / 161 ( 19 % )                                   ;
;     -- Clock pins                           ; 1 / 8 ( 13 % )                                      ;
;     -- Dedicated input pins                 ; 3 / 9 ( 33 % )                                      ;
; Global signals                              ; 5                                                   ;
; M9Ks                                        ; 2 / 56 ( 4 % )                                      ;
; Total block memory bits                     ; 16,384 / 516,096 ( 3 % )                            ;
; Total block memory implementation bits      ; 18,432 / 516,096 ( 4 % )                            ;
; Embedded Multiplier 9-bit elements          ; 0 / 112 ( 0 % )                                     ;
; PLLs                                        ; 0 / 4 ( 0 % )                                       ;
; Global clocks                               ; 5 / 20 ( 25 % )                                     ;
; JTAGs                                       ; 1 / 1 ( 100 % )                                     ;
; CRC blocks                                  ; 0 / 1 ( 0 % )                                       ;
; ASMI blocks                                 ; 0 / 1 ( 0 % )                                       ;
; Impedance control blocks                    ; 0 / 4 ( 0 % )                                       ;
; Average interconnect usage (total/H/V)      ; 1% / 0% / 1%                                        ;
; Peak interconnect usage (total/H/V)         ; 5% / 5% / 5%                                        ;
; Maximum fan-out node                        ; altera_internal_jtag~TCKUTAPclkctrl                 ;
; Maximum fan-out                             ; 249                                                 ;
; Highest non-global fan-out signal           ; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[4] ;
; Highest non-global fan-out                  ; 51                                                  ;
; Total fan-out                               ; 3079                                                ;
; Average fan-out                             ; 2.71                                                ;
+---------------------------------------------+-----------------------------------------------------+
*  Register count does not include registers inside RAM blocks or DSP blocks.



+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Partition Statistics                                                                                                                                  ;
+---------------------------------------------+----------------------+-----------------------+--------------------------------+--------------------------------+
; Statistic                                   ; Top                  ; sld_hub:auto_hub      ; sld_signaltap:auto_signaltap_0 ; hard_block:auto_generated_inst ;
+---------------------------------------------+----------------------+-----------------------+--------------------------------+--------------------------------+
; Difficulty Clustering Region                ; Low                  ; Low                   ; Low                            ; Low                            ;
;                                             ;                      ;                       ;                                ;                                ;
; Total logic elements                        ; 47 / 15408 ( < 1 % ) ; 113 / 15408 ( < 1 % ) ; 453 / 15408 ( 2 % )            ; 0 / 15408 ( 0 % )              ;
;     -- Combinational with no register       ; 13                   ; 40                    ; 71                             ; 0                              ;
;     -- Register only                        ; 1                    ; 8                     ; 179                            ; 0                              ;
;     -- Combinational with a register        ; 33                   ; 65                    ; 203                            ; 0                              ;
;                                             ;                      ;                       ;                                ;                                ;
; Logic element usage by number of LUT inputs ;                      ;                       ;                                ;                                ;
;     -- 4 input functions                    ; 9                    ; 42                    ; 119                            ; 0                              ;
;     -- 3 input functions                    ; 8                    ; 41                    ; 72                             ; 0                              ;
;     -- <=2 input functions                  ; 29                   ; 22                    ; 83                             ; 0                              ;
;     -- Register only                        ; 1                    ; 8                     ; 179                            ; 0                              ;
;                                             ;                      ;                       ;                                ;                                ;
; Logic elements by mode                      ;                      ;                       ;                                ;                                ;
;     -- normal mode                          ; 24                   ; 101                   ; 225                            ; 0                              ;
;     -- arithmetic mode                      ; 22                   ; 4                     ; 49                             ; 0                              ;
;                                             ;                      ;                       ;                                ;                                ;
; Total registers                             ; 34                   ; 73                    ; 382                            ; 0                              ;
;     -- Dedicated logic registers            ; 34 / 15408 ( < 1 % ) ; 73 / 15408 ( < 1 % )  ; 382 / 15408 ( 2 % )            ; 0 / 15408 ( 0 % )              ;
;     -- I/O registers                        ; 0                    ; 0                     ; 0                              ; 0                              ;
;                                             ;                      ;                       ;                                ;                                ;
; Total LABs:  partially or completely used   ; 6 / 963 ( < 1 % )    ; 12 / 963 ( 1 % )      ; 39 / 963 ( 4 % )               ; 0 / 963 ( 0 % )                ;
;                                             ;                      ;                       ;                                ;                                ;
; Virtual pins                                ; 0                    ; 0                     ; 0                              ; 0                              ;
; I/O pins                                    ; 30                   ; 0                     ; 0                              ; 0                              ;
; Embedded Multiplier 9-bit elements          ; 0 / 112 ( 0 % )      ; 0 / 112 ( 0 % )       ; 0 / 112 ( 0 % )                ; 0 / 112 ( 0 % )                ;
; Total memory bits                           ; 0                    ; 0                     ; 16384                          ; 0                              ;
; Total RAM block bits                        ; 0                    ; 0                     ; 18432                          ; 0                              ;
; JTAG                                        ; 1 / 1 ( 100 % )      ; 0 / 1 ( 0 % )         ; 0 / 1 ( 0 % )                  ; 0 / 1 ( 0 % )                  ;
; M9K                                         ; 0 / 56 ( 0 % )       ; 0 / 56 ( 0 % )        ; 2 / 56 ( 3 % )                 ; 0 / 56 ( 0 % )                 ;
; Clock control block                         ; 4 / 24 ( 16 % )      ; 0 / 24 ( 0 % )        ; 1 / 24 ( 4 % )                 ; 0 / 24 ( 0 % )                 ;
;                                             ;                      ;                       ;                                ;                                ;
; Connections                                 ;                      ;                       ;                                ;                                ;
;     -- Input Connections                    ; 17                   ; 111                   ; 515                            ; 0                              ;
;     -- Registered Input Connections         ; 0                    ; 82                    ; 413                            ; 0                              ;
;     -- Output Connections                   ; 524                  ; 118                   ; 1                              ; 0                              ;
;     -- Registered Output Connections        ; 0                    ; 117                   ; 0                              ; 0                              ;
;                                             ;                      ;                       ;                                ;                                ;
; Internal Connections                        ;                      ;                       ;                                ;                                ;
;     -- Total Connections                    ; 786                  ; 693                   ; 2221                           ; 1                              ;
;     -- Registered Connections               ; 61                   ; 508                   ; 1080                           ; 0                              ;
;                                             ;                      ;                       ;                                ;                                ;
; External Connections                        ;                      ;                       ;                                ;                                ;
;     -- Top                                  ; 32                   ; 103                   ; 406                            ; 0                              ;
;     -- sld_hub:auto_hub                     ; 103                  ; 16                    ; 110                            ; 0                              ;
;     -- sld_signaltap:auto_signaltap_0       ; 406                  ; 110                   ; 0                              ; 0                              ;
;     -- hard_block:auto_generated_inst       ; 0                    ; 0                     ; 0                              ; 0                              ;
;                                             ;                      ;                       ;                                ;                                ;
; Partition Interface                         ;                      ;                       ;                                ;                                ;
;     -- Input Ports                          ; 8                    ; 18                    ; 73                             ; 0                              ;
;     -- Output Ports                         ; 10                   ; 36                    ; 26                             ; 0                              ;
;     -- Bidir Ports                          ; 16                   ; 0                     ; 0                              ; 0                              ;
;                                             ;                      ;                       ;                                ;                                ;
; Registered Ports                            ;                      ;                       ;                                ;                                ;
;     -- Registered Input Ports               ; 0                    ; 4                     ; 11                             ; 0                              ;
;     -- Registered Output Ports              ; 0                    ; 26                    ; 1                              ; 0                              ;
;                                             ;                      ;                       ;                                ;                                ;
; Port Connectivity                           ;                      ;                       ;                                ;                                ;
;     -- Input Ports driven by GND            ; 0                    ; 1                     ; 4                              ; 0                              ;
;     -- Output Ports driven by GND           ; 0                    ; 0                     ; 0                              ; 0                              ;
;     -- Input Ports driven by VCC            ; 0                    ; 0                     ; 0                              ; 0                              ;
;     -- Output Ports driven by VCC           ; 0                    ; 0                     ; 0                              ; 0                              ;
;     -- Input Ports with no Source           ; 0                    ; 0                     ; 35                             ; 0                              ;
;     -- Output Ports with no Source          ; 0                    ; 0                     ; 0                              ; 0                              ;
;     -- Input Ports with no Fanout           ; 0                    ; 1                     ; 40                             ; 0                              ;
;     -- Output Ports with no Fanout          ; 0                    ; 14                    ; 17                             ; 0                              ;
+---------------------------------------------+----------------------+-----------------------+--------------------------------+--------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Input Pins                                                                                                                                                                                                                                                                 ;
+-------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+---------------------------+----------------------+
; Name  ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; Power Up High ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination Control Block ; Location assigned by ;
+-------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+---------------------------+----------------------+
; FLAGA ; 185   ; 7        ; 35           ; 29           ; 0            ; 3                     ; 0                  ; no     ; no             ; no            ; yes             ; no       ; Off          ; 3.3-V LVTTL  ; --                        ; User                 ;
; FLAGB ; 196   ; 7        ; 28           ; 29           ; 14           ; 2                     ; 0                  ; no     ; no             ; no            ; yes             ; no       ; Off          ; 3.3-V LVTTL  ; --                        ; User                 ;
; FLAGC ; 197   ; 7        ; 28           ; 29           ; 21           ; 2                     ; 0                  ; no     ; no             ; no            ; yes             ; no       ; Off          ; 3.3-V LVTTL  ; --                        ; User                 ;
; clk   ; 31    ; 1        ; 0            ; 14           ; 0            ; 240                   ; 0                  ; yes    ; no             ; no            ; yes             ; no       ; Off          ; 3.3-V LVTTL  ; --                        ; User                 ;
; rst   ; 6     ; 1        ; 0            ; 27           ; 14           ; 34                    ; 0                  ; no     ; no             ; no            ; yes             ; no       ; Off          ; 3.3-V LVTTL  ; --                        ; User                 ;
+-------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+---------------------------+----------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Pins                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+---------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+---------------------------+----------------------------+-----------------------------+----------------------+------+----------------------+---------------------+
; Name       ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Output Register ; Output Enable Register ; Power Up High ; Slew Rate ; PCI I/O Enabled ; Open Drain ; TRI Primitive ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Termination ; Termination Control Block ; Output Buffer Pre-emphasis ; Voltage Output Differential ; Location assigned by ; Load ; Output Enable Source ; Output Enable Group ;
+------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+---------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+---------------------------+----------------------------+-----------------------------+----------------------+------+----------------------+---------------------+
; FIFOADR[0] ; 189   ; 7        ; 32           ; 29           ; 14           ; no              ; no                     ; no            ; 2         ; no              ; no         ; no            ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off         ; --                        ; no                         ; no                          ; User                 ; 0 pF ; -                    ; -                   ;
; FIFOADR[1] ; 194   ; 7        ; 30           ; 29           ; 21           ; no              ; no                     ; no            ; 2         ; no              ; no         ; no            ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off         ; --                        ; no                         ; no                          ; User                 ; 0 pF ; -                    ; -                   ;
; SLOE       ; 186   ; 7        ; 35           ; 29           ; 7            ; no              ; no                     ; no            ; 2         ; no              ; no         ; no            ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off         ; --                        ; no                         ; no                          ; User                 ; 0 pF ; -                    ; -                   ;
; SLRD       ; 188   ; 7        ; 32           ; 29           ; 7            ; no              ; no                     ; no            ; 2         ; no              ; no         ; no            ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off         ; --                        ; no                         ; no                          ; User                 ; 0 pF ; -                    ; -                   ;
; SLWR       ; 187   ; 7        ; 32           ; 29           ; 0            ; no              ; no                     ; no            ; 2         ; no              ; no         ; no            ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off         ; --                        ; no                         ; no                          ; User                 ; 0 pF ; -                    ; -                   ;
; led[0]     ; 93    ; 4        ; 23           ; 0            ; 28           ; no              ; no                     ; no            ; 2         ; no              ; no         ; no            ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off         ; --                        ; no                         ; no                          ; User                 ; 0 pF ; -                    ; -                   ;
; led[1]     ; 98    ; 4        ; 26           ; 0            ; 28           ; no              ; no                     ; no            ; 2         ; no              ; no         ; no            ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off         ; --                        ; no                         ; no                          ; User                 ; 0 pF ; -                    ; -                   ;
; led[2]     ; 100   ; 4        ; 26           ; 0            ; 14           ; no              ; no                     ; no            ; 2         ; no              ; no         ; no            ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off         ; --                        ; no                         ; no                          ; User                 ; 0 pF ; -                    ; -                   ;
; led[3]     ; 106   ; 4        ; 30           ; 0            ; 21           ; no              ; no                     ; no            ; 2         ; no              ; no         ; no            ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off         ; --                        ; no                         ; no                          ; User                 ; 0 pF ; -                    ; -                   ;
+------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+---------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+---------------------------+----------------------------+-----------------------------+----------------------+------+----------------------+---------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Bidir Pins                                                                                                                                                                                                                                                                                                                                                                                                                                        ;
+--------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+-----------+-----------------+------------+----------+--------------+--------------+------------------+--------------------+---------------------------+----------------------+------+----------------------+---------------------+
; Name         ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; Output Register ; Output Enable Register ; Power Up High ; Slew Rate ; PCI I/O Enabled ; Open Drain ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Output Termination ; Termination Control Block ; Location assigned by ; Load ; Output Enable Source ; Output Enable Group ;
+--------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+-----------+-----------------+------------+----------+--------------+--------------+------------------+--------------------+---------------------------+----------------------+------+----------------------+---------------------+
; FIFODATA[0]  ; 200   ; 7        ; 26           ; 29           ; 14           ; 1                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[10] ; 226   ; 8        ; 7            ; 29           ; 7            ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[11] ; 231   ; 8        ; 7            ; 29           ; 28           ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[12] ; 232   ; 8        ; 5            ; 29           ; 0            ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[13] ; 236   ; 8        ; 1            ; 29           ; 0            ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[14] ; 239   ; 8        ; 1            ; 29           ; 21           ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[15] ; 240   ; 8        ; 1            ; 29           ; 28           ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[1]  ; 201   ; 7        ; 26           ; 29           ; 28           ; 1                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[2]  ; 202   ; 7        ; 23           ; 29           ; 0            ; 1                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[3]  ; 207   ; 7        ; 21           ; 29           ; 7            ; 1                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[4]  ; 214   ; 8        ; 14           ; 29           ; 0            ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[5]  ; 217   ; 8        ; 14           ; 29           ; 14           ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[6]  ; 218   ; 8        ; 14           ; 29           ; 21           ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[7]  ; 219   ; 8        ; 14           ; 29           ; 28           ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[8]  ; 221   ; 8        ; 11           ; 29           ; 7            ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
; FIFODATA[9]  ; 224   ; 8        ; 9            ; 29           ; 0            ; 0                     ; 0                  ; no     ; no             ; no              ; no                     ; no            ; 2         ; yes             ; yes        ; no       ; Off          ; 3.3-V LVTTL  ; 8mA              ; Off                ; --                        ; User                 ; 0 pF ; -                    ; -                   ;
+--------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+------------------------+---------------+-----------+-----------------+------------+----------+--------------+--------------+------------------+--------------------+---------------------------+----------------------+------+----------------------+---------------------+


+---------------------------------------------------------------------------------------------------------------------------------+
; Dual Purpose and Dedicated Pins                                                                                                 ;
+----------+------------------------------------------+---------------------+-------------------------+---------------------------+
; Location ; Pin Name                                 ; Reserved As         ; User Signal Name        ; Pin Type                  ;
+----------+------------------------------------------+---------------------+-------------------------+---------------------------+
; 14       ; DIFFIO_L6p, FLASH_nCE, nCSO              ; As input tri-stated ; ~ALTERA_FLASH_nCE_nCSO~ ; Dual Purpose Pin          ;
; 17       ; nSTATUS                                  ; -                   ; -                       ; Dedicated Programming Pin ;
; 25       ; nCONFIG                                  ; -                   ; -                       ; Dedicated Programming Pin ;
; 26       ; TDI                                      ; -                   ; altera_reserved_tdi     ; JTAG Pin                  ;
; 27       ; TCK                                      ; -                   ; altera_reserved_tck     ; JTAG Pin                  ;
; 28       ; TMS                                      ; -                   ; altera_reserved_tms     ; JTAG Pin                  ;
; 29       ; TDO                                      ; -                   ; altera_reserved_tdo     ; JTAG Pin                  ;
; 30       ; nCE                                      ; -                   ; -                       ; Dedicated Programming Pin ;
; 153      ; CONF_DONE                                ; -                   ; -                       ; Dedicated Programming Pin ;
; 155      ; MSEL0                                    ; -                   ; -                       ; Dedicated Programming Pin ;
; 157      ; MSEL1                                    ; -                   ; -                       ; Dedicated Programming Pin ;
; 158      ; MSEL2                                    ; -                   ; -                       ; Dedicated Programming Pin ;
; 158      ; MSEL3                                    ; -                   ; -                       ; Dedicated Programming Pin ;
; 194      ; DIFFIO_T25p, PADD2                       ; As input tri-stated ; FIFOADR[1]              ; Dual Purpose Pin          ;
; 196      ; DIFFIO_T23n, PADD3                       ; As input tri-stated ; FLAGB                   ; Dual Purpose Pin          ;
; 200      ; DIFFIO_T21p, PADD4, DQS2T/CQ3T,DPCLK8    ; As input tri-stated ; FIFODATA[0]             ; Dual Purpose Pin          ;
; 201      ; DIFFIO_T20p, PADD6                       ; As input tri-stated ; FIFODATA[1]             ; Dual Purpose Pin          ;
; 202      ; DIFFIO_T19n, PADD7                       ; As input tri-stated ; FIFODATA[2]             ; Dual Purpose Pin          ;
; 207      ; DIFFIO_T17p, PADD12, DQS4T/CQ5T,DPCLK9   ; As input tri-stated ; FIFODATA[3]             ; Dual Purpose Pin          ;
; 214      ; DIFFIO_T13p, PADD17, DQS5T/CQ5T#,DPCLK10 ; As input tri-stated ; FIFODATA[4]             ; Dual Purpose Pin          ;
; 218      ; DIFFIO_T12n, DATA2                       ; Use as regular IO   ; FIFODATA[6]             ; Dual Purpose Pin          ;
; 219      ; DIFFIO_T12p, DATA3                       ; Use as regular IO   ; FIFODATA[7]             ; Dual Purpose Pin          ;
; 221      ; DIFFIO_T11p, DATA4                       ; Use as regular IO   ; FIFODATA[8]             ; Dual Purpose Pin          ;
; 224      ; DIFFIO_T9n, DATA14, DQS3T/CQ3T#,DPCLK11  ; As input tri-stated ; FIFODATA[9]             ; Dual Purpose Pin          ;
; 226      ; DATA5                                    ; Use as regular IO   ; FIFODATA[10]            ; Dual Purpose Pin          ;
; 231      ; DIFFIO_T6p, DATA6                        ; Use as regular IO   ; FIFODATA[11]            ; Dual Purpose Pin          ;
; 232      ; DATA7                                    ; Use as regular IO   ; FIFODATA[12]            ; Dual Purpose Pin          ;
; 236      ; DIFFIO_T2p, DATA12, DQS1T/CQ1T#,CDPCLK7  ; As input tri-stated ; FIFODATA[13]            ; Dual Purpose Pin          ;
+----------+------------------------------------------+---------------------+-------------------------+---------------------------+


+------------------------------------------------------------+
; I/O Bank Usage                                             ;
+----------+------------------+---------------+--------------+
; I/O Bank ; Usage            ; VCCIO Voltage ; VREF Voltage ;
+----------+------------------+---------------+--------------+
; 1        ; 3 / 16 ( 19 % )  ; 3.3V          ; --           ;
; 2        ; 0 / 17 ( 0 % )   ; 3.3V          ; --           ;
; 3        ; 0 / 22 ( 0 % )   ; 3.3V          ; --           ;
; 4        ; 4 / 24 ( 17 % )  ; 3.3V          ; --           ;
; 5        ; 0 / 19 ( 0 % )   ; 3.3V          ; --           ;
; 6        ; 0 / 17 ( 0 % )   ; 3.3V          ; --           ;
; 7        ; 12 / 22 ( 55 % ) ; 3.3V          ; --           ;
; 8        ; 12 / 24 ( 50 % ) ; 3.3V          ; --           ;
+----------+------------------+---------------+--------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; All Package Pins                                                                                                                                                                        ;
+----------+------------+----------+-----------------------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+
; Location ; Pad Number ; I/O Bank ; Pin Name/Usage                                            ; Dir.   ; I/O Standard ; Voltage ; I/O Type   ; User Assignment ; Bus Hold ; Weak Pull Up ;
+----------+------------+----------+-----------------------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+
; 1        ;            ;          ; VCCD_PLL3                                                 ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 2        ;            ;          ; GNDA3                                                     ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 3        ;            ; --       ; VCCA3                                                     ; power  ;              ; 2.5V    ; --         ;                 ; --       ; --           ;
; 4        ; 0          ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 5        ; 1          ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 6        ; 2          ; 1        ; rst                                                       ; input  ; 3.3-V LVTTL  ;         ; Row I/O    ; Y               ; no       ; Off          ;
; 7        ;            ; 1        ; VCCIO1                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 8        ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 9        ; 6          ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 10       ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 11       ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 12       ; 9          ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 13       ; 10         ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 14       ; 13         ; 1        ; ~ALTERA_FLASH_nCE_nCSO~ / RESERVED_INPUT_WITH_WEAK_PULLUP ; input  ; 3.3-V LVTTL  ;         ; Row I/O    ; N               ; no       ; On           ;
; 15       ;            ; 1        ; VCCIO1                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 16       ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 17       ; 19         ; 1        ; ^nSTATUS                                                  ;        ;              ;         ; --         ;                 ; --       ; --           ;
; 18       ; 20         ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 19       ; 22         ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 20       ; 23         ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 21       ; 24         ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 22       ; 27         ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 23       ; 30         ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; --       ; On           ;
; 24       ; 31         ; 1        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 25       ; 32         ; 1        ; ^nCONFIG                                                  ;        ;              ;         ; --         ;                 ; --       ; --           ;
; 26       ; 33         ; 1        ; altera_reserved_tdi                                       ; input  ; 3.3-V LVTTL  ;         ; --         ; N               ; no       ; Off          ;
; 27       ; 34         ; 1        ; altera_reserved_tck                                       ; input  ; 3.3-V LVTTL  ;         ; --         ; N               ; no       ; Off          ;
; 28       ; 35         ; 1        ; altera_reserved_tms                                       ; input  ; 3.3-V LVTTL  ;         ; --         ; N               ; no       ; Off          ;
; 29       ; 36         ; 1        ; altera_reserved_tdo                                       ; output ; 3.3-V LVTTL  ;         ; --         ; N               ; no       ; Off          ;
; 30       ; 37         ; 1        ; ^nCE                                                      ;        ;              ;         ; --         ;                 ; --       ; --           ;
; 31       ; 38         ; 1        ; clk                                                       ; input  ; 3.3-V LVTTL  ;         ; Row I/O    ; Y               ; no       ; Off          ;
; 32       ; 39         ; 1        ; GND+                                                      ;        ;              ;         ; Row I/O    ;                 ; --       ; --           ;
; 33       ; 40         ; 2        ; GND+                                                      ;        ;              ;         ; Row I/O    ;                 ; --       ; --           ;
; 34       ; 41         ; 2        ; GND+                                                      ;        ;              ;         ; Row I/O    ;                 ; --       ; --           ;
; 35       ;            ; 2        ; VCCIO2                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 36       ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 37       ; 49         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 38       ; 50         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 39       ; 51         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 40       ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 41       ; 54         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 42       ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 43       ; 55         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 44       ; 57         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 45       ; 58         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 46       ; 72         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 47       ;            ; 2        ; VCCIO2                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 48       ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 49       ; 75         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 50       ; 76         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 51       ; 77         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 52       ; 78         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 53       ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 54       ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 55       ; 81         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 56       ; 82         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 57       ; 83         ; 2        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 58       ;            ; --       ; VCCA1                                                     ; power  ;              ; 2.5V    ; --         ;                 ; --       ; --           ;
; 59       ;            ;          ; GNDA1                                                     ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 60       ;            ;          ; VCCD_PLL1                                                 ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 61       ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 62       ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 63       ; 96         ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 64       ; 98         ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 65       ; 99         ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 66       ;            ; 3        ; VCCIO3                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 67       ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 68       ; 101        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 69       ; 102        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 70       ; 103        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 71       ; 104        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 72       ; 105        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 73       ; 106        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 74       ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 75       ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 76       ; 119        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 77       ;            ; 3        ; VCCIO3                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 78       ; 120        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 79       ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 80       ; 122        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 81       ; 123        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 82       ; 124        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 83       ; 127        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 84       ; 128        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 85       ; 129        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 86       ; 130        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 87       ; 131        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 88       ; 132        ; 3        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 89       ; 134        ; 3        ; GND+                                                      ;        ;              ;         ; Column I/O ;                 ; --       ; --           ;
; 90       ; 135        ; 3        ; GND+                                                      ;        ;              ;         ; Column I/O ;                 ; --       ; --           ;
; 91       ; 136        ; 4        ; GND+                                                      ;        ;              ;         ; Column I/O ;                 ; --       ; --           ;
; 92       ; 137        ; 4        ; GND+                                                      ;        ;              ;         ; Column I/O ;                 ; --       ; --           ;
; 93       ; 138        ; 4        ; led[0]                                                    ; output ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 94       ; 139        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 95       ; 141        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 96       ;            ; 4        ; VCCIO4                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 97       ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 98       ; 143        ; 4        ; led[1]                                                    ; output ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 99       ; 144        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 100      ; 145        ; 4        ; led[2]                                                    ; output ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 101      ; 146        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 102      ; 147        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 103      ; 148        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 104      ;            ; 4        ; VCCIO4                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 105      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 106      ; 154        ; 4        ; led[3]                                                    ; output ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 107      ; 155        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 108      ; 156        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 109      ; 157        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 110      ; 163        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 111      ; 164        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 112      ; 165        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 113      ; 167        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 114      ; 168        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 115      ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 116      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 117      ; 171        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 118      ; 172        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 119      ; 173        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 120      ; 174        ; 4        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 121      ;            ;          ; VCCD_PLL4                                                 ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 122      ;            ;          ; GNDA4                                                     ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 123      ;            ; --       ; VCCA4                                                     ; power  ;              ; 2.5V    ; --         ;                 ; --       ; --           ;
; 124      ;            ; 5        ; VCCIO5                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 125      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 126      ; 181        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 127      ; 182        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 128      ; 183        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 129      ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 130      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 131      ; 190        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 132      ; 191        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 133      ; 194        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 134      ; 202        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 135      ; 203        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 136      ;            ; 5        ; VCCIO5                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 137      ; 204        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 138      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 139      ; 208        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 140      ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 141      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 142      ; 214        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 143      ; 215        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 144      ; 216        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 145      ; 217        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 146      ; 220        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 147      ; 221        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 148      ; 222        ; 5        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 149      ; 223        ; 5        ; GND+                                                      ;        ;              ;         ; Row I/O    ;                 ; --       ; --           ;
; 150      ; 224        ; 5        ; GND+                                                      ;        ;              ;         ; Row I/O    ;                 ; --       ; --           ;
; 151      ; 225        ; 6        ; GND+                                                      ;        ;              ;         ; Row I/O    ;                 ; --       ; --           ;
; 152      ; 226        ; 6        ; GND+                                                      ;        ;              ;         ; Row I/O    ;                 ; --       ; --           ;
; 153      ; 227        ; 6        ; ^CONF_DONE                                                ;        ;              ;         ; --         ;                 ; --       ; --           ;
; 154      ;            ; 6        ; VCCIO6                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 155      ; 228        ; 6        ; ^MSEL0                                                    ;        ;              ;         ; --         ;                 ; --       ; --           ;
; 156      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 157      ; 229        ; 6        ; ^MSEL1                                                    ;        ;              ;         ; --         ;                 ; --       ; --           ;
; 158      ; 230        ; 6        ; ^MSEL2                                                    ;        ;              ;         ; --         ;                 ; --       ; --           ;
; 158      ; 231        ; 6        ; ^MSEL3                                                    ;        ;              ;         ; --         ;                 ; --       ; --           ;
; 159      ; 234        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 160      ; 235        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 161      ; 237        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 162      ; 239        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 163      ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 164      ; 240        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 165      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 166      ; 241        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 167      ; 255        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 168      ; 256        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 169      ; 257        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 170      ;            ; 6        ; VCCIO6                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 171      ; 260        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 172      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 173      ; 261        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 174      ; 262        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 175      ; 263        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 176      ; 270        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 177      ; 271        ; 6        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Row I/O    ;                 ; no       ; On           ;
; 178      ;            ; --       ; VCCA2                                                     ; power  ;              ; 2.5V    ; --         ;                 ; --       ; --           ;
; 179      ;            ;          ; GNDA2                                                     ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 180      ;            ;          ; VCCD_PLL2                                                 ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 181      ; 275        ; 7        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 182      ; 278        ; 7        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 183      ; 279        ; 7        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 184      ; 281        ; 7        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 185      ; 284        ; 7        ; FLAGA                                                     ; input  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 186      ; 285        ; 7        ; SLOE                                                      ; output ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 187      ; 289        ; 7        ; SLWR                                                      ; output ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 188      ; 290        ; 7        ; SLRD                                                      ; output ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 189      ; 291        ; 7        ; FIFOADR[0]                                                ; output ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 190      ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 191      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 192      ;            ; 7        ; VCCIO7                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 193      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 194      ; 297        ; 7        ; FIFOADR[1]                                                ; output ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 195      ; 300        ; 7        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 196      ; 301        ; 7        ; FLAGB                                                     ; input  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 197      ; 302        ; 7        ; FLAGC                                                     ; input  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 198      ; 303        ; 7        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 199      ; 304        ; 7        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 200      ; 306        ; 7        ; FIFODATA[0]                                               ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 201      ; 308        ; 7        ; FIFODATA[1]                                               ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 202      ; 309        ; 7        ; FIFODATA[2]                                               ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 203      ; 310        ; 7        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 204      ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 205      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 206      ;            ; 7        ; VCCIO7                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 207      ; 315        ; 7        ; FIFODATA[3]                                               ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 208      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 209      ; 319        ; 7        ; GND+                                                      ;        ;              ;         ; Column I/O ;                 ; --       ; --           ;
; 210      ; 320        ; 7        ; GND+                                                      ;        ;              ;         ; Column I/O ;                 ; --       ; --           ;
; 211      ; 321        ; 8        ; GND+                                                      ;        ;              ;         ; Column I/O ;                 ; --       ; --           ;
; 212      ; 322        ; 8        ; GND+                                                      ;        ;              ;         ; Column I/O ;                 ; --       ; --           ;
; 213      ;            ; 8        ; VCCIO8                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 214      ; 329        ; 8        ; FIFODATA[4]                                               ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 215      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 216      ; 330        ; 8        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 217      ; 331        ; 8        ; FIFODATA[5]                                               ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 218      ; 332        ; 8        ; FIFODATA[6]                                               ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 219      ; 333        ; 8        ; FIFODATA[7]                                               ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 220      ; 334        ; 8        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 221      ; 335        ; 8        ; FIFODATA[8]                                               ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 222      ; 336        ; 8        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 223      ; 338        ; 8        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 224      ; 339        ; 8        ; FIFODATA[9]                                               ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 225      ;            ; 8        ; VCCIO8                                                    ; power  ;              ; 3.3V    ; --         ;                 ; --       ; --           ;
; 226      ; 345        ; 8        ; FIFODATA[10]                                              ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 227      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 228      ;            ;          ; VCCINT                                                    ; power  ;              ; 1.2V    ; --         ;                 ; --       ; --           ;
; 229      ;            ;          ; GND                                                       ; gnd    ;              ;         ; --         ;                 ; --       ; --           ;
; 230      ; 347        ; 8        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 231      ; 348        ; 8        ; FIFODATA[11]                                              ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 232      ; 349        ; 8        ; FIFODATA[12]                                              ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 233      ; 352        ; 8        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 234      ; 354        ; 8        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 235      ; 356        ; 8        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 236      ; 359        ; 8        ; FIFODATA[13]                                              ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 237      ; 360        ; 8        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 238      ; 361        ; 8        ; RESERVED_INPUT_WITH_WEAK_PULLUP                           ;        ;              ;         ; Column I/O ;                 ; no       ; On           ;
; 239      ; 362        ; 8        ; FIFODATA[14]                                              ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
; 240      ; 363        ; 8        ; FIFODATA[15]                                              ; bidir  ; 3.3-V LVTTL  ;         ; Column I/O ; Y               ; no       ; Off          ;
+----------+------------+----------+-----------------------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+
Note: Pin directions (input, output or bidir) are based on device operating in user mode.


+-------------------------------------------------------------------------------+
; Output Pin Default Load For Reported TCO                                      ;
+----------------------------------+-------+------------------------------------+
; I/O Standard                     ; Load  ; Termination Resistance             ;
+----------------------------------+-------+------------------------------------+
; 3.0-V LVTTL                      ; 0 pF  ; Not Available                      ;
; 3.3-V LVTTL                      ; 0 pF  ; Not Available                      ;
; 3.0-V LVCMOS                     ; 0 pF  ; Not Available                      ;
; 3.3-V LVCMOS                     ; 0 pF  ; Not Available                      ;
; 3.0-V PCI                        ; 10 pF ; Not Available                      ;
; 3.0-V PCI-X                      ; 10 pF ; Not Available                      ;
; 2.5 V                            ; 0 pF  ; Not Available                      ;
; 1.8 V                            ; 0 pF  ; Not Available                      ;
; 1.5 V                            ; 0 pF  ; Not Available                      ;
; 1.2 V                            ; 0 pF  ; Not Available                      ;
; SSTL-2 Class I                   ; 0 pF  ; 50 Ohm (Parallel), 25 Ohm (Serial) ;
; Differential 2.5-V SSTL Class I  ; 0 pF  ; (See SSTL-2)                       ;
; SSTL-2 Class II                  ; 0 pF  ; 25 Ohm (Parallel), 25 Ohm (Serial) ;
; Differential 2.5-V SSTL Class II ; 0 pF  ; (See SSTL-2 Class II)              ;
; SSTL-18 Class I                  ; 0 pF  ; 50 Ohm (Parallel), 25 Ohm (Serial) ;
; Differential 1.8-V SSTL Class I  ; 0 pF  ; (See 1.8-V SSTL Class I)           ;
; SSTL-18 Class II                 ; 0 pF  ; 25 Ohm (Parallel), 25 Ohm (Serial) ;
; Differential 1.8-V SSTL Class II ; 0 pF  ; (See 1.8-V SSTL Class II)          ;
; 1.8-V HSTL Class I               ; 0 pF  ; 50 Ohm (Parallel)                  ;
; Differential 1.8-V HSTL Class I  ; 0 pF  ; (See 1.8-V HSTL Class I)           ;
; 1.8-V HSTL Class II              ; 0 pF  ; 25 Ohm (Parallel)                  ;
; Differential 1.8-V HSTL Class II ; 0 pF  ; (See 1.8-V HSTL Class II)          ;
; 1.5-V HSTL Class I               ; 0 pF  ; 50 Ohm (Parallel)                  ;
; Differential 1.5-V HSTL Class I  ; 0 pF  ; (See 1.5-V HSTL Class I)           ;
; 1.5-V HSTL Class II              ; 0 pF  ; 25 Ohm (Parallel)                  ;
; Differential 1.5-V HSTL Class II ; 0 pF  ; (See 1.5-V HSTL Class II)          ;
; 1.2-V HSTL Class I               ; 0 pF  ; Not Available                      ;
; Differential 1.2-V HSTL Class I  ; 0 pF  ; Not Available                      ;
; 1.2-V HSTL Class II              ; 0 pF  ; Not Available                      ;
; Differential 1.2-V HSTL Class II ; 0 pF  ; Not Available                      ;
; Differential LVPECL              ; 0 pF  ; 100 Ohm (Differential)             ;
; LVDS                             ; 0 pF  ; 100 Ohm (Differential)             ;
; LVDS_E_3R                        ; 0 pF  ; Not Available                      ;
; RSDS                             ; 0 pF  ; 100 Ohm (Differential)             ;
; RSDS_E_1R                        ; 0 pF  ; Not Available                      ;
; RSDS_E_3R                        ; 0 pF  ; Not Available                      ;
; mini-LVDS                        ; 0 pF  ; 100 Ohm (Differential)             ;
; mini-LVDS_E_3R                   ; 0 pF  ; Not Available                      ;
; PPDS                             ; 0 pF  ; Not Available                      ;
; PPDS_E_3R                        ; 0 pF  ; Not Available                      ;
; Bus LVDS                         ; 0 pF  ; Not Available                      ;
+----------------------------------+-------+------------------------------------+
Note: User assignments will override these defaults. The user specified values are listed in the Output Pins and Bidir Pins tables.


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       ;
+------------------------------------------------------------------------------------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node                                                                           ; Logic Cells ; Dedicated Logic Registers ; I/O Registers ; Memory Bits ; M9Ks ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Full Hierarchy Name                                                                                                                                                                                                                                                                                   ; Library Name ;
+------------------------------------------------------------------------------------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; |USB_LED                                                                                             ; 613 (47)    ; 489 (34)                  ; 0 (0)         ; 16384       ; 2    ; 0            ; 0       ; 0         ; 30   ; 0            ; 124 (13)     ; 188 (1)           ; 301 (33)         ; |USB_LED                                                                                                                                                                                                                                                                                              ;              ;
;    |sld_hub:auto_hub|                                                                                ; 113 (72)    ; 73 (45)                   ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 40 (27)      ; 8 (8)             ; 65 (40)          ; |USB_LED|sld_hub:auto_hub                                                                                                                                                                                                                                                                             ;              ;
;       |sld_rom_sr:hub_info_reg|                                                                      ; 21 (21)     ; 9 (9)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 12 (12)      ; 0 (0)             ; 9 (9)            ; |USB_LED|sld_hub:auto_hub|sld_rom_sr:hub_info_reg                                                                                                                                                                                                                                                     ;              ;
;       |sld_shadow_jsm:shadow_jsm|                                                                    ; 20 (20)     ; 19 (19)                   ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 1 (1)        ; 0 (0)             ; 19 (19)          ; |USB_LED|sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm                                                                                                                                                                                                                                                   ;              ;
;    |sld_signaltap:auto_signaltap_0|                                                                  ; 453 (1)     ; 382 (0)                   ; 0 (0)         ; 16384       ; 2    ; 0            ; 0       ; 0         ; 0    ; 0            ; 71 (1)       ; 179 (0)           ; 203 (0)          ; |USB_LED|sld_signaltap:auto_signaltap_0                                                                                                                                                                                                                                                               ;              ;
;       |sld_signaltap_impl:sld_signaltap_body|                                                        ; 452 (92)    ; 382 (82)                  ; 0 (0)         ; 16384       ; 2    ; 0            ; 0       ; 0         ; 0    ; 0            ; 70 (10)      ; 179 (73)          ; 203 (9)          ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body                                                                                                                                                                                                                         ;              ;
;          |altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|                            ; 72 (70)     ; 70 (70)                   ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 1 (0)        ; 47 (47)           ; 24 (0)           ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem                                                                                                                                                          ;              ;
;             |lpm_decode:wdecoder|                                                                    ; 2 (0)       ; 0 (0)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 1 (0)        ; 0 (0)             ; 1 (0)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_decode:wdecoder                                                                                                                                      ;              ;
;                |decode_4uf:auto_generated|                                                           ; 2 (2)       ; 0 (0)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 1 (1)        ; 0 (0)             ; 1 (1)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_decode:wdecoder|decode_4uf:auto_generated                                                                                                            ;              ;
;             |lpm_mux:mux|                                                                            ; 23 (0)      ; 0 (0)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 23 (0)           ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux                                                                                                                                              ;              ;
;                |mux_irc:auto_generated|                                                              ; 23 (23)     ; 0 (0)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 23 (23)          ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated                                                                                                                       ;              ;
;          |altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|                                           ; 0 (0)       ; 0 (0)                     ; 0 (0)         ; 16384       ; 2    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 0 (0)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram                                                                                                                                                                         ;              ;
;             |altsyncram_ts14:auto_generated|                                                         ; 0 (0)       ; 0 (0)                     ; 0 (0)         ; 16384       ; 2    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 0 (0)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_ts14:auto_generated                                                                                                                                          ;              ;
;          |lpm_shiftreg:segment_offset_config_deserialize|                                            ; 11 (11)     ; 11 (11)                   ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 10 (10)           ; 1 (1)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize                                                                                                                                                                          ;              ;
;          |lpm_shiftreg:status_register|                                                              ; 17 (17)     ; 17 (17)                   ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 17 (17)          ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register                                                                                                                                                                                            ;              ;
;          |sld_buffer_manager:sld_buffer_manager_inst|                                                ; 98 (98)     ; 64 (64)                   ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 33 (33)      ; 12 (12)           ; 53 (53)          ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst                                                                                                                                                                              ;              ;
;          |sld_ela_control:ela_control|                                                               ; 58 (1)      ; 56 (1)                    ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 2 (0)        ; 37 (0)            ; 19 (1)           ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control                                                                                                                                                                                             ;              ;
;             |lpm_shiftreg:trigger_config_deserialize|                                                ; 4 (4)       ; 4 (4)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 4 (4)             ; 0 (0)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize                                                                                                                                                     ;              ;
;             |sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm| ; 40 (0)      ; 40 (0)                    ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 24 (0)            ; 16 (0)           ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm                                                                                                      ;              ;
;                |lpm_shiftreg:trigger_condition_deserialize|                                          ; 24 (24)     ; 24 (24)                   ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 16 (16)           ; 8 (8)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize                                                           ;              ;
;                |sld_mbpmg:\trigger_modules_gen:0:trigger_match|                                      ; 24 (0)      ; 16 (0)                    ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 8 (0)             ; 16 (0)           ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match                                                       ;              ;
;                   |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|                            ; 3 (3)       ; 2 (2)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 1 (1)             ; 2 (2)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1 ;              ;
;                   |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|                            ; 3 (3)       ; 2 (2)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 1 (1)             ; 2 (2)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1 ;              ;
;                   |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|                            ; 3 (3)       ; 2 (2)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 1 (1)             ; 2 (2)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1 ;              ;
;                   |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|                            ; 3 (3)       ; 2 (2)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 1 (1)             ; 2 (2)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1 ;              ;
;                   |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|                            ; 3 (3)       ; 2 (2)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 1 (1)             ; 2 (2)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1 ;              ;
;                   |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|                            ; 3 (3)       ; 2 (2)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 1 (1)             ; 2 (2)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1 ;              ;
;                   |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|                            ; 3 (3)       ; 2 (2)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 1 (1)             ; 2 (2)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1 ;              ;
;                   |sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|                            ; 3 (3)       ; 2 (2)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 1 (1)             ; 2 (2)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1 ;              ;
;             |sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|                          ; 13 (3)      ; 11 (1)                    ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 2 (2)        ; 9 (0)             ; 2 (1)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity                                                                                                                               ;              ;
;                |lpm_shiftreg:trigger_config_deserialize|                                             ; 10 (10)     ; 10 (10)                   ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 9 (9)             ; 1 (1)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|lpm_shiftreg:trigger_config_deserialize                                                                                       ;              ;
;          |sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|          ; 87 (9)      ; 74 (0)                    ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 13 (9)       ; 0 (0)             ; 74 (0)           ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst                                                                                                                                        ;              ;
;             |lpm_counter:\adv_point_3_and_more:advance_pointer_counter|                              ; 3 (0)       ; 3 (0)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 3 (0)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter                                                                              ;              ;
;                |cntr_mdi:auto_generated|                                                             ; 3 (3)       ; 3 (3)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 3 (3)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_mdi:auto_generated                                                      ;              ;
;             |lpm_counter:read_pointer_counter|                                                       ; 11 (0)      ; 11 (0)                    ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 11 (0)           ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter                                                                                                       ;              ;
;                |cntr_78j:auto_generated|                                                             ; 11 (11)     ; 11 (11)                   ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 11 (11)          ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated                                                                               ;              ;
;             |lpm_counter:status_advance_pointer_counter|                                             ; 7 (0)       ; 5 (0)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 2 (0)        ; 0 (0)             ; 5 (0)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter                                                                                             ;              ;
;                |cntr_5fi:auto_generated|                                                             ; 7 (7)       ; 5 (5)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 2 (2)        ; 0 (0)             ; 5 (5)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated                                                                     ;              ;
;             |lpm_counter:status_read_pointer_counter|                                                ; 3 (0)       ; 1 (0)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 2 (0)        ; 0 (0)             ; 1 (0)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_read_pointer_counter                                                                                                ;              ;
;                |cntr_p1j:auto_generated|                                                             ; 3 (3)       ; 1 (1)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 2 (2)        ; 0 (0)             ; 1 (1)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_read_pointer_counter|cntr_p1j:auto_generated                                                                        ;              ;
;             |lpm_shiftreg:info_data_shift_out|                                                       ; 23 (23)     ; 23 (23)                   ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 23 (23)          ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out                                                                                                       ;              ;
;             |lpm_shiftreg:ram_data_shift_out|                                                        ; 8 (8)       ; 8 (8)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 8 (8)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out                                                                                                        ;              ;
;             |lpm_shiftreg:status_data_shift_out|                                                     ; 23 (23)     ; 23 (23)                   ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 0 (0)        ; 0 (0)             ; 23 (23)          ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out                                                                                                     ;              ;
;          |sld_rom_sr:crc_rom_sr|                                                                     ; 19 (19)     ; 8 (8)                     ; 0 (0)         ; 0           ; 0    ; 0            ; 0       ; 0         ; 0    ; 0            ; 11 (11)      ; 0 (0)             ; 8 (8)            ; |USB_LED|sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr                                                                                                                                                                                                   ;              ;
+------------------------------------------------------------------------------------------------------+-------------+---------------------------+---------------+-------------+------+--------------+---------+-----------+------+--------------+--------------+-------------------+------------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+----------------------------------------------------------------------------------------------+
; Delay Chain Summary                                                                          ;
+--------------+----------+---------------+---------------+-----------------------+-----+------+
; Name         ; Pin Type ; Pad to Core 0 ; Pad to Core 1 ; Pad to Input Register ; TCO ; TCOE ;
+--------------+----------+---------------+---------------+-----------------------+-----+------+
; FLAGB        ; Input    ; (6) 2587 ps   ; --            ; --                    ; --  ; --   ;
; FLAGC        ; Input    ; (6) 2587 ps   ; --            ; --                    ; --  ; --   ;
; SLOE         ; Output   ; --            ; --            ; --                    ; --  ; --   ;
; SLRD         ; Output   ; --            ; --            ; --                    ; --  ; --   ;
; FIFOADR[0]   ; Output   ; --            ; --            ; --                    ; --  ; --   ;
; FIFOADR[1]   ; Output   ; --            ; --            ; --                    ; --  ; --   ;
; SLWR         ; Output   ; --            ; --            ; --                    ; --  ; --   ;
; led[0]       ; Output   ; --            ; --            ; --                    ; --  ; --   ;
; led[1]       ; Output   ; --            ; --            ; --                    ; --  ; --   ;
; led[2]       ; Output   ; --            ; --            ; --                    ; --  ; --   ;
; led[3]       ; Output   ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[4]  ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[5]  ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[6]  ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[7]  ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[8]  ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[9]  ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[10] ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[11] ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[12] ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[13] ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[14] ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[15] ; Bidir    ; --            ; --            ; --                    ; --  ; --   ;
; FIFODATA[0]  ; Bidir    ; (6) 2587 ps   ; --            ; --                    ; --  ; --   ;
; FIFODATA[1]  ; Bidir    ; --            ; (6) 2587 ps   ; --                    ; --  ; --   ;
; FIFODATA[2]  ; Bidir    ; (6) 2587 ps   ; --            ; --                    ; --  ; --   ;
; FIFODATA[3]  ; Bidir    ; --            ; (6) 2587 ps   ; --                    ; --  ; --   ;
; clk          ; Input    ; (0) 0 ps      ; --            ; --                    ; --  ; --   ;
; rst          ; Input    ; (6) 2585 ps   ; --            ; --                    ; --  ; --   ;
; FLAGA        ; Input    ; --            ; (6) 2587 ps   ; --                    ; --  ; --   ;
+--------------+----------+---------------+---------------+-----------------------+-----+------+


+----------------------------------------------------------------------------------------------------------------------------------------+
; Pad To Core Delay Chain Fanout                                                                                                         ;
+----------------------------------------------------------------------------------------------------------+-------------------+---------+
; Source Pin / Fanout                                                                                      ; Pad To Core Index ; Setting ;
+----------------------------------------------------------------------------------------------------------+-------------------+---------+
; FLAGB                                                                                                    ;                   ;         ;
;      - sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_reg[3]           ; 0                 ; 6       ;
;      - sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_trigger_in_reg[3]~feeder ; 0                 ; 6       ;
; FLAGC                                                                                                    ;                   ;         ;
;      - sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_trigger_in_reg[4]        ; 0                 ; 6       ;
;      - sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_reg[4]           ; 0                 ; 6       ;
; FIFODATA[4]                                                                                              ;                   ;         ;
; FIFODATA[5]                                                                                              ;                   ;         ;
; FIFODATA[6]                                                                                              ;                   ;         ;
; FIFODATA[7]                                                                                              ;                   ;         ;
; FIFODATA[8]                                                                                              ;                   ;         ;
; FIFODATA[9]                                                                                              ;                   ;         ;
; FIFODATA[10]                                                                                             ;                   ;         ;
; FIFODATA[11]                                                                                             ;                   ;         ;
; FIFODATA[12]                                                                                             ;                   ;         ;
; FIFODATA[13]                                                                                             ;                   ;         ;
; FIFODATA[14]                                                                                             ;                   ;         ;
; FIFODATA[15]                                                                                             ;                   ;         ;
; FIFODATA[0]                                                                                              ;                   ;         ;
;      - ledctrl[0]                                                                                        ; 0                 ; 6       ;
; FIFODATA[1]                                                                                              ;                   ;         ;
;      - ledctrl[1]                                                                                        ; 1                 ; 6       ;
; FIFODATA[2]                                                                                              ;                   ;         ;
;      - ledctrl[2]                                                                                        ; 0                 ; 6       ;
; FIFODATA[3]                                                                                              ;                   ;         ;
;      - ledctrl[3]                                                                                        ; 1                 ; 6       ;
; clk                                                                                                      ;                   ;         ;
; rst                                                                                                      ;                   ;         ;
;      - state_rd[0]                                                                                       ; 0                 ; 6       ;
;      - state_rd[1]                                                                                       ; 0                 ; 6       ;
;      - state_rd[2]                                                                                       ; 0                 ; 6       ;
;      - state_rd[3]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[23]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[22]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[21]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[20]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[19]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[18]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[17]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[16]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[15]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[14]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[13]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[12]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[11]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[10]                                                                                       ; 0                 ; 6       ;
;      - led_cnt[9]                                                                                        ; 0                 ; 6       ;
;      - led_cnt[8]                                                                                        ; 0                 ; 6       ;
;      - led_cnt[7]                                                                                        ; 0                 ; 6       ;
;      - led_cnt[6]                                                                                        ; 0                 ; 6       ;
;      - led_cnt[5]                                                                                        ; 0                 ; 6       ;
;      - led_cnt[4]                                                                                        ; 0                 ; 6       ;
;      - led_cnt[3]                                                                                        ; 0                 ; 6       ;
;      - led_cnt[2]                                                                                        ; 0                 ; 6       ;
;      - led_cnt[1]                                                                                        ; 0                 ; 6       ;
;      - SLOE_r                                                                                            ; 0                 ; 6       ;
;      - led_r[0]                                                                                          ; 0                 ; 6       ;
;      - led_r[1]                                                                                          ; 0                 ; 6       ;
;      - led_r[2]                                                                                          ; 0                 ; 6       ;
;      - led_r[3]                                                                                          ; 0                 ; 6       ;
;      - flag_a                                                                                            ; 0                 ; 6       ;
;      - led_cnt[0]                                                                                        ; 0                 ; 6       ;
; FLAGA                                                                                                    ;                   ;         ;
;      - sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_trigger_in_reg[2]        ; 1                 ; 6       ;
;      - sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_reg[2]           ; 1                 ; 6       ;
;      - flag_a~feeder                                                                                     ; 1                 ; 6       ;
+----------------------------------------------------------------------------------------------------------+-------------------+---------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Control Signals                                                                                                                                                                                                                                                                                                                                                                          ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------+---------+----------------------------+--------+----------------------+------------------+---------------------------+
; Name                                                                                                                                                                                                                                          ; Location           ; Fan-Out ; Usage                      ; Global ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------+---------+----------------------------+--------+----------------------+------------------+---------------------------+
; SLOE_r                                                                                                                                                                                                                                        ; FF_X26_Y17_N25     ; 4       ; Latch enable               ; yes    ; Global Clock         ; GCLK6            ; --                        ;
; altera_internal_jtag~TCKUTAP                                                                                                                                                                                                                  ; JTAG_X1_Y15_N0     ; 249     ; Clock                      ; yes    ; Global Clock         ; GCLK1            ; --                        ;
; altera_internal_jtag~TMSUTAP                                                                                                                                                                                                                  ; JTAG_X1_Y15_N0     ; 23      ; Sync. clear                ; no     ; --                   ; --               ; --                        ;
; clk                                                                                                                                                                                                                                           ; PIN_31             ; 240     ; Clock                      ; yes    ; Global Clock         ; GCLK4            ; --                        ;
; led_cnt[23]                                                                                                                                                                                                                                   ; FF_X27_Y16_N23     ; 4       ; Clock                      ; yes    ; Global Clock         ; GCLK16           ; --                        ;
; rst                                                                                                                                                                                                                                           ; PIN_6              ; 34      ; Async. clear               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|clr_reg                                                                                                                                                                                                                      ; FF_X20_Y20_N27     ; 30      ; Async. clear               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|irf_reg[1][0]~3                                                                                                                                                                                                              ; LCCOMB_X22_Y19_N8  ; 8       ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|irf_reg[1][4]                                                                                                                                                                                                                ; FF_X19_Y19_N31     ; 8       ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|irf_reg[1][7]                                                                                                                                                                                                                ; FF_X20_Y19_N27     ; 30      ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|irsr_reg[0]~2                                                                                                                                                                                                                ; LCCOMB_X19_Y19_N18 ; 7       ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|shadow_irf_reg[1][0]~2                                                                                                                                                                                                       ; LCCOMB_X22_Y19_N14 ; 8       ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR[0]~16                                                                                                                                                                                        ; LCCOMB_X22_Y19_N6  ; 4       ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[3]~10                                                                                                                                                                                   ; LCCOMB_X22_Y19_N4  ; 5       ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[3]~9                                                                                                                                                                                    ; LCCOMB_X22_Y19_N2  ; 5       ; Sync. clear                ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                                                                                           ; FF_X20_Y20_N5      ; 15      ; Async. clear               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                                                                                          ; FF_X20_Y18_N23     ; 12      ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                                                                                           ; FF_X22_Y19_N1      ; 30      ; Sync. load                 ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[8]                                                                                                                                                                                           ; FF_X22_Y19_N23     ; 11      ; Async. clear               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|virtual_ir_dr_scan_proc~0                                                                                                                                                                                                    ; LCCOMB_X20_Y20_N24 ; 3       ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_hub:auto_hub|virtual_ir_scan_reg                                                                                                                                                                                                          ; FF_X20_Y22_N17     ; 24      ; Async. clear, Clock enable ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_decode:wdecoder|decode_4uf:auto_generated|eq_node[0]~1                                                ; LCCOMB_X28_Y21_N18 ; 23      ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_decode:wdecoder|decode_4uf:auto_generated|eq_node[1]~0                                                ; LCCOMB_X28_Y21_N4  ; 23      ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_enable_delayed                                                                                                                                              ; FF_X28_Y21_N25     ; 5       ; Clock enable, Write enable ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|collect_data                                                                                                                                                             ; LCCOMB_X24_Y18_N22 ; 29      ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|reset_all                                                                                                                                                                ; FF_X19_Y18_N1      ; 170     ; Async. clear               ; yes    ; Global Clock         ; GCLK11           ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|final_trigger_set~4                                                                                                           ; LCCOMB_X24_Y21_N14 ; 24      ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0                                                                                            ; LCCOMB_X24_Y21_N30 ; 11      ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~1                                                                                ; LCCOMB_X20_Y21_N6  ; 1       ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset                                                                      ; LCCOMB_X23_Y20_N12 ; 12      ; Sync. load                 ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_reg_bit[4]~0 ; LCCOMB_X20_Y21_N2  ; 5       ; Sync. load                 ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_read_pointer_counter|cntr_p1j:auto_generated|counter_reg_bit[0]~0    ; LCCOMB_X20_Y21_N4  ; 1       ; Sync. load                 ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|offload_shift_ena                                                                       ; LCCOMB_X20_Y21_N28 ; 4       ; Sync. load                 ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena                                                            ; LCCOMB_X23_Y20_N14 ; 11      ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR[1]~11                                                                                                                                      ; LCCOMB_X17_Y19_N28 ; 4       ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|word_counter[3]~10                                                                                                                                 ; LCCOMB_X17_Y19_N14 ; 4       ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|status_shift_enable~0                                                                                                                                                    ; LCCOMB_X23_Y20_N2  ; 18      ; Clock enable               ; no     ; --                   ; --               ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|trigger_setup_ena                                                                                                                                                        ; LCCOMB_X20_Y21_N8  ; 49      ; Clock enable               ; no     ; --                   ; --               ; --                        ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------------+---------+----------------------------+--------+----------------------+------------------+---------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Global & Other Fast Signals                                                                                                                                                                                            ;
+--------------------------------------------------------------------------------+----------------+---------+--------------------------------------+----------------------+------------------+---------------------------+
; Name                                                                           ; Location       ; Fan-Out ; Fan-Out Using Intentional Clock Skew ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ;
+--------------------------------------------------------------------------------+----------------+---------+--------------------------------------+----------------------+------------------+---------------------------+
; SLOE_r                                                                         ; FF_X26_Y17_N25 ; 4       ; 0                                    ; Global Clock         ; GCLK6            ; --                        ;
; altera_internal_jtag~TCKUTAP                                                   ; JTAG_X1_Y15_N0 ; 249     ; 0                                    ; Global Clock         ; GCLK1            ; --                        ;
; clk                                                                            ; PIN_31         ; 240     ; 0                                    ; Global Clock         ; GCLK4            ; --                        ;
; led_cnt[23]                                                                    ; FF_X27_Y16_N23 ; 4       ; 0                                    ; Global Clock         ; GCLK16           ; --                        ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|reset_all ; FF_X19_Y18_N1  ; 170     ; 0                                    ; Global Clock         ; GCLK11           ; --                        ;
+--------------------------------------------------------------------------------+----------------+---------+--------------------------------------+----------------------+------------------+---------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Non-Global High Fan-Out Signals                                                                                                                                                                                                                                                                                      ;
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
; Name                                                                                                                                                                                                                                                                                                       ; Fan-Out ;
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[4]                                                                                                                                                                                                                                                        ; 51      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|trigger_setup_ena                                                                                                                                                                                                                     ; 49      ;
; rst~input                                                                                                                                                                                                                                                                                                  ; 34      ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[3]                                                                                                                                                                                                                                                        ; 30      ;
; sld_hub:auto_hub|clr_reg                                                                                                                                                                                                                                                                                   ; 30      ;
; sld_hub:auto_hub|irf_reg[1][7]                                                                                                                                                                                                                                                                             ; 30      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|collect_data                                                                                                                                                                                                                          ; 29      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~7                                                                                                                                                                                   ; 28      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|final_trigger_set~4                                                                                                                                                                        ; 24      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~1                                                                                                                              ; 24      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sdr~0                                                                                                                                                                                                                                 ; 24      ;
; sld_hub:auto_hub|virtual_ir_scan_reg                                                                                                                                                                                                                                                                       ; 24      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_decode:wdecoder|decode_4uf:auto_generated|eq_node[0]~1                                                                                                             ; 23      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_decode:wdecoder|decode_4uf:auto_generated|eq_node[1]~0                                                                                                             ; 23      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xraddr[0]                                                                                                                                                              ; 23      ;
; altera_internal_jtag~TMSUTAP                                                                                                                                                                                                                                                                               ; 23      ;
; sld_signaltap:auto_signaltap_0|~GND                                                                                                                                                                                                                                                                        ; 20      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|final_trigger_set                                                                                                                                                                          ; 18      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|status_shift_enable~0                                                                                                                                                                                                                 ; 18      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|status_load_on~0                                                                                                                                                                                                                      ; 17      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|process_0~0                                                                                                                                                                                ; 15      ;
; sld_hub:auto_hub|hub_mode_reg[1]                                                                                                                                                                                                                                                                           ; 15      ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[0]                                                                                                                                                                                                                                                        ; 15      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal0~3                                                                                                                                                                                   ; 14      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|process_0~1                                                                                                                                                                                ; 13      ;
; sld_hub:auto_hub|irsr_reg[8]                                                                                                                                                                                                                                                                               ; 13      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset                                                                                                                                   ; 12      ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[11]                                                                                                                                                                                                                                                       ; 12      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|read_pointer_counter_clk_ena                                                                                                                         ; 11      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[0]~0                                                                                                                                                         ; 11      ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[8]                                                                                                                                                                                                                                                        ; 11      ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|word_counter[0]                                                                                                                                                                                                 ; 9       ;
; sld_hub:auto_hub|irsr_reg[1]                                                                                                                                                                                                                                                                               ; 9       ;
; sld_hub:auto_hub|irsr_reg[2]                                                                                                                                                                                                                                                                               ; 9       ;
; sld_hub:auto_hub|irsr_reg[0]                                                                                                                                                                                                                                                                               ; 9       ;
; sld_hub:auto_hub|irf_reg[1][1]                                                                                                                                                                                                                                                                             ; 9       ;
; altera_internal_jtag~TDIUTAP                                                                                                                                                                                                                                                                               ; 9       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|ram_shift_load                                                                                                                                       ; 8       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|word_counter[1]                                                                                                                                                                                                 ; 8       ;
; sld_hub:auto_hub|shadow_irf_reg[1][0]~2                                                                                                                                                                                                                                                                    ; 8       ;
; sld_hub:auto_hub|irf_reg[1][0]~3                                                                                                                                                                                                                                                                           ; 8       ;
; sld_hub:auto_hub|irf_reg[1][4]                                                                                                                                                                                                                                                                             ; 8       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_enable_delayed                                                                                                                                                                                                           ; 7       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|word_counter[2]                                                                                                                                                                                                 ; 7       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|clear_signal                                                                                                                                                                                                                                                      ; 7       ;
; sld_hub:auto_hub|irsr_reg[0]~2                                                                                                                                                                                                                                                                             ; 7       ;
; sld_hub:auto_hub|node_ena[1]~reg0                                                                                                                                                                                                                                                                          ; 7       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|clear_signal                                                                                                                                                                                                    ; 6       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|run                                                                                                                                                                                                                                   ; 6       ;
; sld_hub:auto_hub|irsr_reg[3]                                                                                                                                                                                                                                                                               ; 6       ;
; sld_hub:auto_hub|irf_reg[1][3]                                                                                                                                                                                                                                                                             ; 6       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[2]                                                                                                                                                                                                                                                   ; 6       ;
; ledctrl[0]                                                                                                                                                                                                                                                                                                 ; 6       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_reg_bit[4]~0                                                              ; 5       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:done                                                                                                                                                                       ; 5       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|crc_rom_sr_ena~0                                                                                                                                                                                                                      ; 5       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[3]~10                                                                                                                                                                                                                                                ; 5       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[3]~9                                                                                                                                                                                                                                                 ; 5       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[3]                                                                                                                                                                                                                                                   ; 5       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[0]                                                                                                                                                                                                                                                   ; 5       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[1]                                                                                                                                                                                                                                                   ; 5       ;
; ledctrl[2]                                                                                                                                                                                                                                                                                                 ; 5       ;
; state_rd[1]                                                                                                                                                                                                                                                                                                ; 5       ;
; state_rd[0]                                                                                                                                                                                                                                                                                                ; 5       ;
; state_rd[3]                                                                                                                                                                                                                                                                                                ; 5       ;
; SLOE_r                                                                                                                                                                                                                                                                                                     ; 5       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|word_counter[3]~10                                                                                                                                                                                              ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR[1]~11                                                                                                                                                                                                   ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_address_delayed[10]                                                                                                                                                                                                      ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|offload_shift_ena                                                                                                                                    ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_address_delayed[9]                                                                                                                                                                                                       ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_address_delayed[8]                                                                                                                                                                                                       ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_address_delayed[7]                                                                                                                                                                                                       ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_address_delayed[6]                                                                                                                                                                                                       ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_address_delayed[5]                                                                                                                                                                                                       ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_address_delayed[4]                                                                                                                                                                                                       ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_address_delayed[3]                                                                                                                                                                                                       ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_address_delayed[2]                                                                                                                                                                                                       ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_address_delayed[1]                                                                                                                                                                                                       ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_address_delayed[0]                                                                                                                                                                                                       ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|word_counter[3]~6                                                                                                                                                                                               ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|condition_delay_reg[3]                                                                                                                                                                                                                ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:is_buffer_wrapped                                                                                                                                                          ; 4       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR~2                                                                                                                                                                                                       ; 4       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR[0]~16                                                                                                                                                                                                                                                     ; 4       ;
; sld_hub:auto_hub|irf_proc~0                                                                                                                                                                                                                                                                                ; 4       ;
; sld_hub:auto_hub|irf_reg[1][6]                                                                                                                                                                                                                                                                             ; 4       ;
; sld_hub:auto_hub|irf_reg[1][5]                                                                                                                                                                                                                                                                             ; 4       ;
; sld_hub:auto_hub|irf_reg[1][2]                                                                                                                                                                                                                                                                             ; 4       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[4]                                                                                                                                                                                                                                                   ; 4       ;
; SLOE_r~_wirecell                                                                                                                                                                                                                                                                                           ; 4       ;
; ~GND                                                                                                                                                                                                                                                                                                       ; 4       ;
; ledctrl[3]                                                                                                                                                                                                                                                                                                 ; 4       ;
; ledctrl[1]                                                                                                                                                                                                                                                                                                 ; 4       ;
; state_rd[2]                                                                                                                                                                                                                                                                                                ; 4       ;
; FLAGA~input                                                                                                                                                                                                                                                                                                ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|offset_count~10                                                                                                                                                                            ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|offset_count~9                                                                                                                                                                             ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|offset_count~8                                                                                                                                                                             ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|offset_count~7                                                                                                                                                                             ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|offset_count~6                                                                                                                                                                             ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|offset_count~5                                                                                                                                                                             ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|offset_count~4                                                                                                                                                                             ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|offset_count~3                                                                                                                                                                             ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|offset_count~2                                                                                                                                                                             ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|offset_count~1                                                                                                                                                                             ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[2]                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_trigger_in_reg[0]                                                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[17]                                                                ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_trigger_in_reg[5]                                                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[20]                                                                ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_trigger_in_reg[6]                                                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[23]                                                                ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_trigger_in_reg[7]                                                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[5]                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_trigger_in_reg[1]                                                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[8]                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_trigger_in_reg[2]                                                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[11]                                                                ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_trigger_in_reg[3]                                                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[14]                                                                ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_trigger_in_reg[4]                                                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|offset_count~0                                                                                                                                                                             ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|current_segment_delayed[0]                                                                                                                                                                                                            ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[11]                                                                                                                                                                                ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[10]                                                                                                                                                                                ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[9]                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[8]                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[7]                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[6]                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[5]                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[4]                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[3]                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[2]                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[1]                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter[0]                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|last_level_delayed                                                                                                                          ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|lpm_shiftreg:trigger_config_deserialize|dffs[0]                                                                                             ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|word_counter[3]                                                                                                                                                                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize|dffs[0]                                                                                                                                                                                ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_reg_bit[10]                                                                         ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_reg_bit[9]                                                                          ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_reg_bit[8]                                                                          ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_reg_bit[7]                                                                          ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_reg_bit[6]                                                                          ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_reg_bit[5]                                                                          ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_reg_bit[4]                                                                          ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_reg_bit[3]                                                                          ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_reg_bit[2]                                                                          ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_reg_bit[1]                                                                          ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_reg_bit[0]                                                                          ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_mdi:auto_generated|counter_reg_bit[1]                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_mdi:auto_generated|counter_reg_bit[2]                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_mdi:auto_generated|counter_reg_bit[0]                                                 ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_read_pointer_counter|cntr_p1j:auto_generated|counter_reg_bit[0]                                                                   ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_reg_bit[2]                                                                ; 3       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_reg_bit[0]                                                                ; 3       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[0]                                                                                                                                                                                                                                                      ; 3       ;
; sld_hub:auto_hub|hub_mode_reg[0]                                                                                                                                                                                                                                                                           ; 3       ;
; sld_hub:auto_hub|virtual_ir_dr_scan_proc~0                                                                                                                                                                                                                                                                 ; 3       ;
; sld_hub:auto_hub|jtag_ir_reg[1]                                                                                                                                                                                                                                                                            ; 3       ;
; sld_hub:auto_hub|virtual_dr_scan_reg                                                                                                                                                                                                                                                                       ; 3       ;
; sld_hub:auto_hub|irsr_reg[7]                                                                                                                                                                                                                                                                               ; 3       ;
; sld_hub:auto_hub|irsr_reg[6]                                                                                                                                                                                                                                                                               ; 3       ;
; sld_hub:auto_hub|irsr_reg[5]                                                                                                                                                                                                                                                                               ; 3       ;
; sld_hub:auto_hub|irsr_reg[4]                                                                                                                                                                                                                                                                               ; 3       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[15]                                                                                                                                                                                                                                                       ; 3       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[7]                                                                                                                                                                                                                                                        ; 3       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[5]                                                                                                                                                                                                                                                        ; 3       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[2]                                                                                                                                                                                                                                                        ; 3       ;
; sld_hub:auto_hub|irf_reg[1][0]                                                                                                                                                                                                                                                                             ; 3       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[1]                                                                                                                                                                                                                                                        ; 3       ;
; led_r[0]                                                                                                                                                                                                                                                                                                   ; 3       ;
; FLAGC~input                                                                                                                                                                                                                                                                                                ; 2       ;
; FLAGB~input                                                                                                                                                                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:last_trigger_address_var[10]                                                                                                                                               ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:last_trigger_address_var[9]                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|last_trigger_address_delayed[10]                                                                                                                                                                                                      ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:last_trigger_address_var[8]                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|last_trigger_address_delayed[9]                                                                                                                                                                                                       ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:last_trigger_address_var[7]                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|last_trigger_address_delayed[8]                                                                                                                                                                                                       ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:last_trigger_address_var[6]                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|last_trigger_address_delayed[7]                                                                                                                                                                                                       ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:last_trigger_address_var[5]                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|last_trigger_address_delayed[6]                                                                                                                                                                                                       ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:last_trigger_address_var[4]                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|last_trigger_address_delayed[5]                                                                                                                                                                                                       ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:last_trigger_address_var[3]                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|last_trigger_address_delayed[4]                                                                                                                                                                                                       ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:last_trigger_address_var[2]                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|last_trigger_address_delayed[3]                                                                                                                                                                                                       ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:last_trigger_address_var[1]                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|last_trigger_address_delayed[2]                                                                                                                                                                                                       ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:last_trigger_address_var[0]                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|last_trigger_address_delayed[1]                                                                                                                                                                                                       ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|last_trigger_address_delayed[0]                                                                                                                                                                                                       ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[0]                                                                 ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[1]                                                                 ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[15]                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[16]                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[18]                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[19]                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[21]                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[22]                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[3]                                                                 ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[4]                                                                 ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[6]                                                                 ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[7]                                                                 ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[9]                                                                 ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[10]                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[12]                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|lpm_shiftreg:trigger_condition_deserialize|dffs[13]                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:segment_shift_var                                                                                                                                                          ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|segment_wrapped_delayed                                                                                                                                                                                                               ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize|dffs[10]                                                                                                                                                                               ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize|dffs[9]                                                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize|dffs[8]                                                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize|dffs[7]                                                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize|dffs[6]                                                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize|dffs[5]                                                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize|dffs[4]                                                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize|dffs[3]                                                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:next_address[10]                                                                                                                                                           ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:next_address[9]                                                                                                                                                            ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:next_address[8]                                                                                                                                                            ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:next_address[7]                                                                                                                                                            ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:next_address[6]                                                                                                                                                            ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:next_address[5]                                                                                                                                                            ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:next_address[4]                                                                                                                                                            ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:next_address[3]                                                                                                                                                            ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:next_address[2]                                                                                                                                                            ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:next_address[1]                                                                                                                                                            ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:next_address[0]                                                                                                                                                            ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[0]                                                                                                                                                           ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize|dffs[2]                                                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|base_address~0                                                                                                                                                                             ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:base_address[0]                                                                                                                                                            ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|done~0                                                                                                                                                                                     ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|segment_shift_var~0                                                                                                                                                                        ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal0~2                                                                                                                                                                                   ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal0~1                                                                                                                                                                                   ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal0~0                                                                                                                                                                                   ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|state_status[2]~1                                                                                                                                                                                                                     ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|state_status[2]~0                                                                                                                                                                                                                     ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|trigger_out_mode_ff                                                                                                                                                                                                                   ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:segment_offset_config_deserialize|dffs[1]                                                                                                                                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig                                                                                                                                                                 ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~0                                                                                                                                             ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|reset_all                                                                                                                                                                                                                             ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|\buffer_manager:collecting_post_data_var                                                                                                                                                   ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|bypass_reg_out                                                                                                                                                                                                                        ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~20                                                                                                                                                                                    ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~18                                                                                                                                                                                    ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~16                                                                                                                                                                                    ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~14                                                                                                                                                                                    ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~12                                                                                                                                                                                    ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~10                                                                                                                                                                                    ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~8                                                                                                                                                                                     ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~6                                                                                                                                                                                     ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~4                                                                                                                                                                                     ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~2                                                                                                                                                                                     ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~0                                                                                                                                                                                     ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_reg_bit[3]                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_reg_bit[1]                                                                ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_reg_bit[4]                                                                ; 2       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~7                                                                                                                                                                                                                                                         ; 2       ;
; sld_hub:auto_hub|reset_ena_reg_proc~0                                                                                                                                                                                                                                                                      ; 2       ;
; sld_hub:auto_hub|hub_mode_reg[2]~3                                                                                                                                                                                                                                                                         ; 2       ;
; sld_hub:auto_hub|Equal6~0                                                                                                                                                                                                                                                                                  ; 2       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~4                                                                                                                                                                                                                                                         ; 2       ;
; sld_hub:auto_hub|irsr_reg[4]~1                                                                                                                                                                                                                                                                             ; 2       ;
; sld_hub:auto_hub|jtag_ir_reg[0]                                                                                                                                                                                                                                                                            ; 2       ;
; sld_hub:auto_hub|Equal0~1                                                                                                                                                                                                                                                                                  ; 2       ;
; sld_hub:auto_hub|jtag_ir_reg[4]                                                                                                                                                                                                                                                                            ; 2       ;
; sld_hub:auto_hub|jtag_ir_reg[5]                                                                                                                                                                                                                                                                            ; 2       ;
; sld_hub:auto_hub|jtag_ir_reg[2]                                                                                                                                                                                                                                                                            ; 2       ;
; sld_hub:auto_hub|jtag_ir_reg[3]                                                                                                                                                                                                                                                                            ; 2       ;
; sld_hub:auto_hub|Equal0~0                                                                                                                                                                                                                                                                                  ; 2       ;
; sld_hub:auto_hub|jtag_ir_reg[6]                                                                                                                                                                                                                                                                            ; 2       ;
; sld_hub:auto_hub|jtag_ir_reg[7]                                                                                                                                                                                                                                                                            ; 2       ;
; sld_hub:auto_hub|jtag_ir_reg[8]                                                                                                                                                                                                                                                                            ; 2       ;
; sld_hub:auto_hub|jtag_ir_reg[9]                                                                                                                                                                                                                                                                            ; 2       ;
; sld_hub:auto_hub|hub_mode_reg[2]                                                                                                                                                                                                                                                                           ; 2       ;
; sld_hub:auto_hub|node_ena_proc~1                                                                                                                                                                                                                                                                           ; 2       ;
; sld_hub:auto_hub|hub_mode_reg[1]~0                                                                                                                                                                                                                                                                         ; 2       ;
; sld_hub:auto_hub|tdo_bypass_reg                                                                                                                                                                                                                                                                            ; 2       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[14]                                                                                                                                                                                                                                                       ; 2       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[12]                                                                                                                                                                                                                                                       ; 2       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[10]                                                                                                                                                                                                                                                       ; 2       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[9]                                                                                                                                                                                                                                                        ; 2       ;
; sld_hub:auto_hub|tdo                                                                                                                                                                                                                                                                                       ; 2       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[1]                                                                                                                                                                                                                                                      ; 2       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|tms_cnt[2]                                                                                                                                                                                                                                                      ; 2       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[13]                                                                                                                                                                                                                                                       ; 2       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state[6]                                                                                                                                                                                                                                                        ; 2       ;
; led_r[0]~_wirecell                                                                                                                                                                                                                                                                                         ; 2       ;
; led_cnt[0]                                                                                                                                                                                                                                                                                                 ; 2       ;
; led_r[0]~0                                                                                                                                                                                                                                                                                                 ; 2       ;
; Mux10~0                                                                                                                                                                                                                                                                                                    ; 2       ;
; Mux11~0                                                                                                                                                                                                                                                                                                    ; 2       ;
; led_r[3]                                                                                                                                                                                                                                                                                                   ; 2       ;
; led_r[2]                                                                                                                                                                                                                                                                                                   ; 2       ;
; led_r[1]                                                                                                                                                                                                                                                                                                   ; 2       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|condition_delay_reg[0]~feeder                                                                                                                                                                                                         ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|final_trigger_set~feeder                                                                                                                                                                   ; 1       ;
; ~QIC_CREATED_GND~I                                                                                                                                                                                                                                                                                         ; 1       ;
; altera_reserved_tdi~input                                                                                                                                                                                                                                                                                  ; 1       ;
; altera_reserved_tck~input                                                                                                                                                                                                                                                                                  ; 1       ;
; altera_reserved_tms~input                                                                                                                                                                                                                                                                                  ; 1       ;
; FIFODATA[3]~input                                                                                                                                                                                                                                                                                          ; 1       ;
; FIFODATA[2]~input                                                                                                                                                                                                                                                                                          ; 1       ;
; FIFODATA[1]~input                                                                                                                                                                                                                                                                                          ; 1       ;
; FIFODATA[0]~input                                                                                                                                                                                                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|buffer_write_enable_delayed~0                                                                                                                                                                                                         ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~1 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~0 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~1 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~0 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~1 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~0 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~1 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|p_match_out~0 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~1 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|p_match_out~0 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~1 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|p_match_out~0 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~1 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|p_match_out~0 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~1 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~0 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|word_counter~11                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|word_counter~9                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_reg[7]                                                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[0][7]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_reg[6]                                                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[1][7]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[0][6]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_reg[5]                                                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[2][7]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[1][6]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[0][5]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_reg[4]                                                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[3][7]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[2][6]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[1][5]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[0][4]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_reg[3]                                                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~7                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[3][6]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[2][5]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[1][4]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[0][3]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_reg[2]                                                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~6                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[7]                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[3][5]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[2][4]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[1][3]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[0][2]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_reg[1]                                                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~5                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[6]                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[3][4]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[2][3]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[1][2]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[0][1]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_reg[0]                                                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~4                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[5]                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[3][3]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[2][2]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[1][1]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[0][0]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~3                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[4]                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[3][2]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[2][1]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[1][0]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~2                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[3]                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[3][1]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[2][0]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~1                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[2]                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|acq_data_in_pipe_reg[3][0]                                                                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|_~0                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[1]                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[22]~22                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][22]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][22]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~22                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out|dffs[0]                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[21]~21                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][21]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][21]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~22                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[22]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~21                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[22]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[20]~20                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][20]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][20]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~21                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[21]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[22]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~20                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[21]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[19]~19                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][19]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][19]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~20                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[20]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[21]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~19                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[20]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[18]~18                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][18]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][18]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~19                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[19]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[20]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~18                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[19]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[17]~17                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][17]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][17]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~18                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[18]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[19]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~17                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[18]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[16]~16                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][16]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][16]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~17                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[17]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[18]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~16                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[17]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[15]~15                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][15]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][15]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~16                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[16]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[17]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~16                                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~15                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[16]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[14]~14                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][14]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][14]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~15                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[15]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[16]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~15                                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[16]                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~14                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[15]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[13]~13                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][13]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][13]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~14                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[14]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[15]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~14                                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[15]                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~13                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[14]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[12]~12                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][12]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][12]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~13                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[13]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[14]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~13                                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[14]                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~12                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[13]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[11]~11                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][11]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][11]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~12                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[12]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[13]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~12                                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[13]                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~11                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[10]                                                                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[12]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[10]~10                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][10]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][10]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~11                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[11]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[12]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~11                                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[12]                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~10                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[9]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[11]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[9]~9                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][9]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][9]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~10                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[10]                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[11]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~10                                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[11]                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|lpm_shiftreg:trigger_config_deserialize|dffs[9]                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~9                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[8]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[10]                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[8]~8                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][8]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][8]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~9                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[9]                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[10]                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~9                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[10]                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|lpm_shiftreg:trigger_config_deserialize|dffs[8]                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~8                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[7]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[9]                                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[7]~7                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][7]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][7]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~8                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[8]                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[9]                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~8                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[9]                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|lpm_shiftreg:trigger_config_deserialize|dffs[7]                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~7                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[6]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[8]                                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[6]~6                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][6]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][6]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~7                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[7]                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[8]                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~7                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[8]                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|lpm_shiftreg:trigger_config_deserialize|dffs[6]                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~6                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[5]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[7]                                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[5]~5                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][5]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][5]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~6                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[6]                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[7]                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~6                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[7]                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|lpm_shiftreg:trigger_config_deserialize|dffs[5]                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~5                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[4]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[6]                                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[4]~4                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][4]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][4]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~5                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[5]                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[6]                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~5                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[6]                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[3]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|lpm_shiftreg:trigger_config_deserialize|dffs[4]                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~4                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[3]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[5]                                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[3]~3                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][3]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][3]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~4                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[4]                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[5]                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~4                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[5]                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|condition_delay_reg[0]                                                                                                                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[2]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|lpm_shiftreg:trigger_config_deserialize|dffs[3]                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR~10                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR~9                                                                                                                                                                                                       ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~3                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[2]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[4]                                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|Equal2~1                                                                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_read_pointer_counter|cntr_p1j:auto_generated|counter_reg_bit[0]~0                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~0                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[2]~2                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][2]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][2]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~3                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[3]                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[4]                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~3                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[4]                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|condition_delay_reg[1]                                                                                                                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[1]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|holdff        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|holdff        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|holdff        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|holdff        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|holdff        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|holdff        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|holdff        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|holdff        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|run~0                                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|lpm_shiftreg:trigger_config_deserialize|dffs[2]                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR~8                                                                                                                                                                                                       ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR[3]                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR~7                                                                                                                                                                                                       ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~2                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[1]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[3]                                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[1]~1                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][1]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][1]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~2                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[2]                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[3]                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~2                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[3]                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|condition_delay_reg[2]                                                                                                                                                                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~34                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~31                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~28                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~25                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~22                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~19                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~16                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~13                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~10                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~7                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~4                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|counter~0                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped~5                                                                                                                                                                        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped~4                                                                                                                                                                        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped~3                                                                                                                                                                        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped~2                                                                                                                                                                        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped~1                                                                                                                                                                        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped~0                                                                                                                                                                        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|trigger_out_mode_ff~0                                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|last_level_delayed~2                                                                                                                        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|last_level_delayed~1                                                                                                                        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|regoutff      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:5:sm1|regoutff      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:6:sm1|regoutff      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:7:sm1|regoutff      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|last_level_delayed~0                                                                                                                        ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:1:sm1|regoutff      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|regoutff      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|regoutff      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|regoutff      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|run                                                                                                                                                                                                       ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_ela_control:ela_control|sld_ela_trigger_flow_mgr:\builtin:ela_trigger_flow_mgr_entity|lpm_shiftreg:trigger_config_deserialize|dffs[1]                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR~6                                                                                                                                                                                                       ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR[2]                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR~5                                                                                                                                                                                                       ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|word_counter~8                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|Add0~1                                                                                                                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|word_counter~7                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|Add0~0                                                                                                                                                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig~1                                                                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|is_buffer_wrapped_once_sig~0                                                                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~1                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|last_buffer_write_address_sig[0]                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[2]                                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|lpm_mux:mux|mux_irc:auto_generated|result_node[0]~0                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[0][0]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|cells[1][0]                                                                                                                                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~1                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[1]                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[2]                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|reset_all~0                                                                                                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~1                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[2]                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|collecting_post_data_var~0                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~6                                                                                                                                                                                   ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~5                                                                                                                                                                                   ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~4                                                                                                                                                                                   ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~3                                                                                                                                                                                   ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~2                                                                                                                                                                                   ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~1                                                                                                                                                                                   ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Equal1~0                                                                                                                                                                                   ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[0]                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|trigger_out_ff~0                                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR~4                                                                                                                                                                                                       ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR[1]                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR~3                                                                                                                                                                                                       ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|_~0                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[1]                                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|_~0                                                                                                               ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|status_ram_shift_load~0                                                                                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altdpram:\stp_non_zero_ram_gen:attribute_mem_gen:attribute_mem|xq[0]                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[1]                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|bypass_reg_out~0                                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|_~0                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[1]                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|tdo~4                                                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|tdo~3                                                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|tdo~2                                                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_rom_sr:crc_rom_sr|WORD_SR[0]                                                                                                                                                                                                      ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[0]                                                                                                             ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:status_data_shift_out|dffs[0]                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|tdo~1                                                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|lpm_shiftreg:status_register|dffs[0]                                                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|tdo~0                                                                                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_ts14:auto_generated|ram_block1a5                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_ts14:auto_generated|ram_block1a6                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_ts14:auto_generated|ram_block1a7                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_ts14:auto_generated|ram_block1a4                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita10                                                                         ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita9~COUT                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita9                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita8~COUT                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita8                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita7~COUT                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita7                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita6~COUT                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita6                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita5~COUT                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita5                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita4~COUT                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita4                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita3~COUT                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita3                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita2~COUT                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita2                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita1~COUT                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita1                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita0~COUT                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_78j:auto_generated|counter_comb_bita0                                                                          ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_mdi:auto_generated|counter_comb_bita2                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_mdi:auto_generated|counter_comb_bita1~COUT                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_mdi:auto_generated|counter_comb_bita1                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_mdi:auto_generated|counter_comb_bita0~COUT                                            ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_mdi:auto_generated|counter_comb_bita0                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_ts14:auto_generated|ram_block1a1                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_ts14:auto_generated|ram_block1a2                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_ts14:auto_generated|ram_block1a3                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_ts14:auto_generated|ram_block1a0                                                                                                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_read_pointer_counter|cntr_p1j:auto_generated|counter_comb_bita0~0                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_read_pointer_counter|cntr_p1j:auto_generated|counter_comb_bita0~COUT                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_read_pointer_counter|cntr_p1j:auto_generated|counter_comb_bita0                                                                   ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[11]~31                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[10]~30                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[10]~29                                                                                                                                                                 ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[9]~28                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[9]~27                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[8]~26                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[8]~25                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[7]~24                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[7]~23                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[6]~22                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[6]~21                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[5]~20                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[5]~19                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[4]~18                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[4]~17                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[3]~16                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[3]~15                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[2]~14                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[2]~13                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[1]~12                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[1]~11                                                                                                                                                                  ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~32                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~30                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~29                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~27                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~26                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~24                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~23                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~21                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~20                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~18                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~17                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~15                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~14                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~12                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~11                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~9                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~8                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~6                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~5                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~3                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~2                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~1                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add3~0                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~19                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~17                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~15                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~13                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~11                                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~9                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~7                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~5                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~3                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|Add2~1                                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_comb_bita4~0                                                              ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_comb_bita4~COUT                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_comb_bita4                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_comb_bita3~COUT                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_comb_bita3                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_comb_bita2~COUT                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_comb_bita2                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_comb_bita1~COUT                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_comb_bita1                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_comb_bita0~COUT                                                           ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:status_advance_pointer_counter|cntr_5fi:auto_generated|counter_comb_bita0                                                                ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[11]                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[10]                                                                                                                                                                    ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[9]                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[8]                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[7]                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[6]                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[5]                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[4]                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[3]                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[2]                                                                                                                                                                     ; 1       ;
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_buffer_manager:sld_buffer_manager_inst|modified_post_count[1]                                                                                                                                                                     ; 1       ;
; sld_hub:auto_hub|tdo~_wirecell                                                                                                                                                                                                                                                                             ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~15                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~14                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~13                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~12                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR[3]                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~11                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|tms_cnt~2                                                                                                                                                                                                                                                       ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|tms_cnt~1                                                                                                                                                                                                                                                       ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~10                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~9                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~8                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR[2]                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|hub_mode_reg[0]~7                                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|tms_cnt~0                                                                                                                                                                                                                                                       ; 1       ;
; sld_hub:auto_hub|hub_mode_reg[2]~6                                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|reset_ena_reg                                                                                                                                                                                                                                                                             ; 1       ;
; sld_hub:auto_hub|hub_mode_reg[2]~5                                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|Equal0~2                                                                                                                                                                                                                                                                                  ; 1       ;
; sld_hub:auto_hub|irsr_reg~13                                                                                                                                                                                                                                                                               ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg~9                                                                                                                                                                                                                                                                          ; 1       ;
; sld_hub:auto_hub|irsr_reg~12                                                                                                                                                                                                                                                                               ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg~8                                                                                                                                                                                                                                                                          ; 1       ;
; sld_hub:auto_hub|irsr_reg~11                                                                                                                                                                                                                                                                               ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg~7                                                                                                                                                                                                                                                                          ; 1       ;
; sld_hub:auto_hub|irsr_reg~10                                                                                                                                                                                                                                                                               ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg~6                                                                                                                                                                                                                                                                          ; 1       ;
; sld_hub:auto_hub|irsr_reg[3]~9                                                                                                                                                                                                                                                                             ; 1       ;
; sld_hub:auto_hub|irsr_reg[3]~8                                                                                                                                                                                                                                                                             ; 1       ;
; sld_hub:auto_hub|irsr_reg[3]~7                                                                                                                                                                                                                                                                             ; 1       ;
; sld_hub:auto_hub|irsr_reg[3]~6                                                                                                                                                                                                                                                                             ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg~5                                                                                                                                                                                                                                                                          ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg~4                                                                                                                                                                                                                                                                          ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg~3                                                                                                                                                                                                                                                                          ; 1       ;
; sld_hub:auto_hub|hub_mode_reg[1]~4                                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|hub_mode_reg[1]~2                                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|hub_mode_reg[1]~1                                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg[1][3]~1                                                                                                                                                                                                                                                                    ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg~0                                                                                                                                                                                                                                                                          ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~6                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR~5                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|irsr_reg~5                                                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|irsr_reg~4                                                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|irsr_reg~3                                                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|irsr_reg~0                                                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|tdo_bypass_reg~0                                                                                                                                                                                                                                                                          ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~12                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~11                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~10                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~9                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~8                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~7                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~6                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~5                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~4                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~3                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~2                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~1                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|sld_shadow_jsm:shadow_jsm|state~0                                                                                                                                                                                                                                                         ; 1       ;
; sld_hub:auto_hub|Equal1~0                                                                                                                                                                                                                                                                                  ; 1       ;
; sld_hub:auto_hub|clr_reg_proc~0                                                                                                                                                                                                                                                                            ; 1       ;
; sld_hub:auto_hub|node_ena~3                                                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|node_ena~2                                                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|node_ena_proc~0                                                                                                                                                                                                                                                                           ; 1       ;
; sld_hub:auto_hub|node_ena~1                                                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|node_ena~0                                                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|irf_reg~10                                                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg[1][7]                                                                                                                                                                                                                                                                      ; 1       ;
; sld_hub:auto_hub|irf_reg~9                                                                                                                                                                                                                                                                                 ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg[1][6]                                                                                                                                                                                                                                                                      ; 1       ;
; sld_hub:auto_hub|irf_reg~8                                                                                                                                                                                                                                                                                 ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg[1][5]                                                                                                                                                                                                                                                                      ; 1       ;
; sld_hub:auto_hub|irf_reg~7                                                                                                                                                                                                                                                                                 ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg[1][4]                                                                                                                                                                                                                                                                      ; 1       ;
; sld_hub:auto_hub|irf_reg~6                                                                                                                                                                                                                                                                                 ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg[1][3]                                                                                                                                                                                                                                                                      ; 1       ;
; sld_hub:auto_hub|irf_reg~5                                                                                                                                                                                                                                                                                 ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg[1][2]                                                                                                                                                                                                                                                                      ; 1       ;
; sld_hub:auto_hub|irf_reg~4                                                                                                                                                                                                                                                                                 ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg[1][1]                                                                                                                                                                                                                                                                      ; 1       ;
; sld_hub:auto_hub|irf_reg[1][0]~2                                                                                                                                                                                                                                                                           ; 1       ;
; sld_hub:auto_hub|irf_reg[1][0]~1                                                                                                                                                                                                                                                                           ; 1       ;
; sld_hub:auto_hub|irf_reg~0                                                                                                                                                                                                                                                                                 ; 1       ;
; sld_hub:auto_hub|shadow_irf_reg[1][0]                                                                                                                                                                                                                                                                      ; 1       ;
; sld_hub:auto_hub|tdo~5                                                                                                                                                                                                                                                                                     ; 1       ;
; sld_hub:auto_hub|tdo~4                                                                                                                                                                                                                                                                                     ; 1       ;
; sld_hub:auto_hub|tdo~3                                                                                                                                                                                                                                                                                     ; 1       ;
; sld_hub:auto_hub|tdo~2                                                                                                                                                                                                                                                                                     ; 1       ;
; sld_hub:auto_hub|tdo~1                                                                                                                                                                                                                                                                                     ; 1       ;
; sld_hub:auto_hub|tdo~0                                                                                                                                                                                                                                                                                     ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|WORD_SR[0]                                                                                                                                                                                                                                                        ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[4]~15                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[3]~14                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[3]~13                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[2]~12                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[2]~11                                                                                                                                                                                                                                                ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[1]~8                                                                                                                                                                                                                                                 ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[1]~7                                                                                                                                                                                                                                                 ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[0]~6                                                                                                                                                                                                                                                 ; 1       ;
; sld_hub:auto_hub|sld_rom_sr:hub_info_reg|word_counter[0]~5                                                                                                                                                                                                                                                 ; 1       ;
; altera_internal_jtag~TDO                                                                                                                                                                                                                                                                                   ; 1       ;
; led_cnt[0]~69                                                                                                                                                                                                                                                                                              ; 1       ;
; Mux5~0                                                                                                                                                                                                                                                                                                     ; 1       ;
; state_rd[1]~2                                                                                                                                                                                                                                                                                              ; 1       ;
; state_rd[0]~1                                                                                                                                                                                                                                                                                              ; 1       ;
; state_rd[0]~0                                                                                                                                                                                                                                                                                              ; 1       ;
; flag_a                                                                                                                                                                                                                                                                                                     ; 1       ;
; Mux4~0                                                                                                                                                                                                                                                                                                     ; 1       ;
; Mux8~0                                                                                                                                                                                                                                                                                                     ; 1       ;
; Mux9~0                                                                                                                                                                                                                                                                                                     ; 1       ;
; Mux10~1                                                                                                                                                                                                                                                                                                    ; 1       ;
; Mux11~1                                                                                                                                                                                                                                                                                                    ; 1       ;
; SLOE_r~1                                                                                                                                                                                                                                                                                                   ; 1       ;
; SLOE_r~0                                                                                                                                                                                                                                                                                                   ; 1       ;
; led_cnt[23]~67                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[22]~66                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[22]~65                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[21]~64                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[21]~63                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[20]~62                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[20]~61                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[19]~60                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[19]~59                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[18]~58                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[18]~57                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[17]~56                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[17]~55                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[16]~54                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[16]~53                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[15]~52                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[15]~51                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[14]~50                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[14]~49                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[13]~48                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[13]~47                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[12]~46                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[12]~45                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[11]~44                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[11]~43                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[10]~42                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[10]~41                                                                                                                                                                                                                                                                                             ; 1       ;
; led_cnt[9]~40                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[9]~39                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[8]~38                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[8]~37                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[7]~36                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[7]~35                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[6]~34                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[6]~33                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[5]~32                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[5]~31                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[4]~30                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[4]~29                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[3]~28                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[3]~27                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[2]~26                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[2]~25                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[1]~24                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[1]~23                                                                                                                                                                                                                                                                                              ; 1       ;
; led_cnt[1]                                                                                                                                                                                                                                                                                                 ; 1       ;
; led_cnt[2]                                                                                                                                                                                                                                                                                                 ; 1       ;
; led_cnt[3]                                                                                                                                                                                                                                                                                                 ; 1       ;
; led_cnt[4]                                                                                                                                                                                                                                                                                                 ; 1       ;
; led_cnt[5]                                                                                                                                                                                                                                                                                                 ; 1       ;
; led_cnt[6]                                                                                                                                                                                                                                                                                                 ; 1       ;
; led_cnt[7]                                                                                                                                                                                                                                                                                                 ; 1       ;
; led_cnt[8]                                                                                                                                                                                                                                                                                                 ; 1       ;
; led_cnt[9]                                                                                                                                                                                                                                                                                                 ; 1       ;
; led_cnt[10]                                                                                                                                                                                                                                                                                                ; 1       ;
; led_cnt[11]                                                                                                                                                                                                                                                                                                ; 1       ;
; led_cnt[12]                                                                                                                                                                                                                                                                                                ; 1       ;
; led_cnt[13]                                                                                                                                                                                                                                                                                                ; 1       ;
; led_cnt[14]                                                                                                                                                                                                                                                                                                ; 1       ;
; led_cnt[15]                                                                                                                                                                                                                                                                                                ; 1       ;
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Fitter RAM Summary                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+-------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+------+--------------------------------+
; Name                                                                                                                                                           ; Type ; Mode             ; Clock Mode  ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Port A Input Registers ; Port A Output Registers ; Port B Input Registers ; Port B Output Registers ; Size  ; Implementation Port A Depth ; Implementation Port A Width ; Implementation Port B Depth ; Implementation Port B Width ; Implementation Bits ; M9Ks ; MIF  ; Location                       ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+-------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+------+--------------------------------+
; sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_ts14:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; Dual Clocks ; 2048         ; 8            ; 2048         ; 8            ; yes                    ; no                      ; yes                    ; no                      ; 16384 ; 2048                        ; 8                           ; 2048                        ; 8                           ; 16384               ; 2    ; None ; M9K_X25_Y15_N0, M9K_X25_Y19_N0 ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+-------------+--------------+--------------+--------------+--------------+------------------------+-------------------------+------------------------+-------------------------+-------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+---------------------+------+------+--------------------------------+
Note: Fitter may spread logical memories into multiple blocks to improve timing. The actual required RAM blocks can be found in the Fitter Resource Usage section.


+-----------------------------------------------------+
; Interconnect Usage Summary                          ;
+----------------------------+------------------------+
; Interconnect Resource Type ; Usage                  ;
+----------------------------+------------------------+
; Block interconnects        ; 658 / 47,787 ( 1 % )   ;
; C16 interconnects          ; 16 / 1,804 ( 1 % )     ;
; C4 interconnects           ; 373 / 31,272 ( 1 % )   ;
; Direct links               ; 100 / 47,787 ( < 1 % ) ;
; Global clocks              ; 5 / 20 ( 25 % )        ;
; Local interconnects        ; 377 / 15,408 ( 2 % )   ;
; R24 interconnects          ; 6 / 1,775 ( < 1 % )    ;
; R4 interconnects           ; 375 / 41,310 ( 1 % )   ;
+----------------------------+------------------------+


+----------------------------------------------------------------------------+
; LAB Logic Elements                                                         ;
+---------------------------------------------+------------------------------+
; Number of Logic Elements  (Average = 11.15) ; Number of LABs  (Total = 55) ;
+---------------------------------------------+------------------------------+
; 1                                           ; 9                            ;
; 2                                           ; 1                            ;
; 3                                           ; 3                            ;
; 4                                           ; 1                            ;
; 5                                           ; 1                            ;
; 6                                           ; 1                            ;
; 7                                           ; 0                            ;
; 8                                           ; 1                            ;
; 9                                           ; 0                            ;
; 10                                          ; 2                            ;
; 11                                          ; 2                            ;
; 12                                          ; 3                            ;
; 13                                          ; 1                            ;
; 14                                          ; 0                            ;
; 15                                          ; 1                            ;
; 16                                          ; 29                           ;
+---------------------------------------------+------------------------------+


+-------------------------------------------------------------------+
; LAB-wide Signals                                                  ;
+------------------------------------+------------------------------+
; LAB-wide Signals  (Average = 2.11) ; Number of LABs  (Total = 55) ;
+------------------------------------+------------------------------+
; 1 Async. clear                     ; 29                           ;
; 1 Clock                            ; 40                           ;
; 1 Clock enable                     ; 21                           ;
; 1 Sync. clear                      ; 3                            ;
; 1 Sync. load                       ; 4                            ;
; 2 Async. clears                    ; 1                            ;
; 2 Clock enables                    ; 8                            ;
; 2 Clocks                           ; 10                           ;
+------------------------------------+------------------------------+


+-----------------------------------------------------------------------------+
; LAB Signals Sourced                                                         ;
+----------------------------------------------+------------------------------+
; Number of Signals Sourced  (Average = 18.91) ; Number of LABs  (Total = 55) ;
+----------------------------------------------+------------------------------+
; 0                                            ; 0                            ;
; 1                                            ; 5                            ;
; 2                                            ; 4                            ;
; 3                                            ; 0                            ;
; 4                                            ; 3                            ;
; 5                                            ; 0                            ;
; 6                                            ; 1                            ;
; 7                                            ; 0                            ;
; 8                                            ; 1                            ;
; 9                                            ; 1                            ;
; 10                                           ; 1                            ;
; 11                                           ; 0                            ;
; 12                                           ; 0                            ;
; 13                                           ; 0                            ;
; 14                                           ; 0                            ;
; 15                                           ; 0                            ;
; 16                                           ; 2                            ;
; 17                                           ; 0                            ;
; 18                                           ; 4                            ;
; 19                                           ; 1                            ;
; 20                                           ; 0                            ;
; 21                                           ; 2                            ;
; 22                                           ; 4                            ;
; 23                                           ; 2                            ;
; 24                                           ; 2                            ;
; 25                                           ; 2                            ;
; 26                                           ; 3                            ;
; 27                                           ; 1                            ;
; 28                                           ; 4                            ;
; 29                                           ; 0                            ;
; 30                                           ; 5                            ;
; 31                                           ; 6                            ;
; 32                                           ; 1                            ;
+----------------------------------------------+------------------------------+


+--------------------------------------------------------------------------------+
; LAB Signals Sourced Out                                                        ;
+-------------------------------------------------+------------------------------+
; Number of Signals Sourced Out  (Average = 6.65) ; Number of LABs  (Total = 55) ;
+-------------------------------------------------+------------------------------+
; 0                                               ; 0                            ;
; 1                                               ; 14                           ;
; 2                                               ; 8                            ;
; 3                                               ; 6                            ;
; 4                                               ; 2                            ;
; 5                                               ; 1                            ;
; 6                                               ; 2                            ;
; 7                                               ; 2                            ;
; 8                                               ; 3                            ;
; 9                                               ; 2                            ;
; 10                                              ; 0                            ;
; 11                                              ; 2                            ;
; 12                                              ; 4                            ;
; 13                                              ; 0                            ;
; 14                                              ; 0                            ;
; 15                                              ; 1                            ;
; 16                                              ; 4                            ;
; 17                                              ; 2                            ;
; 18                                              ; 0                            ;
; 19                                              ; 0                            ;
; 20                                              ; 0                            ;
; 21                                              ; 0                            ;
; 22                                              ; 0                            ;
; 23                                              ; 0                            ;
; 24                                              ; 1                            ;
; 25                                              ; 0                            ;
; 26                                              ; 0                            ;
; 27                                              ; 0                            ;
; 28                                              ; 0                            ;
; 29                                              ; 0                            ;
; 30                                              ; 1                            ;
+-------------------------------------------------+------------------------------+


+-----------------------------------------------------------------------------+
; LAB Distinct Inputs                                                         ;
+----------------------------------------------+------------------------------+
; Number of Distinct Inputs  (Average = 11.07) ; Number of LABs  (Total = 55) ;
+----------------------------------------------+------------------------------+
; 0                                            ; 0                            ;
; 1                                            ; 2                            ;
; 2                                            ; 5                            ;
; 3                                            ; 6                            ;
; 4                                            ; 2                            ;
; 5                                            ; 3                            ;
; 6                                            ; 2                            ;
; 7                                            ; 0                            ;
; 8                                            ; 1                            ;
; 9                                            ; 4                            ;
; 10                                           ; 2                            ;
; 11                                           ; 6                            ;
; 12                                           ; 2                            ;
; 13                                           ; 0                            ;
; 14                                           ; 1                            ;
; 15                                           ; 0                            ;
; 16                                           ; 0                            ;
; 17                                           ; 3                            ;
; 18                                           ; 0                            ;
; 19                                           ; 1                            ;
; 20                                           ; 1                            ;
; 21                                           ; 3                            ;
; 22                                           ; 3                            ;
; 23                                           ; 1                            ;
; 24                                           ; 0                            ;
; 25                                           ; 1                            ;
; 26                                           ; 1                            ;
; 27                                           ; 2                            ;
; 28                                           ; 0                            ;
; 29                                           ; 1                            ;
+----------------------------------------------+------------------------------+


+------------------------------------------+
; I/O Rules Summary                        ;
+----------------------------------+-------+
; I/O Rules Statistic              ; Total ;
+----------------------------------+-------+
; Total I/O Rules                  ; 30    ;
; Number of I/O Rules Passed       ; 10    ;
; Number of I/O Rules Failed       ; 0     ;
; Number of I/O Rules Unchecked    ; 0     ;
; Number of I/O Rules Inapplicable ; 20    ;
+----------------------------------+-------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; I/O Rules Details                                                                                                                                                                                                                                                                    ;
+--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+------+-------------------+
; Status       ; ID        ; Category                          ; Rule Description                                                                                     ; Severity ; Information                                                              ; Area ; Extra Information ;
+--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+------+-------------------+
; Pass         ; IO_000001 ; Capacity Checks                   ; Number of pins in an I/O bank should not exceed the number of locations available.                   ; Critical ; 0 such failures found.                                                   ; I/O  ;                   ;
; Inapplicable ; IO_000002 ; Capacity Checks                   ; Number of clocks in an I/O bank should not exceed the number of clocks available.                    ; Critical ; No Global Signal assignments found.                                      ; I/O  ;                   ;
; Pass         ; IO_000003 ; Capacity Checks                   ; Number of pins in a Vrefgroup should not exceed the number of locations available.                   ; Critical ; 0 such failures found.                                                   ; I/O  ;                   ;
; Inapplicable ; IO_000004 ; Voltage Compatibility Checks      ; The I/O bank should support the requested VCCIO.                                                     ; Critical ; No IOBANK_VCCIO assignments found.                                       ; I/O  ;                   ;
; Inapplicable ; IO_000005 ; Voltage Compatibility Checks      ; The I/O bank should not have competing VREF values.                                                  ; Critical ; No VREF I/O Standard assignments found.                                  ; I/O  ;                   ;
; Pass         ; IO_000006 ; Voltage Compatibility Checks      ; The I/O bank should not have competing VCCIO values.                                                 ; Critical ; 0 such failures found.                                                   ; I/O  ;                   ;
; Pass         ; IO_000007 ; Valid Location Checks             ; Checks for unavailable locations.                                                                    ; Critical ; 0 such failures found.                                                   ; I/O  ;                   ;
; Inapplicable ; IO_000008 ; Valid Location Checks             ; Checks for reserved locations.                                                                       ; Critical ; No reserved LogicLock region found.                                      ; I/O  ;                   ;
; Pass         ; IO_000009 ; I/O Properties Checks for One I/O ; The location should support the requested I/O standard.                                              ; Critical ; 0 such failures found.                                                   ; I/O  ;                   ;
; Pass         ; IO_000010 ; I/O Properties Checks for One I/O ; The location should support the requested I/O direction.                                             ; Critical ; 0 such failures found.                                                   ; I/O  ;                   ;
; Inapplicable ; IO_000011 ; I/O Properties Checks for One I/O ; The location should support the requested Current Strength.                                          ; Critical ; No Current Strength assignments found.                                   ; I/O  ;                   ;
; Inapplicable ; IO_000012 ; I/O Properties Checks for One I/O ; The location should support the requested On Chip Termination value.                                 ; Critical ; No Termination assignments found.                                        ; I/O  ;                   ;
; Inapplicable ; IO_000013 ; I/O Properties Checks for One I/O ; The location should support the requested Bus Hold value.                                            ; Critical ; No Enable Bus-Hold Circuitry assignments found.                          ; I/O  ;                   ;
; Inapplicable ; IO_000014 ; I/O Properties Checks for One I/O ; The location should support the requested Weak Pull Up value.                                        ; Critical ; No Weak Pull-Up Resistor assignments found.                              ; I/O  ;                   ;
; Pass         ; IO_000015 ; I/O Properties Checks for One I/O ; The location should support the requested PCI Clamp Diode.                                           ; Critical ; 0 such failures found.                                                   ; I/O  ;                   ;
; Inapplicable ; IO_000018 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Current Strength.                                      ; Critical ; No Current Strength assignments found.                                   ; I/O  ;                   ;
; Inapplicable ; IO_000019 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested On Chip Termination value.                             ; Critical ; No Termination assignments found.                                        ; I/O  ;                   ;
; Pass         ; IO_000020 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested PCI Clamp Diode.                                       ; Critical ; 0 such failures found.                                                   ; I/O  ;                   ;
; Inapplicable ; IO_000021 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Weak Pull Up value.                                    ; Critical ; No Weak Pull-Up Resistor assignments found.                              ; I/O  ;                   ;
; Inapplicable ; IO_000022 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Bus Hold value.                                        ; Critical ; No Enable Bus-Hold Circuitry assignments found.                          ; I/O  ;                   ;
; Pass         ; IO_000023 ; I/O Properties Checks for One I/O ; The I/O standard should support the Open Drain value.                                                ; Critical ; 0 such failures found.                                                   ; I/O  ;                   ;
; Inapplicable ; IO_000024 ; I/O Properties Checks for One I/O ; The I/O direction should support the On Chip Termination value.                                      ; Critical ; No Termination assignments found.                                        ; I/O  ;                   ;
; Inapplicable ; IO_000026 ; I/O Properties Checks for One I/O ; On Chip Termination and Current Strength should not be used at the same time.                        ; Critical ; No Current Strength or Termination assignments found.                    ; I/O  ;                   ;
; Inapplicable ; IO_000027 ; I/O Properties Checks for One I/O ; Weak Pull Up and Bus Hold should not be used at the same time.                                       ; Critical ; No Enable Bus-Hold Circuitry or Weak Pull-Up Resistor assignments found. ; I/O  ;                   ;
; Inapplicable ; IO_000045 ; I/O Properties Checks for One I/O ; The I/O standard should support the requested Slew Rate value.                                       ; Critical ; No Slew Rate assignments found.                                          ; I/O  ;                   ;
; Inapplicable ; IO_000046 ; I/O Properties Checks for One I/O ; The location should support the requested Slew Rate value.                                           ; Critical ; No Slew Rate assignments found.                                          ; I/O  ;                   ;
; Inapplicable ; IO_000047 ; I/O Properties Checks for One I/O ; On Chip Termination and Slew Rate should not be used at the same time.                               ; Critical ; No Slew Rate assignments found.                                          ; I/O  ;                   ;
; Pass         ; IO_000033 ; Electromigration Checks           ; Current density for consecutive I/Os should not exceed 240mA for row I/Os and 240mA for column I/Os. ; Critical ; 0 such failures found.                                                   ; I/O  ;                   ;
; Inapplicable ; IO_000034 ; SI Related Distance Checks        ; Single-ended outputs should be 5 LAB row(s) away from a differential I/O.                            ; High     ; No Differential I/O Standard assignments found.                          ; I/O  ;                   ;
; Inapplicable ; IO_000042 ; SI Related SSO Limit Checks       ; No more than 20 outputs are allowed in a VREF group when VREF is being read from.                    ; High     ; No VREF I/O Standard assignments found.                                  ; I/O  ;                   ;
+--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+------+-------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; I/O Rules Matrix                                                                                                                                                                                                                                                                                                                                                                                                                                                          ;
+---------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+
; Pin/Rules           ; IO_000001    ; IO_000002    ; IO_000003    ; IO_000004    ; IO_000005    ; IO_000006 ; IO_000007    ; IO_000008    ; IO_000009 ; IO_000010 ; IO_000011    ; IO_000012    ; IO_000013    ; IO_000014    ; IO_000015    ; IO_000018    ; IO_000019    ; IO_000020    ; IO_000021    ; IO_000022    ; IO_000023    ; IO_000024    ; IO_000026    ; IO_000027    ; IO_000045    ; IO_000046    ; IO_000047    ; IO_000033 ; IO_000034    ; IO_000042    ;
+---------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+
; Total Pass          ; 30           ; 0            ; 30           ; 0            ; 0            ; 34        ; 30           ; 0            ; 34        ; 34        ; 0            ; 0            ; 0            ; 0            ; 21           ; 0            ; 0            ; 21           ; 0            ; 0            ; 16           ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 34        ; 0            ; 0            ;
; Total Unchecked     ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0            ; 0            ; 0         ; 0         ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0            ; 0            ;
; Total Inapplicable  ; 4            ; 34           ; 4            ; 34           ; 34           ; 0         ; 4            ; 34           ; 0         ; 0         ; 34           ; 34           ; 34           ; 34           ; 13           ; 34           ; 34           ; 13           ; 34           ; 34           ; 18           ; 34           ; 34           ; 34           ; 34           ; 34           ; 34           ; 0         ; 34           ; 34           ;
; Total Fail          ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0            ; 0            ; 0         ; 0         ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0            ; 0         ; 0            ; 0            ;
; FLAGB               ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FLAGC               ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; SLOE                ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; SLRD                ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFOADR[0]          ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFOADR[1]          ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; SLWR                ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; led[0]              ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; led[1]              ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; led[2]              ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; led[3]              ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[4]         ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[5]         ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[6]         ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[7]         ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[8]         ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[9]         ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[10]        ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[11]        ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[12]        ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[13]        ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[14]        ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[15]        ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[0]         ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[1]         ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[2]         ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FIFODATA[3]         ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; clk                 ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; rst                 ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; FLAGA               ; Pass         ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass      ; Pass         ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Pass         ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; altera_reserved_tms ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; altera_reserved_tck ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; altera_reserved_tdi ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
; altera_reserved_tdo ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ; Pass      ; Pass      ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass      ; Inapplicable ; Inapplicable ;
+---------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+


+----------------------------------------------------------------------------------------+
; Fitter Device Options                                                                  ;
+------------------------------------------------------------------+---------------------+
; Option                                                           ; Setting             ;
+------------------------------------------------------------------+---------------------+
; Enable user-supplied start-up clock (CLKUSR)                     ; Off                 ;
; Enable device-wide reset (DEV_CLRn)                              ; Off                 ;
; Enable device-wide output enable (DEV_OE)                        ; Off                 ;
; Enable INIT_DONE output                                          ; Off                 ;
; Configuration scheme                                             ; Active Serial       ;
; Error detection CRC                                              ; Off                 ;
; Enable open drain on CRC_ERROR pin                               ; Off                 ;
; Enable input tri-state on active configuration pins in user mode ; Off                 ;
; Configuration Voltage Level                                      ; Auto                ;
; Force Configuration Voltage Level                                ; Off                 ;
; nCEO                                                             ; Unreserved          ;
; Data[0]                                                          ; Unreserved          ;
; Data[1]/ASDO                                                     ; Unreserved          ;
; Data[7..2]                                                       ; Unreserved          ;
; FLASH_nCE/nCSO                                                   ; As input tri-stated ;
; Other Active Parallel pins                                       ; As input tri-stated ;
; DCLK                                                             ; Unreserved          ;
; Base pin-out file on sameframe device                            ; Off                 ;
+------------------------------------------------------------------+---------------------+


+------------------------------------+
; Operating Settings and Conditions  ;
+---------------------------+--------+
; Setting                   ; Value  ;
+---------------------------+--------+
; Nominal Core Voltage      ; 1.20 V ;
; Low Junction Temperature  ; 0 °C   ;
; High Junction Temperature ; 85 °C  ;
+---------------------------+--------+


+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 11.0 Build 157 04/27/2011 SJ Full Version
    Info: Processing started: Fri May 04 14:09:27 2012
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off USB_LED -c USB_LED
Info: Parallel compilation is enabled and will use 2 of the 2 processors detected
Info: Selected device EP3C16Q240C8 for design "USB_LED"
Info: Low junction temperature is 0 degrees C
Info: High junction temperature is 85 degrees C
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
    Info: Device EP3C25Q240C8 is compatible
    Info: Device EP3C40Q240C8 is compatible
Info: Fitter converted 1 user pins into dedicated programming pins
    Info: Pin ~ALTERA_FLASH_nCE_nCSO~ is reserved at location 14
Info: DATA[0] dual-purpose pin not reserved
Warning: Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details
Info: Design uses memory blocks. Violating setup or hold times of memory block address registers for either read or write operations could cause memory contents to be corrupted. Make sure that all memory block address registers meet the setup and hold time requirements.
Info: Timing-driven compilation is using the TimeQuest Timing Analyzer
Warning: Timing Analysis is analyzing one or more combinational loops as latches
    Warning: Node "ledctrl[2]|combout" is a latch
    Warning: Node "ledctrl[0]|combout" is a latch
    Warning: Node "ledctrl[1]|combout" is a latch
    Warning: Node "ledctrl[3]|combout" is a latch
Info: Evaluating HDL-embedded SDC commands
    Info: Entity sld_hub
        Info: create_clock -period 10MHz -name altera_reserved_tck [get_ports {altera_reserved_tck}]
        Info: set_clock_groups -asynchronous -group {altera_reserved_tck}
Critical Warning: Synopsys Design Constraints File file not found: 'USB_LED.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
Warning: Node: clk was determined to be a clock but was found without an associated clock assignment.
Warning: Node: led_cnt[23] was determined to be a clock but was found without an associated clock assignment.
Warning: Node: SLOE_r was determined to be a clock but was found without an associated clock assignment.
Critical Warning: The following clock transfers have no clock uncertainty assignment. For more accurate results, apply clock uncertainty assignments or use the derive_clock_uncertainty command.
    Critical Warning: From altera_reserved_tck (Rise) to altera_reserved_tck (Rise) (setup and hold)
    Critical Warning: From altera_reserved_tck (Rise) to altera_reserved_tck (Fall) (setup and hold)
    Critical Warning: From altera_reserved_tck (Fall) to altera_reserved_tck (Fall) (setup and hold)
Info: Detected timing requirements -- optimizing circuit to achieve only the specified requirements
Info: Found 1 clocks
    Info:   Period   Clock Name
    Info: ======== ============
    Info:  100.000 altera_reserved_tck
Info: Automatically promoted node clk~input (placed in PIN 31 (CLK0, DIFFCLK_0p))
    Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G4
Info: Automatically promoted node altera_internal_jtag~TCKUTAP 
    Info: Automatically promoted destinations to use location or clock signal Global Clock
Info: Automatically promoted node led_cnt[23] 
    Info: Automatically promoted destinations to use location or clock signal Global Clock
    Info: Following destination nodes may be non-global or may not use global or regional clocks
        Info: Destination node led_cnt[23]~67
Info: Automatically promoted node SLOE_r 
    Info: Automatically promoted destinations to use location or clock signal Global Clock
    Info: Following destination nodes may be non-global or may not use global or regional clocks
        Info: Destination node SLOE_r~0
        Info: Destination node SLOE_r~1
        Info: Destination node SLOE_r~_wirecell
        Info: Destination node SLRD~output
        Info: Destination node SLOE~output
Info: Automatically promoted node sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|reset_all 
    Info: Automatically promoted destinations to use location or clock signal Global Clock
    Info: Following destination nodes may be non-global or may not use global or regional clocks
        Info: Destination node sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset~0
        Info: Destination node sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|acq_buf_read_reset
Info: Starting register packing
Info: Finished register packing
    Extra Info: No registers were packed into other blocks
Info: Fitter preparation operations ending: elapsed time is 00:00:01
Info: Fitter placement preparation operations beginning
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Fitter placement operations ending: elapsed time is 00:00:00
Info: Fitter routing operations beginning
Info: Router estimated average interconnect usage is 0% of the available device resources
    Info: Router estimated peak interconnect usage is 5% of the available device resources in the region that extends from location X21_Y20 to location X30_Y29
Info: Fitter routing operations ending: elapsed time is 00:00:00
Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time.
    Info: Optimizations that may affect the design's routability were skipped
    Info: Optimizations that may affect the design's timing were skipped
Info: Started post-fitting delay annotation
Info: Delay annotation completed successfully
Warning: 21 pins must meet Altera requirements for 3.3-, 3.0-, and 2.5-V interfaces. For more information, refer to AN 447: Interfacing Cyclone III Devices with 3.3/3.0/2.5-V LVTTL/LVCMOS I/O Systems.
    Info: Pin FLAGB uses I/O standard 3.3-V LVTTL at 196
    Info: Pin FLAGC uses I/O standard 3.3-V LVTTL at 197
    Info: Pin FIFODATA[4] uses I/O standard 3.3-V LVTTL at 214
    Info: Pin FIFODATA[5] uses I/O standard 3.3-V LVTTL at 217
    Info: Pin FIFODATA[6] uses I/O standard 3.3-V LVTTL at 218
    Info: Pin FIFODATA[7] uses I/O standard 3.3-V LVTTL at 219
    Info: Pin FIFODATA[8] uses I/O standard 3.3-V LVTTL at 221
    Info: Pin FIFODATA[9] uses I/O standard 3.3-V LVTTL at 224
    Info: Pin FIFODATA[10] uses I/O standard 3.3-V LVTTL at 226
    Info: Pin FIFODATA[11] uses I/O standard 3.3-V LVTTL at 231
    Info: Pin FIFODATA[12] uses I/O standard 3.3-V LVTTL at 232
    Info: Pin FIFODATA[13] uses I/O standard 3.3-V LVTTL at 236
    Info: Pin FIFODATA[14] uses I/O standard 3.3-V LVTTL at 239
    Info: Pin FIFODATA[15] uses I/O standard 3.3-V LVTTL at 240
    Info: Pin FIFODATA[0] uses I/O standard 3.3-V LVTTL at 200
    Info: Pin FIFODATA[1] uses I/O standard 3.3-V LVTTL at 201
    Info: Pin FIFODATA[2] uses I/O standard 3.3-V LVTTL at 202
    Info: Pin FIFODATA[3] uses I/O standard 3.3-V LVTTL at 207
    Info: Pin clk uses I/O standard 3.3-V LVTTL at 31
    Info: Pin rst uses I/O standard 3.3-V LVTTL at 6
    Info: Pin FLAGA uses I/O standard 3.3-V LVTTL at 185
Warning: Following 16 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results
    Info: Pin FIFODATA[4] has a permanently disabled output enable
    Info: Pin FIFODATA[5] has a permanently disabled output enable
    Info: Pin FIFODATA[6] has a permanently disabled output enable
    Info: Pin FIFODATA[7] has a permanently disabled output enable
    Info: Pin FIFODATA[8] has a permanently disabled output enable
    Info: Pin FIFODATA[9] has a permanently disabled output enable
    Info: Pin FIFODATA[10] has a permanently disabled output enable
    Info: Pin FIFODATA[11] has a permanently disabled output enable
    Info: Pin FIFODATA[12] has a permanently disabled output enable
    Info: Pin FIFODATA[13] has a permanently disabled output enable
    Info: Pin FIFODATA[14] has a permanently disabled output enable
    Info: Pin FIFODATA[15] has a permanently disabled output enable
    Info: Pin FIFODATA[0] has a permanently disabled output enable
    Info: Pin FIFODATA[1] has a permanently disabled output enable
    Info: Pin FIFODATA[2] has a permanently disabled output enable
    Info: Pin FIFODATA[3] has a permanently disabled output enable
Info: Generated suppressed messages file E:/Program/EP3C16/vhdl/USB_LED/FPGA_A/USB_LED.fit.smsg
Info: Quartus II Fitter was successful. 0 errors, 16 warnings
    Info: Peak virtual memory: 380 megabytes
    Info: Processing ended: Fri May 04 14:09:33 2012
    Info: Elapsed time: 00:00:06
    Info: Total CPU time (on all processors): 00:00:06


+----------------------------+
; Fitter Suppressed Messages ;
+----------------------------+
The suppressed messages can be found in E:/Program/EP3C16/vhdl/USB_LED/FPGA_A/USB_LED.fit.smsg.


