Projekt URSO180 RetroModern x80-System - Versionsgeschichte

Wolfgang am 2. November 2025 um 17:52 Uhr

2025-11-02T17:52:41Z

← Nächstältere Version		Version vom 2. November 2025, 17:52 Uhr
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	* {{PuconWebLink\|public/public/Projekte/URSO180/}}		* {{PuconWebLink\|public/public/Projekte/URSO180/}}

			== Interne Information ==

			* {{StCo\|PUCONBOX013006}}


	... to be continued ...		... to be continued ...

Wolfgang: /* CPU */

2021-09-22T17:17:25Z

CPU

← Nächstältere Version		Version vom 22. September 2021, 17:17 Uhr
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	=== CPU ===		=== CPU ===

	The {{URSO180}}'s CPU is a member of the [[HD64180]] family, a HD64180ZCP10X. This specific chip type has the specific parameters:		The {{URSO180}}'s CPU is a member of the [[Hitachi HD64180]] family, a HD64180ZCP10X. This specific chip type has the specific parameters:

	* 1MiB CPU-addressable memory using a 20-bit address bus		* 1MiB CPU-addressable memory using a 20-bit address bus
	* up to 10MHz internal clock (φ), {{URSO180}} uses a ~~16MHz~~ crystal to generate the clock, resulting in 8 MHz internal clock		* up to 10MHz internal clock (φ), {{URSO180}} uses a 18.432MHz crystal to generate the clock, resulting in 7.216 MHz internal clock and suiting baud rates on the ACIA channels.

	The CPU has internal dual asynchronous serial peripherals. The data signals of both are exposed to the outside world by a 6-pin female header each. These connectors are compatible with most TTL-level FT232 USB-serial bridges. One of these can therefore simply be plugged in the respective female header.		The CPU has internal dual asynchronous serial peripherals. The data signals of both are exposed to the outside world by a 6-pin female header each. These connectors are compatible with most TTL-level FT232 USB-serial bridges. One of these can therefore simply be plugged in the respective female header.

Wolfgang: /* CPU */

2021-09-22T17:12:18Z

CPU

← Nächstältere Version		Version vom 22. September 2021, 17:12 Uhr
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	=== CPU ===		=== CPU ===

	The {{URSO180}}'s CPU is a HD64180ZCP10X. This specific chip type has the specific parameters:		The {{URSO180}}'s CPU is a member of the [[HD64180]] family, a HD64180ZCP10X. This specific chip type has the specific parameters:

	* 1MiB CPU-addressable memory using a 20-bit address bus		* 1MiB CPU-addressable memory using a 20-bit address bus

Wolfgang: /* The Hardware */

2021-06-22T19:53:15Z

The Hardware

← Nächstältere Version		Version vom 22. Juni 2021, 19:53 Uhr
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	The URSO180 Page is at https://easyeda.com/scherer3002/URSO180-XXwWUgecx.		The URSO180 Page is at https://easyeda.com/scherer3002/URSO180-XXwWUgecx.

	{{ServerImage\|Schematic_URSO180_2021-06-19.svg\|height=~~400px~~}}		{{ServerImage\|Schematic_URSO180_2021-06-19.svg\|height=800px}}

	=== CPU ===		=== CPU ===

Wolfgang: /* Additional Inspiration and Input */

2021-06-22T19:51:51Z

Additional Inspiration and Input

← Nächstältere Version		Version vom 22. Juni 2021, 19:51 Uhr
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	* [http://benryves.com/ Ben Ryves] built his [https://www.youtube.com/watch?v=DQ3vQW2Fs_w&list=PLz-ePwn2hOw8SOuZ7k3vM5x8Y4z8fFcgN&index=5 Z80-Computer Mark 2] with really clever hardware, even including Video output and PS/2 keyboard support. The Mark 2 does not have a front panel with switches and Blinkenlights but sort of a console processor allowing the Z80 to start from scratch without needing (EP)ROM code, similar to the intentions of {{URSO180}}		* [http://benryves.com/ Ben Ryves] built his [https://www.youtube.com/watch?v=DQ3vQW2Fs_w&list=PLz-ePwn2hOw8SOuZ7k3vM5x8Y4z8fFcgN&index=5 Z80-Computer Mark 2] with really clever hardware, even including Video output and PS/2 keyboard support. The Mark 2 does not have a front panel with switches and Blinkenlights but sort of a console processor allowing the Z80 to start from scratch without needing (EP)ROM code, similar to the intentions of {{URSO180}}
			* [http://searle.x10host.com/index.html Grant Searle] has a number of simple 8-bit computer designs including some with FPGAs and even completely FPGA-based models.

	== The Hardware ==		== The Hardware ==

Wolfgang: /* The Hardware */

2021-06-19T21:49:33Z

The Hardware

← Nächstältere Version		Version vom 19. Juni 2021, 21:49 Uhr
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	The URSO180 Page is at https://easyeda.com/scherer3002/URSO180-XXwWUgecx.		The URSO180 Page is at https://easyeda.com/scherer3002/URSO180-XXwWUgecx.

	{{~~sververImage~~\|Schematic_URSO180_2021-06-19.svg\|height=400px}}		{{ServerImage\|Schematic_URSO180_2021-06-19.svg\|height=400px}}

	=== CPU ===		=== CPU ===

Wolfgang: /* The Hardware */

2021-06-19T21:49:21Z

The Hardware

← Nächstältere Version		Version vom 19. Juni 2021, 21:49 Uhr
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	The URSO180 Page is at https://easyeda.com/scherer3002/URSO180-XXwWUgecx.		The URSO180 Page is at https://easyeda.com/scherer3002/URSO180-XXwWUgecx.

			{{sververImage\|Schematic_URSO180_2021-06-19.svg\|height=400px}}

	=== CPU ===		=== CPU ===
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	* 1MiB CPU-addressable memory using a 20-bit address bus		* 1MiB CPU-addressable memory using a 20-bit address bus
	* up to 10MHz internal clock (φ), {{URSO180}} uses a 16MHz crystal to ~~enerate~~ the clock, resulting in 8 MHz internal clock		* up to 10MHz internal clock (φ), {{URSO180}} uses a 16MHz crystal to generate the clock, resulting in 8 MHz internal clock

	The CPU has internal dual asynchronous serial peripherals. The data signals of both are exposed to the outside world by a 6-pin female header each. These ~~copnnectors~~ are compatible with ~~the~~ most TTL-level FT232 USB-serial bridges. One of these can therefore simply be plugged in the respective female header.		The CPU has internal dual asynchronous serial peripherals. The data signals of both are exposed to the outside world by a 6-pin female header each. These connectors are compatible with most TTL-level FT232 USB-serial bridges. One of these can therefore simply be plugged in the respective female header.

	=== Memory ===		=== Memory ===

Wolfgang: /* CPU */

2021-06-19T21:44:58Z

CPU

@@ Zeile 72: / Zeile 72: @@
 === CPU ===
-{{tbc}}
+The {{URSO180}}'s CPU is a HD64180ZCP10X. This specific chip type has the specific parameters:
 === Glue Logic ===

Wolfgang: /* Additional Inspiration and Input */

2021-06-19T18:06:02Z

Additional Inspiration and Input

← Nächstältere Version		Version vom 19. Juni 2021, 18:06 Uhr
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	There are a number of people having done extremely thorough work and published it too:		There are a number of people having done extremely thorough work and published it too:

	* [http://benryves.com/ Ben Ryves] built ~~bis~~ [https://www.youtube.com/watch?v=DQ3vQW2Fs_w&list=PLz-ePwn2hOw8SOuZ7k3vM5x8Y4z8fFcgN&index=5 Z80-Computer Mark 2] with really clever hardware, even including Video output and PS/2 keyboard support. The Mark 2 does not have a front panel with switches and Blinkenlights but sort of a console processor allowing the Z80 to start from scratch without needing (EP)ROM code, similar to the intentions of {{URSO180}}		* [http://benryves.com/ Ben Ryves] built his [https://www.youtube.com/watch?v=DQ3vQW2Fs_w&list=PLz-ePwn2hOw8SOuZ7k3vM5x8Y4z8fFcgN&index=5 Z80-Computer Mark 2] with really clever hardware, even including Video output and PS/2 keyboard support. The Mark 2 does not have a front panel with switches and Blinkenlights but sort of a console processor allowing the Z80 to start from scratch without needing (EP)ROM code, similar to the intentions of {{URSO180}}

	== The Hardware ==		== The Hardware ==

Wolfgang: /* The Hardware */

2021-06-19T17:24:25Z

The Hardware

← Nächstältere Version		Version vom 19. Juni 2021, 17:24 Uhr
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	The URSO180 Page is at https://easyeda.com/scherer3002/URSO180-XXwWUgecx.		The URSO180 Page is at https://easyeda.com/scherer3002/URSO180-XXwWUgecx.

			=== CPU ===

			{{tbc}}

	=== Glue Logic ===		=== Glue Logic ===
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	\| 22 \|\| 39SF040 \|\| U11 \|\| DIP32 \|\| 1 \|\| \|\| \|\| \|\| \|\| \|\| \|\|		\| 22 \|\| 39SF040 \|\| U11 \|\| DIP32 \|\| 1 \|\| \|\| \|\| \|\| \|\| \|\| \|\|
	{{TableEnd}}		{{TableEnd}}

			=== Power Connector ===

			Power is input into the URSO180CPU using a 5.5/2.1mm barrel connector with center-plus polarity.

	== Tools ==		== Tools ==